NormalizationLayer changes to enable fp16 in armv8a multi_isa builds

    * Moved the template arm_compute::normalize_float to impl.h because
      we need to instantiate it from both NENormalizationLayerKernel.cpp
      and src/cpu/kernels/norm_layer/generic/neon/fp16.cpp

    * Changes in filelist.json: added a new fp16.cpp file for the float16_t kernels

    * Replaced the guard __ARM_FEATURE_FP16_VECTOR_ARITHMETIC in
      NENormalizationLayerKernel by ARM_COMPUTE_ENABLE_FP16 so that
      the fp16 kernels can be compiled in for multi_isa builds

    * Moved fp32 kernels to the corresponding file
      src/cpu/kernels/norm_layer/generic/neon/fp32.cpp

    * Partially resolves MLCE-1102

Change-Id: I3f2eb2ed0b6c7f68092b17872b85082fbb5f39e2
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10739
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>

1 files changed, 63 insertions, 0 deletions

diff --git a/src/cpu/kernels/norm_layer/generic/neon/fp32.cpp b/src/cpu/kernels/norm_layer/generic/neon/fp32.cpp
new file mode 100644
index 0000000000..0b64f46956
--- /dev/null
+++ b/src/cpu/kernels/norm_layer/generic/neon/fp32.cpp
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2023 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include "src/core/NEON/wrapper/wrapper.h"
+#include "src/cpu/CpuTypes.h"
+#include "src/cpu/kernels/norm_layer/generic/neon/impl.h"
+
+namespace arm_compute
+{
+namespace cpu
+{
+void neon_normalize_float32_4_0_2D(
+    const Window &window, const ITensor *in, const ITensor *in_squared, ITensor *out, NormalizationLayerInfo ninfo)
+{
+    arm_compute::normalize_float<float, 4, 0, true>(window, in, in_squared, out, ninfo);
+}
+
+void neon_normalize_float32_4_0(
+    const Window &window, const ITensor *in, const ITensor *in_squared, ITensor *out, NormalizationLayerInfo ninfo)
+{
+    arm_compute::normalize_float<float, 4, 0, false>(window, in, in_squared, out, ninfo);
+}
+
+void neon_normalize_float32_4_1_2D(
+    const Window &window, const ITensor *in, const ITensor *in_squared, ITensor *out, NormalizationLayerInfo ninfo)
+{
+    arm_compute::normalize_float<float, 4, 1, true>(window, in, in_squared, out, ninfo);
+}
+
+void neon_normalize_float32_4_1(
+    const Window &window, const ITensor *in, const ITensor *in_squared, ITensor *out, NormalizationLayerInfo ninfo)
+{
+    arm_compute::normalize_float<float, 4, 1, false>(window, in, in_squared, out, ninfo);
+}
+
+void neon_normalize_float32_4_2(
+    const Window &window, const ITensor *in, const ITensor *in_squared, ITensor *out, NormalizationLayerInfo ninfo)
+{
+    arm_compute::normalize_float<float, 4, 2, false>(window, in, in_squared, out, ninfo);
+}
+} // namespace cpu
+} // namespace arm_compute