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| author | alerah01 <alex.rahlis@arm.com> | 2022-02-28 06:38:08 +0200 |
|---|---|---|
| committer | Alex Rahlis <alex.rahlis@arm.com> | 2022-03-03 11:35:37 +0000 |
| commit | 4cbcb840caca1346de5f2271b67e4ede17b72734 (patch) | |
| tree | 8c6950076fc2dc0be087f725c927751891619120 /src/cpu/kernels/add/generic/sve2/qsymm16.cpp | |
| parent | 298b2c0526615fc1f0242c2792fe2c51a4f0c44a (diff) | |
| download | ComputeLibrary-4cbcb840caca1346de5f2271b67e4ede17b72734.tar.gz | |
Removing SVE / SVE2 guards from decoupled kernels
Jira: COMPMID-5172
Signed-off-by: alerah01 <alex.rahlis@arm.com>
Change-Id: I1b9ace8e573f85830f29728a27adfe39a0cab113
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/7241
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/cpu/kernels/add/generic/sve2/qsymm16.cpp')
| -rw-r--r-- | src/cpu/kernels/add/generic/sve2/qsymm16.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/cpu/kernels/add/generic/sve2/qsymm16.cpp b/src/cpu/kernels/add/generic/sve2/qsymm16.cpp index 723d2a6c98..8c48ded942 100644 --- a/src/cpu/kernels/add/generic/sve2/qsymm16.cpp +++ b/src/cpu/kernels/add/generic/sve2/qsymm16.cpp @@ -21,7 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ -#if defined(ARM_COMPUTE_ENABLE_SVE2) + #include "arm_compute/core/Helpers.h" #include "arm_compute/core/ITensor.h" #include "arm_compute/core/Types.h" @@ -153,4 +153,3 @@ void add_qsymm16_sve2(const ITensor *src0, const ITensor *src1, ITensor *dst, co } } // namespace cpu } // namespace arm_compute -#endif //ARM_COMPUTE_ENABLE_SVE2
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