diff options
| author | alerah01 <alex.rahlis@arm.com> | 2022-02-28 06:38:08 +0200 |
|---|---|---|
| committer | Alex Rahlis <alex.rahlis@arm.com> | 2022-03-03 11:35:37 +0000 |
| commit | 4cbcb840caca1346de5f2271b67e4ede17b72734 (patch) | |
| tree | 8c6950076fc2dc0be087f725c927751891619120 /src/cpu/kernels/activation/generic/sve2/qsymm16.cpp | |
| parent | 298b2c0526615fc1f0242c2792fe2c51a4f0c44a (diff) | |
| download | ComputeLibrary-4cbcb840caca1346de5f2271b67e4ede17b72734.tar.gz | |
Removing SVE / SVE2 guards from decoupled kernels
Jira: COMPMID-5172
Signed-off-by: alerah01 <alex.rahlis@arm.com>
Change-Id: I1b9ace8e573f85830f29728a27adfe39a0cab113
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/7241
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/cpu/kernels/activation/generic/sve2/qsymm16.cpp')
| -rw-r--r-- | src/cpu/kernels/activation/generic/sve2/qsymm16.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/cpu/kernels/activation/generic/sve2/qsymm16.cpp b/src/cpu/kernels/activation/generic/sve2/qsymm16.cpp index 0eecfa618f..41b5555448 100644 --- a/src/cpu/kernels/activation/generic/sve2/qsymm16.cpp +++ b/src/cpu/kernels/activation/generic/sve2/qsymm16.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021 Arm Limited. + * Copyright (c) 2020-2022 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -29,7 +29,6 @@ #include <cmath> #include <cstddef> -#if defined(ARM_COMPUTE_ENABLE_SVE2) #include "src/core/NEON/SVEMath.h" #include "src/core/NEON/SVESymm.h" #include <arm_sve.h> @@ -117,4 +116,3 @@ void sve2_qsymm16_activation(const ITensor *src, ITensor *dst, const ActivationL } } // namespace cpu } // namespace arm_compute -#endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */ |