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| author | Dana Zlotnik <dana.zlotnik@arm.com> | 2022-01-17 09:54:26 +0200 |
|---|---|---|
| committer | Dana Zlotnik <dana.zlotnik@arm.com> | 2022-02-14 12:49:53 +0000 |
| commit | 6a2df886f32dcf7af4258163b0652f0fab07ecc5 (patch) | |
| tree | 4ad16670d54d29de96df7cc5b582d52a6012255a /src/cpu/kernels/CpuElementwiseUnaryKernel.cpp | |
| parent | 69854ba71f91f86c2a1c8a2301e91dcd93030561 (diff) | |
| download | ComputeLibrary-6a2df886f32dcf7af4258163b0652f0fab07ecc5.tar.gz | |
Add kernel selection UT for submitted kernels
* Softmax kernel
* Elementwise unary kernel
* Elementwise binary
** This change require some refactor in the kernel cpp and h files
Resolves COMPMID-5043
Change-Id: I58979b023ec31d759690847b3f85fc4baefbbf98
Signed-off-by: Dana Zlotnik <dana.zlotnik@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/7033
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Diffstat (limited to 'src/cpu/kernels/CpuElementwiseUnaryKernel.cpp')
| -rw-r--r-- | src/cpu/kernels/CpuElementwiseUnaryKernel.cpp | 30 |
1 files changed, 18 insertions, 12 deletions
diff --git a/src/cpu/kernels/CpuElementwiseUnaryKernel.cpp b/src/cpu/kernels/CpuElementwiseUnaryKernel.cpp index e8211fe93e..335de78aca 100644 --- a/src/cpu/kernels/CpuElementwiseUnaryKernel.cpp +++ b/src/cpu/kernels/CpuElementwiseUnaryKernel.cpp @@ -44,12 +44,11 @@ namespace { static const std::vector<CpuElementwiseUnaryKernel::ElementwiseUnaryKernel> available_kernels = { -#if defined(ARM_COMPUTE_ENABLE_SVE) { "sve_fp32_elementwise_unary", [](const DataTypeISASelectorData & data) { - return data.dt == DataType::F32 && data.isa.sve; + return (data.dt == DataType::F32 && data.isa.sve); }, REGISTER_FP32_SVE(sve_fp32_elementwise_unary) }, @@ -57,35 +56,42 @@ static const std::vector<CpuElementwiseUnaryKernel::ElementwiseUnaryKernel> avai "sve_fp16_elementwise_unary", [](const DataTypeISASelectorData & data) { - return (data.dt == DataType::F16) && data.isa.sve; + return (data.dt == DataType::F16 && data.isa.sve && data.isa.fp16); }, REGISTER_FP16_SVE(sve_fp16_elementwise_unary), }, { "sve_s32_elementwise_unary", - [](const DataTypeISASelectorData & data) { return data.dt == DataType::S32 && data.isa.sve; }, + [](const DataTypeISASelectorData & data) + { + return (data.dt == DataType::S32 && data.isa.sve); + }, REGISTER_INTEGER_SVE(sve_s32_elementwise_unary), }, -#endif // defined(ARM_COMPUTE_ENABLE_SVE) -#if defined(ARM_COMPUTE_ENABLE_NEON) { "neon_fp32_elementwise_unary", - [](const DataTypeISASelectorData & data) { return data.dt == DataType::F32; }, + [](const DataTypeISASelectorData & data) + { + return data.dt == DataType::F32; + }, REGISTER_FP32_NEON(neon_fp32_elementwise_unary), }, -#if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) { "neon_fp16_elementwise_unary", - [](const DataTypeISASelectorData & data) { return data.dt == DataType::F16 && data.isa.fp16; }, + [](const DataTypeISASelectorData & data) + { + return data.dt == DataType::F16 && data.isa.fp16; + }, REGISTER_FP16_NEON(neon_fp16_elementwise_unary), }, -#endif // defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) { "neon_s32_elementwise_unary", - [](const DataTypeISASelectorData & data) { return data.dt == DataType::S32; }, + [](const DataTypeISASelectorData & data) + { + return data.dt == DataType::S32; + }, REGISTER_INTEGER_NEON(neon_s32_elementwise_unary), }, -#endif // defined(ARM_COMPUTE_ENABLE_NEON) }; } // namespace |