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| author | Giorgio Arena <giorgio.arena@arm.com> | 2021-11-18 18:02:13 +0000 |
|---|---|---|
| committer | Yair Schwarzbaum <yair.schwarzbaum@arm.com> | 2022-01-12 06:52:04 +0000 |
| commit | 5ae8d804d67f57fbfa793800ddcc21a5aff954dd (patch) | |
| tree | 1defbe7f788645f6f0fb4c3f79be6c4b8ecfb709 /src/cpu/kernels/CpuDirectConv3dKernel.h | |
| parent | 3475ffe40b7db99c782cbaf351aa7b4e341562ef (diff) | |
| download | ComputeLibrary-5ae8d804d67f57fbfa793800ddcc21a5aff954dd.tar.gz | |
Enable kernel selection testing (Phase #1)
Change-Id: I1d65fb9d3a7583cf8d4163ca7c0fbee27dc52633
Signed-off-by: Yair Schwarzbaum <yair.schwarzbaum@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6767
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/cpu/kernels/CpuDirectConv3dKernel.h')
| -rw-r--r-- | src/cpu/kernels/CpuDirectConv3dKernel.h | 22 |
1 files changed, 17 insertions, 5 deletions
diff --git a/src/cpu/kernels/CpuDirectConv3dKernel.h b/src/cpu/kernels/CpuDirectConv3dKernel.h index ff3b30f8ae..6ae70bd3b7 100644 --- a/src/cpu/kernels/CpuDirectConv3dKernel.h +++ b/src/cpu/kernels/CpuDirectConv3dKernel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 Arm Limited. + * Copyright (c) 2021-2022 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -27,6 +27,7 @@ #include "arm_compute/runtime/FunctionDescriptors.h" #include "src/core/common/Macros.h" #include "src/cpu/ICpuKernel.h" + namespace arm_compute { namespace cpu @@ -34,8 +35,12 @@ namespace cpu namespace kernels { /** Interface for the kernel to perform 3D Direct Convolution Layer. */ -class CpuDirectConv3dKernel : public ICpuKernel +class CpuDirectConv3dKernel : public NewICpuKernel<CpuDirectConv3dKernel> { +private: + /* Template function for convolution 3d NDHWC */ + using DirectConv3dKernelPtr = std::add_pointer<void(const ITensor *, const ITensor *, const ITensor *, ITensor *, const Conv3dInfo &, const Window &)>::type; + public: CpuDirectConv3dKernel() = default; ARM_COMPUTE_DISALLOW_COPY_ALLOW_MOVE(CpuDirectConv3dKernel); @@ -71,14 +76,21 @@ public: void run_op(ITensorPack &tensors, const Window &window, const ThreadInfo &info) override; const char *name() const override; -private: - /* Template function for convolution 3d NDHWC */ - using DirectConv3dKernelPtr = std::add_pointer<void(const ITensor *, const ITensor *, const ITensor *, ITensor *, const Conv3dInfo &, const Window &)>::type; + struct DirectConv3dKernel + { + const char *name; + const DataTypeISASelectorPtr is_selected; + DirectConv3dKernelPtr ukernel; + }; + + static const std::vector<DirectConv3dKernel> &get_available_kernels(); +private: Conv3dInfo _conv_info{}; DirectConv3dKernelPtr _run_method{ nullptr }; std::string _name{}; }; + } // namespace kernels } // namespace cpu } // namespace arm_compute |