DirectConv3d support refine

- Decouple data support of CpuDirectConv3dKernel
- Update documentation for Conv3d

Signed-off-by: Sheri Zhang <sheri.zhang@arm.com>
Change-Id: I1d94aa28f821f45a1a3d39cc3335c8faeee89f0d
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6453
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>

1 files changed, 11 insertions, 13 deletions

diff --git a/src/cpu/kernels/CpuDirectConv3dKernel.h b/src/cpu/kernels/CpuDirectConv3dKernel.h
index c7dcb0fb5e..fc64e8518b 100644
--- a/src/cpu/kernels/CpuDirectConv3dKernel.h
+++ b/src/cpu/kernels/CpuDirectConv3dKernel.h
@@ -39,10 +39,7 @@ class CpuDirectConv3dKernel : public ICpuKernel
 public:
     CpuDirectConv3dKernel() = default;
     ARM_COMPUTE_DISALLOW_COPY_ALLOW_MOVE(CpuDirectConv3dKernel);
-    /** Set the src, weights, and dst tensor info.
-     *
-     * Valid data layouts:
-     * - NDHWC
+    /** Set the src, weights, biases and dst tensor info.
      *
      * Valid data type configurations:
      * |src0           |src1               |src2   |dst            |
@@ -50,34 +47,35 @@ public:
      * |F16            |F16                |F16    |F16            |
      * |F32            |F32                |F32    |F32            |
      *
-     * @param[in, out] src       Input tensor info.
-     * @param[in]      weights   Set of kernels to convolve the input volume.
+     * @param[in, out] src0      Input tensor info.
+     * @param[in]      src1      Set of kernels to convolve the input volume.
      *                           The 2nd dimension must be the same as the input's volume 1st dimension.
-     * @param[in]      biases    Set of biases. Can be nullptr.
+     * @param[in]      src2      Set of biases. Can be nullptr.
      * @param[out]     dst       Output tensor info.
      *                           The 1st dimensions must be equal to the 1st dimension of the @p kernels tensor.
      * @param[in]      conv_info Contains padding, stride, acitvation information.
      *
      */
-    void configure(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, ITensorInfo *dst, const Conv3dInfo &conv_info);
+    void configure(const ITensorInfo *src0, const ITensorInfo *src1, const ITensorInfo *src2, ITensorInfo *dst, const Conv3dInfo &conv_info);
     /** Static function to check if given info will lead to a valid configuration
      *
      * Similar to CpuDirectConv3dKernel::configure()
      *
      * @return a status
      */
-    static Status validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *dst, const Conv3dInfo &conv_info);
+    static Status validate(const ITensorInfo *src0, const ITensorInfo *src1, const ITensorInfo *src2, const ITensorInfo *dst, const Conv3dInfo &conv_info);
 
     // Inherited methods overridden:
     void run_op(ITensorPack &tensors, const Window &window, const ThreadInfo &info) override;
     const char *name() const override;
 
 private:
-    /* Template function for convolution NDHWC */
-    template <typename T>
-    void convolve_ndhwc(const Window &window, const ITensor *src, const ITensor *weights, const ITensor *biases, ITensor *dst);
+    /* Template function for convolution 3d NDHWC */
+    using DirectConv3dKernelPtr = std::add_pointer<void(const ITensor *, const ITensor *, const ITensor *, ITensor *, const Conv3dInfo &, const Window &)>::type;
 
-    Conv3dInfo _conv_info{};
+    Conv3dInfo            _conv_info{};
+    DirectConv3dKernelPtr _run_method{ nullptr };
+    std::string           _name{};
 };
 } // namespace kernels
 } // namespace cpu