diff options
| author | Dana Zlotnik <dana.zlotnik@arm.com> | 2022-02-21 13:12:41 +0200 |
|---|---|---|
| committer | Dana Zlotnik <dana.zlotnik@arm.com> | 2022-03-01 11:19:23 +0000 |
| commit | a538ae583c8816f69d05b98c62a9d3092f88f798 (patch) | |
| tree | 33ffb4611e9d660223b50d805ac60babbaba4ebb /src/cpu/kernels/CpuActivationKernel.cpp | |
| parent | ee9050089e391e598cd58e05bc7a07597a6d1db0 (diff) | |
| download | ComputeLibrary-a538ae583c8816f69d05b98c62a9d3092f88f798.tar.gz | |
Multi ISA Technical Debt
* Update json struct meet multi-ISA updates
* Add impl.cpp in kernels where we only have impl.h
Resolves COMPMID-5173
Change-Id: I5da3c4b016a5d0115c4ba46cbfefde7bce518ac1
Signed-off-by: Dana Zlotnik <dana.zlotnik@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/7191
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/cpu/kernels/CpuActivationKernel.cpp')
| -rw-r--r-- | src/cpu/kernels/CpuActivationKernel.cpp | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/src/cpu/kernels/CpuActivationKernel.cpp b/src/cpu/kernels/CpuActivationKernel.cpp index cfe732ab5f..d5112b4ba9 100644 --- a/src/cpu/kernels/CpuActivationKernel.cpp +++ b/src/cpu/kernels/CpuActivationKernel.cpp @@ -46,8 +46,23 @@ namespace static const std::vector<CpuActivationKernel::ActivationKernel> available_kernels = { { + "sve2_qu8_activation", + [](const DataTypeISASelectorData & data) { return data.dt == DataType::QASYMM8 && data.isa.sve2; }, + REGISTER_QASYMM8_SVE2(arm_compute::cpu::sve2_qasymm8_activation) + }, + { + "sve2_qs8_activation", + [](const DataTypeISASelectorData & data) { return data.dt == DataType::QASYMM8_SIGNED && data.isa.sve2; }, + REGISTER_QASYMM8_SIGNED_SVE2(arm_compute::cpu::sve2_qasymm8_signed_activation) + }, + { + "sve2_qs16_activation", + [](const DataTypeISASelectorData & data) { return data.dt == DataType::QSYMM16 && data.isa.sve2; }, + REGISTER_QSYMM16_SVE2(arm_compute::cpu::sve2_qsymm16_activation) + }, + { "sve_fp16_activation", - [](const DataTypeISASelectorData & data) { return data.dt == DataType::F16 && data.isa.sve; }, + [](const DataTypeISASelectorData & data) { return data.dt == DataType::F16 && data.isa.sve && data.isa.fp16; }, REGISTER_FP16_SVE(arm_compute::cpu::sve_fp16_activation) }, { @@ -66,21 +81,6 @@ static const std::vector<CpuActivationKernel::ActivationKernel> available_kernel REGISTER_FP32_NEON(arm_compute::cpu::neon_fp32_activation) }, { - "sve2_qu8_activation", - [](const DataTypeISASelectorData & data) { return data.dt == DataType::QASYMM8 && data.isa.sve2; }, - REGISTER_QASYMM8_SVE2(arm_compute::cpu::sve2_qasymm8_activation) - }, - { - "sve2_qs8_activation", - [](const DataTypeISASelectorData & data) { return data.dt == DataType::QASYMM8_SIGNED && data.isa.sve2; }, - REGISTER_QASYMM8_SIGNED_SVE2(arm_compute::cpu::sve2_qasymm8_signed_activation) - }, - { - "sve2_qs16_activation", - [](const DataTypeISASelectorData & data) { return data.dt == DataType::QSYMM16 && data.isa.sve2; }, - REGISTER_QSYMM16_SVE2(arm_compute::cpu::sve2_qsymm16_activation) - }, - { "neon_qu8_activation", [](const DataTypeISASelectorData & data) { return data.dt == DataType::QASYMM8; }, REGISTER_QASYMM8_NEON(arm_compute::cpu::neon_qasymm8_activation) |