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author | Michalis Spyrou <michalis.spyrou@arm.com> | 2021-06-07 14:23:57 +0100 |
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committer | Georgios Pinitas <georgios.pinitas@arm.com> | 2021-06-23 12:25:50 +0000 |
commit | 20fca524baf99402f742ce38c538f2fd07d5fff9 (patch) | |
tree | b63d98383d1ba22bb3ca59d393e4ab9d47a9c762 /src/core/cpu/kernels/add/sve/qasymm8.cpp | |
parent | 1d359279e22874121def2ce4bfdb633d94ea5ade (diff) | |
download | ComputeLibrary-20fca524baf99402f742ce38c538f2fd07d5fff9.tar.gz |
Create core library using high priority operators
A smaller core library is created using a subset of the operators.
Changed the structure of filelist.json in order to include more
information about the kernels and make the selection easier.
Resolves: COMPMID-4514
Change-Id: I079ca7d8e64346174eebdd13b834e1dd4dc36ca2
Signed-off-by: Michalis Spyrou <michalis.spyrou@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5786
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/core/cpu/kernels/add/sve/qasymm8.cpp')
-rw-r--r-- | src/core/cpu/kernels/add/sve/qasymm8.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/core/cpu/kernels/add/sve/qasymm8.cpp b/src/core/cpu/kernels/add/sve/qasymm8.cpp index f6d1485e61..888ad878ca 100644 --- a/src/core/cpu/kernels/add/sve/qasymm8.cpp +++ b/src/core/cpu/kernels/add/sve/qasymm8.cpp @@ -21,13 +21,13 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ -#if defined(__ARM_FEATURE_SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE2) #include "arm_compute/core/Helpers.h" #include "arm_compute/core/ITensor.h" #include "arm_compute/core/Types.h" #include "arm_compute/core/utils/misc/Traits.h" -#include "src/core/NEON/wrapper/intrinsics/intrinsics.h" #include "src/core/NEON/SVEMath.h" +#include "src/core/NEON/wrapper/intrinsics/intrinsics.h" #include <arm_sve.h> namespace arm_compute @@ -179,4 +179,4 @@ void add_qasymm8_sve(const ITensor *src0, const ITensor *src1, ITensor *dst, con } } // namespace cpu } // namespace arm_compute -#endif /* defined(__ARM_FEATURE_SVE2) */
\ No newline at end of file +#endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */
\ No newline at end of file |