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| author | Georgios Pinitas <georgios.pinitas@arm.com> | 2021-04-22 16:42:03 +0100 |
|---|---|---|
| committer | Michalis Spyrou <michalis.spyrou@arm.com> | 2021-06-07 13:21:17 +0000 |
| commit | bdcdc39d89b6a6556f5c0483af5379f75eae0c55 (patch) | |
| tree | 454cd50afa81da3ca3382701619fef023911e3f7 /src/core/common | |
| parent | 5a643320b79f15a5d09b5366c4744579cf71e303 (diff) | |
| download | ComputeLibrary-bdcdc39d89b6a6556f5c0483af5379f75eae0c55.tar.gz | |
Enable fat binary support
Changes our build system to allow building both Neon(TM) and SVE
kernels and package them in the same binary. This will allow
runtime selection of the underlying architecture.
Adds new build option, fat_binary, for enabling this feature.
Change-Id: I8e8386149773ce28e071a2fb7ddd8c8ae0f28a4a
Signed-off-by: Michalis Spyrou <michalis.spyrou@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5704
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/core/common')
| -rw-r--r-- | src/core/common/Registrars.h | 70 |
1 files changed, 51 insertions, 19 deletions
diff --git a/src/core/common/Registrars.h b/src/core/common/Registrars.h index 112c83ad94..44ddf9808d 100644 --- a/src/core/common/Registrars.h +++ b/src/core/common/Registrars.h @@ -26,17 +26,17 @@ #if defined(ENABLE_FP16_KERNELS) -#if defined(__ARM_FEATURE_SVE) +#if defined(ENABLE_SVE) #define REGISTER_FP16_SVE(func_name) &(func_name) -#else /* !defined(__ARM_FEATURE_SVE) */ +#else /* !defined(ENABLE_SVE) */ #define REGISTER_FP16_SVE(func_name) nullptr -#endif /* defined(__ARM_FEATURE_SVE) */ +#endif /* defined(ENABLE_SVE) */ -#if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) +#if defined(ENABLE_NEON) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) #define REGISTER_FP16_NEON(func_name) &(func_name) -#else /* !defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) */ +#else /* !defined(ENABLE_NEON) */ #define REGISTER_FP16_NEON(func_name) nullptr -#endif /* defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) */ +#endif /* defined(ENABLE_NEON) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) */ #else /* !defined(ENABLE_FP16_KERNELS) */ #define REGISTER_FP16_NEON(func_name) nullptr @@ -44,50 +44,82 @@ #endif /* defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(ENABLE_FP16_KERNELS) */ #if defined(ENABLE_FP32_KERNELS) -#if defined(__ARM_FEATURE_SVE) + +#if defined(ENABLE_SVE) #define REGISTER_FP32_SVE(func_name) &(func_name) -#endif /* defined(__ARM_FEATURE_SVE) */ +#else /* !defined(ENABLE_SVE) */ +#define REGISTER_FP32_SVE(func_name) nullptr +#endif /* defined(ENABLE_SVE) */ + +#if defined(ENABLE_NEON) #define REGISTER_FP32_NEON(func_name) &(func_name) +#else /* !defined(ENABLE_NEON) */ +#define REGISTER_FP32_NEON(func_name) nullptr +#endif /* defined(ENABLE_NEON) */ + #else /* defined(ENABLE_FP32_KERNELS) */ #define REGISTER_FP32_NEON(func_name) nullptr #define REGISTER_FP32_SVE(func_name) nullptr #endif /* defined(ENABLE_FP32_KERNELS) */ #if defined(ENABLE_QASYMM8_SIGNED_KERNELS) -#if defined(__ARM_FEATURE_SVE) -#define REGISTER_QASYMM8_SIGNED_SVE(func_name) &(func_name) -#endif /* defined(__ARM_FEATURE_SVE) */ + #define REGISTER_QASYMM8_SIGNED_NEON(func_name) &(func_name) + +#if defined(ENABLE_SVE) +#define REGISTER_QASYMM8_SIGNED_SVE(func_name) &(func_name) +#else /* !defined(ENABLE_SVE) */ +#define REGISTER_QASYMM8_SIGNED_SVE(func_name) nullptr +#endif /* defined(ENABLE_SVE) */ + #else /* defined(ENABLE_QASYMM8_SIGNED_KERNELS) */ #define REGISTER_QASYMM8_SIGNED_NEON(func_name) nullptr #define REGISTER_QASYMM8_SIGNED_SVE(func_name) nullptr #endif /* defined(ENABLE_QASYMM8_SIGNED_KERNELS) */ #if defined(ENABLE_QASYMM8_KERNELS) -#if defined(__ARM_FEATURE_SVE) -#define REGISTER_QASYMM8_SVE(func_name) &(func_name) -#endif /* defined(__ARM_FEATURE_SVE) */ #define REGISTER_QASYMM8_NEON(func_name) &(func_name) + +#if defined(ENABLE_SVE) +#define REGISTER_QASYMM8_SVE(func_name) &(func_name) +#else /* !defined(ENABLE_SVE) */ +#define REGISTER_QASYMM8_SVE(func_name) nullptr +#endif /* defined(ENABLE_SVE) */ + #else /* defined(ENABLE_QASYMM8_KERNELS) */ #define REGISTER_QASYMM8_NEON(func_name) nullptr #define REGISTER_QASYMM8_SVE(func_name) nullptr #endif /* defined(ENABLE_QASYMM8_KERNELS) */ #if defined(ENABLE_QSYMM16_KERNELS) -#if defined(__ARM_FEATURE_SVE) -#define REGISTER_QSYMM16_SVE(func_name) &(func_name) -#endif /* defined(__ARM_FEATURE_SVE) */ + #define REGISTER_QSYMM16_NEON(func_name) &(func_name) + +#if defined(ENABLE_SVE) +#define REGISTER_QSYMM16_SVE(func_name) &(func_name) +#else /* !defined(ENABLE_SVE) */ +#define REGISTER_QSYMM16_SVE(func_name) nullptr +#endif /* defined(ENABLE_SVE) */ + #else /* defined(ENABLE_QSYMM16_KERNELS) */ #define REGISTER_QSYMM16_NEON(func_name) nullptr #define REGISTER_QSYMM16_SVE(func_name) nullptr #endif /* defined(ENABLE_QSYMM16_KERNELS) */ #if defined(ENABLE_INTEGER_KERNELS) -#if defined(__ARM_FEATURE_SVE) + +#if defined(ENABLE_SVE) #define REGISTER_INTEGER_SVE(func_name) &(func_name) -#endif /* defined(__ARM_FEATURE_SVE) */ +#else /* !defined(ENABLE_SVE) */ +#define REGISTER_INTEGER_SVE(func_name) nullptr +#endif /* defined(ENABLE_SVE) */ + +#if defined(ENABLE_NEON) #define REGISTER_INTEGER_NEON(func_name) &(func_name) +#else /* !defined(ENABLE_NEON) */ +#define REGISTER_INTEGER_NEON(func_name) nullptr +#endif /* defined(ENABLE_NEON) */ + #else /* defined(ENABLE_INTEGER_KERNELS) */ #define REGISTER_INTEGER_NEON(func_name) nullptr #define REGISTER_INTEGER_SVE(func_name) nullptr |