Fixed clang-cl linker errors

* Linker errors caused by the declarations of the DWC functions not matching
  the functions implementation. Changed the functions declaration to
  match the implementation.

* Partially resolves MLCE-996

Change-Id: Ie6458c80bc425deaa6c239828b9f4a2a6646f503
Signed-off-by: Pablo Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/9056
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>

5 files changed, 27 insertions, 27 deletions

diff --git a/src/core/NEON/kernels/convolution/winograd/input_transforms/arm_fp32_1x8.cpp b/src/core/NEON/kernels/convolution/winograd/input_transforms/arm_fp32_1x8.cpp
index f06825a4d1..44f8752a0c 100644
--- a/src/core/NEON/kernels/convolution/winograd/input_transforms/arm_fp32_1x8.cpp
+++ b/src/core/NEON/kernels/convolution/winograd/input_transforms/arm_fp32_1x8.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -30,12 +30,12 @@ namespace winograd {
 namespace input_transform {
 
 void arm_fp32_1x8(
-  const unsigned int n_channels,
-  const float *const input_base,
+  unsigned int n_channels,
+  const float * input_base,
   size_t,  // We don't need to stride over rows
-  const size_t input_col_stride,
+  size_t input_col_stride,
   float *outptr,
-  const size_t matrix_stride
+  size_t matrix_stride
 )
 {
   constexpr int inner_tile_cols = 8;
diff --git a/src/core/NEON/kernels/convolution/winograd/output_transforms/arm_fp32_1x2_1x7.cpp b/src/core/NEON/kernels/convolution/winograd/output_transforms/arm_fp32_1x2_1x7.cpp
index a2b7e9d3d4..bbf0ce58b4 100644
--- a/src/core/NEON/kernels/convolution/winograd/output_transforms/arm_fp32_1x2_1x7.cpp
+++ b/src/core/NEON/kernels/convolution/winograd/output_transforms/arm_fp32_1x2_1x7.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -33,13 +33,13 @@ namespace output_transform {
 void arm_fp32_1x2_1x7(
   unsigned int n_channels,
   const float* inptr,
-  const size_t matrix_stride,
+  size_t matrix_stride,
   const float* bptr,
   float *outptr,
   size_t,  // No need to stride across rows
-  const size_t output_col_stride,
-  const float output_min,
-  const float output_max
+  size_t output_col_stride,
+  float output_min,
+  float output_max
 )
 {
   constexpr auto inner_tile_cols = 8u, output_tile_cols = 2u;
diff --git a/src/core/NEON/kernels/convolution/winograd/output_transforms/arm_fp32_1x4_1x5.cpp b/src/core/NEON/kernels/convolution/winograd/output_transforms/arm_fp32_1x4_1x5.cpp
index 13d42bab59..feb2a5a2c1 100644
--- a/src/core/NEON/kernels/convolution/winograd/output_transforms/arm_fp32_1x4_1x5.cpp
+++ b/src/core/NEON/kernels/convolution/winograd/output_transforms/arm_fp32_1x4_1x5.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -33,13 +33,13 @@ namespace output_transform {
 void arm_fp32_1x4_1x5(
   unsigned int n_channels,
   const float* inptr,
-  const size_t matrix_stride,
+  size_t matrix_stride,
   const float* bptr,
   float *outptr,
   size_t,  // No need to stride across rows
-  const size_t output_col_stride,
-  const float output_min,
-  const float output_max
+  size_t output_col_stride,
+  float output_min,
+  float output_max
 )
 {
   constexpr auto inner_tile_cols = 8u, output_tile_cols = 4u;
diff --git a/src/core/NEON/kernels/convolution/winograd/output_transforms/arm_fp32_1x6_1x3.cpp b/src/core/NEON/kernels/convolution/winograd/output_transforms/arm_fp32_1x6_1x3.cpp
index 47cb50dddb..ffe60e700d 100644
--- a/src/core/NEON/kernels/convolution/winograd/output_transforms/arm_fp32_1x6_1x3.cpp
+++ b/src/core/NEON/kernels/convolution/winograd/output_transforms/arm_fp32_1x6_1x3.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -34,13 +34,13 @@ namespace output_transform {
 void arm_fp32_1x6_1x3(
   unsigned int n_channels,
   const float* inptr,
-  const size_t matrix_stride,
+  size_t matrix_stride,
   const float* bptr,
   float *outptr,
   size_t,  // No need to stride across rows
-  const size_t output_col_stride,
-  const float output_min,
-  const float output_max
+  size_t output_col_stride,
+  float output_min,
+  float output_max
 )
 {
   constexpr unsigned int inner_tile_cols = 8, output_tile_cols = 6;
diff --git a/src/core/NEON/kernels/convolution/winograd/weight_transforms_fp32.cpp b/src/core/NEON/kernels/convolution/winograd/weight_transforms_fp32.cpp
index 63f5fc786c..d12f3c60c0 100644
--- a/src/core/NEON/kernels/convolution/winograd/weight_transforms_fp32.cpp
+++ b/src/core/NEON/kernels/convolution/winograd/weight_transforms_fp32.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -33,12 +33,12 @@ namespace weight_transform {
 #if defined(ARM_COMPUTE_ENABLE_SVE)
 #endif  // defined(ARM_COMPUTE_ENABLE_SVE)
 #endif  // defined(__aarch64__)
-void *arm_fp32_4x4_3x3(unsigned int, const float *, size_t, size_t, float *, size_t);
-void *arm_fp32_2x2_3x3(unsigned int, const float *, size_t, size_t, float *, size_t);
-void *arm_fp32_2x2_5x5(unsigned int, const float *, size_t, size_t, float *, size_t);
-void *cpp_fp32_1x6_1x3(unsigned int, const float *, size_t, size_t, float *, size_t);
-void *cpp_fp32_1x4_1x5(unsigned int, const float *, size_t, size_t, float *, size_t);
-void *cpp_fp32_1x2_1x7(unsigned int, const float *, size_t, size_t, float *, size_t);
+void arm_fp32_4x4_3x3(unsigned int, const float *, size_t, size_t, float *, size_t);
+void arm_fp32_2x2_3x3(unsigned int, const float *, size_t, size_t, float *, size_t);
+void arm_fp32_2x2_5x5(unsigned int, const float *, size_t, size_t, float *, size_t);
+void cpp_fp32_1x6_1x3(unsigned int, const float *, size_t, size_t, float *, size_t);
+void cpp_fp32_1x4_1x5(unsigned int, const float *, size_t, size_t, float *, size_t);
+void cpp_fp32_1x2_1x7(unsigned int, const float *, size_t, size_t, float *, size_t);
 
 #define IMPL(KERN_ROWS, KERN_COLS, TRANS_ROWS, TRANS_COLS, KERN) \
   new Transform<float>(#KERN, KERN_ROWS, KERN_COLS, TRANS_ROWS, TRANS_COLS, KERN)