aboutsummaryrefslogtreecommitdiff
path: root/src/core/NEON/kernels/arm_gemm
diff options
context:
space:
mode:
authorGeorgios Pinitas <georgios.pinitas@arm.com>2020-12-02 16:06:01 +0000
committerGeorgios Pinitas <georgios.pinitas@arm.com>2020-12-03 13:31:20 +0000
commitcd22cbfd02a4fcb49cb40622372a13b865db80ee (patch)
tree7029396e73c117a8a1a9b5b80131c2a8f56d43be /src/core/NEON/kernels/arm_gemm
parent96b16b65dd96351b8af1b2a785856ce13cc8ba84 (diff)
downloadComputeLibrary-cd22cbfd02a4fcb49cb40622372a13b865db80ee.tar.gz
Update GEMV heuristics for quantized types for A53
Switch assembly kernels to dispatch a 4x4 blocked GEMM kernel for A53 when M <= 4 instead of the 8x12 u16 based one. Resolves: COMPMID-3983 Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Change-Id: Ic46a1b51a7c075e46dcb5cd578c75260ded0540c Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4640 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm')
-rw-r--r--src/core/NEON/kernels/arm_gemm/gemm_int8.cpp2
-rw-r--r--src/core/NEON/kernels/arm_gemm/gemm_qint8.cpp2
-rw-r--r--src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp2
-rw-r--r--src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp2
4 files changed, 4 insertions, 4 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/gemm_int8.cpp b/src/core/NEON/kernels/arm_gemm/gemm_int8.cpp
index 31f225002e..f081558c40 100644
--- a/src/core/NEON/kernels/arm_gemm/gemm_int8.cpp
+++ b/src/core/NEON/kernels/arm_gemm/gemm_int8.cpp
@@ -105,7 +105,7 @@ static const GemmImplementation<int8_t, int32_t> gemm_s8_methods[] = {
GemmMethod::GEMM_INTERLEAVED,
"a64_gemm_s16_8x12",
nullptr,
- [](const GemmArgs &args) { return args._ci->get_cpu_model() == CPUModel::A53 && args._Ksize>4; },
+ [](const GemmArgs &args) { return args._ci->get_cpu_model() == CPUModel::A53 && ((args._Msize > 28) || ((args._Msize % 8) > 4)); },
[](const GemmArgs &args) { return new GemmInterleaved<cls_a64_gemm_s16_8x12, int8_t, int32_t>(args); },
},
{
diff --git a/src/core/NEON/kernels/arm_gemm/gemm_qint8.cpp b/src/core/NEON/kernels/arm_gemm/gemm_qint8.cpp
index 05c5116bf3..0ffe8080f4 100644
--- a/src/core/NEON/kernels/arm_gemm/gemm_qint8.cpp
+++ b/src/core/NEON/kernels/arm_gemm/gemm_qint8.cpp
@@ -128,7 +128,7 @@ static const GemmImplementation<int8_t, int8_t, Requantize32> gemm_qint8_methods
GemmMethod::GEMM_INTERLEAVED,
"a64_gemm_s16_8x12",
nullptr,
- [](const GemmArgs &args, const Requantize32 &) { return args._ci->get_cpu_model() == CPUModel::A53; },
+ [](const GemmArgs &args, const Requantize32 &) { return args._ci->get_cpu_model() == CPUModel::A53 && ((args._Msize > 28) || ((args._Msize % 8) > 4)); },
[](const GemmArgs &args, const Requantize32 &qp) { return new GemmInterleavedQuantized<cls_a64_gemm_s16_8x12, int8_t, int8_t>(args, qp); }
},
{
diff --git a/src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp b/src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp
index 7342fda5d1..84628c0c48 100644
--- a/src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp
+++ b/src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp
@@ -118,7 +118,7 @@ static const GemmImplementation<uint8_t, uint8_t, Requantize32> gemm_quint8_meth
GemmMethod::GEMM_INTERLEAVED,
"a64_gemm_u16_8x12",
nullptr,
- [](const GemmArgs &args, const Requantize32 &) { return args._ci->get_cpu_model() == CPUModel::A53; },
+ [](const GemmArgs &args, const Requantize32 &) { return args._ci->get_cpu_model() == CPUModel::A53 && args._Msize > 4; },
[](const GemmArgs &args, const Requantize32 &qp) { return new GemmInterleavedQuantized<cls_a64_gemm_u16_8x12, uint8_t, uint8_t>(args, qp); },
},
{
diff --git a/src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp b/src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp
index c300b8cdf9..7d24ea68d6 100644
--- a/src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp
+++ b/src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp
@@ -106,7 +106,7 @@ static const GemmImplementation<uint8_t, uint32_t> gemm_u8_methods[] = {
GemmMethod::GEMM_INTERLEAVED,
"a64_gemm_u16_8x12",
nullptr,
- [](const GemmArgs &args) { return args._ci->get_cpu_model() == CPUModel::A53; },
+ [](const GemmArgs &args) { return args._ci->get_cpu_model() == CPUModel::A53 && args._Msize > 4; },
[](const GemmArgs &args) { return new GemmInterleaved<cls_a64_gemm_u16_8x12, uint8_t, uint32_t>(args); },
},
{