diff options
author | Georgios Pinitas <georgios.pinitas@arm.com> | 2020-07-02 20:02:20 +0100 |
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committer | Georgios Pinitas <georgios.pinitas@arm.com> | 2020-07-06 16:51:32 +0000 |
commit | 5aa1a0b7ca5eed010e4b297a95b1c4851f741328 (patch) | |
tree | ba882de9e86589dfdd33937d538a89bbdf01c40e /src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_3VLx8/generic.cpp | |
parent | 42550c039105597ff6acd4e5efc0ee3c7c20b08e (diff) | |
download | ComputeLibrary-5aa1a0b7ca5eed010e4b297a95b1c4851f741328.tar.gz |
COMPID-3324: Clean GEMM kernels
Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com>
Change-Id: I170de1671e061a78740caee31fb4a1b8642c1369
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/3505
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_3VLx8/generic.cpp')
-rw-r--r-- | src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_3VLx8/generic.cpp | 32 |
1 files changed, 17 insertions, 15 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_3VLx8/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_3VLx8/generic.cpp index 528fc72005..16cc69b2a6 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_3VLx8/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_3VLx8/generic.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019 Arm Limited. + * Copyright (c) 2019-2020 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -63,13 +63,11 @@ void sve_interleaved_bf16fp32_mmla_3VLx8(const bfloat16 *Apanel, const bfloat16 "mov z16.s, #0\n" "ld1h z6.h, p0/z, [%[b_ptr], #2, MUL VL]\n" "mov z17.s, #0\n" - "ld1rqh z3.h, p0/z, [%[a_ptr], #0x30]\n" + "add %[a_ptr], %[a_ptr], #0x40\n" "mov z18.s, #0\n" - "ld1h z7.h, p0/z, [%[b_ptr], #3, MUL VL]\n" + "addvl %[b_ptr], %[b_ptr], #4\n" "mov z19.s, #0\n" - "add %[a_ptr], %[a_ptr], #0x40\n" "mov z20.s, #0\n" - "addvl %[b_ptr], %[b_ptr], #4\n" "mov z21.s, #0\n" "mov z22.s, #0\n" "mov z23.s, #0\n" @@ -84,12 +82,14 @@ void sve_interleaved_bf16fp32_mmla_3VLx8(const bfloat16 *Apanel, const bfloat16 "cbz %[loops], 1f\n" "2:\n" ".inst 0x6464e408 // bfmmla z8.s, z0.h, z4.h\n" - "subs %[loops], %[loops], #0x1\n" + "ld1h z7.h, p0/z, [%[b_ptr], #-1, MUL VL]\n" ".inst 0x6464e42e // bfmmla z14.s, z1.h, z4.h\n" + "ld1rqh z3.h, p0/z, [%[a_ptr], #-0x10]\n" ".inst 0x6464e454 // bfmmla z20.s, z2.h, z4.h\n" + "subs %[loops], %[loops], #0x1\n" + ".inst 0x6465e409 // bfmmla z9.s, z0.h, z5.h\n" ".inst 0x6464e47a // bfmmla z26.s, z3.h, z4.h\n" "ld1h z4.h, p0/z, [%[b_ptr]]\n" - ".inst 0x6465e409 // bfmmla z9.s, z0.h, z5.h\n" ".inst 0x6465e42f // bfmmla z15.s, z1.h, z5.h\n" ".inst 0x6465e455 // bfmmla z21.s, z2.h, z5.h\n" ".inst 0x6465e47b // bfmmla z27.s, z3.h, z5.h\n" @@ -152,18 +152,18 @@ void sve_interleaved_bf16fp32_mmla_3VLx8(const bfloat16 *Apanel, const bfloat16 ".inst 0x6467e459 // bfmmla z25.s, z2.h, z7.h\n" "ld1rqh z2.h, p0/z, [%[a_ptr], #-0x20]\n" ".inst 0x6467e47f // bfmmla z31.s, z3.h, z7.h\n" - "ld1h z7.h, p0/z, [%[b_ptr], #-1, MUL VL]\n" - "ld1rqh z3.h, p0/z, [%[a_ptr], #-0x10]\n" "b.ne 2b\n" "1:\n" "cbz %[tails], 3f\n" ".inst 0x6464e408 // bfmmla z8.s, z0.h, z4.h\n" + "ld1h z7.h, p0/z, [%[b_ptr], #-1, MUL VL]\n" ".inst 0x6464e42e // bfmmla z14.s, z1.h, z4.h\n" + "ld1rqh z3.h, p0/z, [%[a_ptr], #-0x10]\n" ".inst 0x6464e454 // bfmmla z20.s, z2.h, z4.h\n" - ".inst 0x6464e47a // bfmmla z26.s, z3.h, z4.h\n" - "ld1h z4.h, p0/z, [%[b_ptr]]\n" ".inst 0x6465e409 // bfmmla z9.s, z0.h, z5.h\n" ".inst 0x6465e42f // bfmmla z15.s, z1.h, z5.h\n" + ".inst 0x6464e47a // bfmmla z26.s, z3.h, z4.h\n" + "ld1h z4.h, p0/z, [%[b_ptr]]\n" ".inst 0x6465e455 // bfmmla z21.s, z2.h, z5.h\n" ".inst 0x6465e47b // bfmmla z27.s, z3.h, z5.h\n" "ld1h z5.h, p0/z, [%[b_ptr], #1, MUL VL]\n" @@ -269,15 +269,17 @@ void sve_interleaved_bf16fp32_mmla_3VLx8(const bfloat16 *Apanel, const bfloat16 "b 4f\n" "3:\n" ".inst 0x6464e408 // bfmmla z8.s, z0.h, z4.h\n" - "add %[a_ptr], %[a_ptr], #0x40\n" + "ld1h z7.h, p0/z, [%[b_ptr], #-1, MUL VL]\n" ".inst 0x6464e42e // bfmmla z14.s, z1.h, z4.h\n" - "addvl %[b_ptr], %[b_ptr], #8\n" + "ld1rqh z3.h, p0/z, [%[a_ptr], #-0x10]\n" ".inst 0x6464e454 // bfmmla z20.s, z2.h, z4.h\n" - ".inst 0x6464e47a // bfmmla z26.s, z3.h, z4.h\n" + "add %[a_ptr], %[a_ptr], #0x40\n" ".inst 0x6465e409 // bfmmla z9.s, z0.h, z5.h\n" - "ld1h z4.h, p0/z, [%[b_ptr], #-8, MUL VL]\n" + "addvl %[b_ptr], %[b_ptr], #8\n" + ".inst 0x6464e47a // bfmmla z26.s, z3.h, z4.h\n" ".inst 0x6465e42f // bfmmla z15.s, z1.h, z5.h\n" ".inst 0x6465e455 // bfmmla z21.s, z2.h, z5.h\n" + "ld1h z4.h, p0/z, [%[b_ptr], #-8, MUL VL]\n" ".inst 0x6465e47b // bfmmla z27.s, z3.h, z5.h\n" "ld1h z5.h, p0/z, [%[b_ptr], #-7, MUL VL]\n" ".inst 0x6466e40a // bfmmla z10.s, z0.h, z6.h\n" |