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authorMichael Tyler <michael.tyler@arm.com>2023-04-12 17:43:17 +0100
committermichael.tyler <michael.tyler@arm.com>2023-06-05 15:57:58 +0000
commit74921eee924625426429044decefe3673561b174 (patch)
tree654da1a95e3d42d6af8ad1ff27bb40d77b1fd8c5 /src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_8x1VL/generic.cpp
parentdf5d9878008be9b60586df97ebfff197abb5195e (diff)
downloadComputeLibrary-74921eee924625426429044decefe3673561b174.tar.gz
Update CPU kernel implementations and guard directives
Resolves COMPMID-6023 Change-Id: I868975d14c4f98af6716726feda22405a6a4c891 Signed-off-by: Michael Tyler <michael.tyler@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/9686 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Benchmark: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_8x1VL/generic.cpp')
-rw-r--r--src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_8x1VL/generic.cpp1067
1 files changed, 533 insertions, 534 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_8x1VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_8x1VL/generic.cpp
index 9679d49506..161c85e5f3 100644
--- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_8x1VL/generic.cpp
+++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_8x1VL/generic.cpp
@@ -127,11 +127,11 @@ void sve_hybrid_fp32_mla_8x1VL (
"6:" // Height 1: String loop
"ldr x20, [%x[args_ptr], %[offsetof_string_lengths]]\n"
"ldr w9, [x20, x10, LSL #0x2]\n"
- "ldr x20, [%x[args_ptr], %[offsetof_input_offset]]\n"
+ "ldr x21, [%x[args_ptr], %[offsetof_input_offset]]\n"
"tbz %x[flags], #3, 7f\n"
- "ldr x21, [%x[input_ptr], x10, LSL #0x3]\n"
- "add x21, x21, x20, LSL #3\n"
- "ldr x28, [x21, #0x0]\n"
+ "ldr x20, [%x[input_ptr], x10, LSL #0x3]\n"
+ "add x20, x20, x21, LSL #3\n"
+ "ldr x28, [x20, #0x0]\n"
"cbnz x10, 8f\n"
"ldr x20, [%x[args_ptr], %[offsetof_input_initial_col]]\n"
"add x28, x28, x20, LSL #2\n"
@@ -144,39 +144,39 @@ void sve_hybrid_fp32_mla_8x1VL (
"9:" // Height 1: Multiply loop: Main loop head
"whilelt p0.s, XZR, x9\n"
"ld1rqw { z0.s }, p0/Z, [x28]\n"
- "ld1w { z8.s }, p2/Z, [x12]\n"
- "fmla z24.s, z8.s, z0.s[0]\n"
- "ld1w { z9.s }, p2/Z, [x12, #1, MUL VL]\n"
- "fmla z24.s, z9.s, z0.s[1]\n"
- "ld1w { z10.s }, p2/Z, [x12, #2, MUL VL]\n"
- "fmla z24.s, z10.s, z0.s[2]\n"
- "ld1w { z11.s }, p2/Z, [x12, #3, MUL VL]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z0.s[0]\n"
+ "ld1w { z16.s }, p2/Z, [x12, #1, MUL VL]\n"
+ "fmla z24.s, z16.s, z0.s[1]\n"
+ "ld1w { z16.s }, p2/Z, [x12, #2, MUL VL]\n"
+ "fmla z24.s, z16.s, z0.s[2]\n"
+ "ld1w { z16.s }, p2/Z, [x12, #3, MUL VL]\n"
"sub x9, x9, #0x4\n"
"cmp x9, #0x4\n"
- "fmla z24.s, z11.s, z0.s[3]\n"
+ "fmla z24.s, z16.s, z0.s[3]\n"
"add x28, x28, #0x10\n"
"addvl x12, x12, #4\n"
"bgt 9b\n"
"10:" // Height 1: Multiply loop: Single iteration only
"whilelt p0.s, XZR, x9\n"
"ld1rqw { z0.s }, p0/Z, [x28]\n"
- "ld1w { z8.s }, p2/Z, [x12]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
"subs x9, x9, #0x1\n"
- "fmla z24.s, z8.s, z0.s[0]\n"
+ "fmla z24.s, z16.s, z0.s[0]\n"
"addvl x12, x12, #1\n"
"ble 11f\n"
- "ld1w { z9.s }, p2/Z, [x12]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
"subs x9, x9, #0x1\n"
- "fmla z24.s, z9.s, z0.s[1]\n"
+ "fmla z24.s, z16.s, z0.s[1]\n"
"addvl x12, x12, #1\n"
"ble 11f\n"
- "ld1w { z10.s }, p2/Z, [x12]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
"subs x9, x9, #0x1\n"
- "fmla z24.s, z10.s, z0.s[2]\n"
+ "fmla z24.s, z16.s, z0.s[2]\n"
"addvl x12, x12, #1\n"
"ble 11f\n"
- "ld1w { z11.s }, p2/Z, [x12]\n"
- "fmla z24.s, z11.s, z0.s[3]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z0.s[3]\n"
"addvl x12, x12, #1\n"
"11:" // Height 1: Multiply loop: multiply skip
"ldr w20, [%x[args_ptr], %[offsetof_num_strings]]\n"
@@ -214,9 +214,9 @@ void sve_hybrid_fp32_mla_8x1VL (
"16:" // Height 2: no bias
"tbz %x[flags], #0, 17f\n"
"ldr x20, [%x[args_ptr], %[offsetof_output_offset]]\n"
- "add x27, x11, x20, LSL #2\n"
+ "add x20, x11, x20, LSL #2\n"
"ld1w { z24.s }, p1/Z, [x11]\n"
- "ld1w { z25.s }, p1/Z, [x27]\n"
+ "ld1w { z25.s }, p1/Z, [x20]\n"
"b 18f\n"
"17:" // Height 2: no accumulate
"mov z24.b, #0x0\n"
@@ -226,12 +226,12 @@ void sve_hybrid_fp32_mla_8x1VL (
"19:" // Height 2: String loop
"ldr x20, [%x[args_ptr], %[offsetof_string_lengths]]\n"
"ldr w9, [x20, x10, LSL #0x2]\n"
- "ldr x20, [%x[args_ptr], %[offsetof_input_offset]]\n"
+ "ldr x21, [%x[args_ptr], %[offsetof_input_offset]]\n"
"tbz %x[flags], #3, 20f\n"
- "ldr x21, [%x[input_ptr], x10, LSL #0x3]\n"
- "add x21, x21, x20, LSL #3\n"
- "ldr x28, [x21, #0x0]\n"
- "ldr x27, [x21, #0x8]\n"
+ "ldr x20, [%x[input_ptr], x10, LSL #0x3]\n"
+ "add x20, x20, x21, LSL #3\n"
+ "ldr x28, [x20, #0x0]\n"
+ "ldr x27, [x20, #0x8]\n"
"cbnz x10, 21f\n"
"ldr x20, [%x[args_ptr], %[offsetof_input_initial_col]]\n"
"add x28, x28, x20, LSL #2\n"
@@ -239,29 +239,29 @@ void sve_hybrid_fp32_mla_8x1VL (
"b 21f\n"
"20:" // Height 2: setup direct input
"mov x28, %x[input_ptr]\n"
- "add x27, x28, x20, LSL #2\n"
+ "add x27, x28, x21, LSL #2\n"
"21:" // Height 2: input setup done
"cmp x9, #0x4\n"
"ble 23f\n"
"22:" // Height 2: Multiply loop: Main loop head
"whilelt p0.s, XZR, x9\n"
- "ld1rqw { z0.s }, p0/Z, [x28]\n"
- "ld1rqw { z1.s }, p0/Z, [x27]\n"
+ "ld1rqw { z1.s }, p0/Z, [x28]\n"
+ "ld1rqw { z0.s }, p0/Z, [x27]\n"
"sub x9, x9, #0x4\n"
- "ld1w { z8.s }, p2/Z, [x12]\n"
- "fmla z24.s, z8.s, z0.s[0]\n"
- "fmla z25.s, z8.s, z1.s[0]\n"
- "ld1w { z9.s }, p2/Z, [x12, #1, MUL VL]\n"
- "fmla z24.s, z9.s, z0.s[1]\n"
- "fmla z25.s, z9.s, z1.s[1]\n"
- "ld1w { z10.s }, p2/Z, [x12, #2, MUL VL]\n"
- "ld1w { z11.s }, p2/Z, [x12, #3, MUL VL]\n"
- "fmla z24.s, z10.s, z0.s[2]\n"
- "fmla z25.s, z10.s, z1.s[2]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z1.s[0]\n"
+ "fmla z25.s, z16.s, z0.s[0]\n"
+ "ld1w { z16.s }, p2/Z, [x12, #1, MUL VL]\n"
+ "fmla z24.s, z16.s, z1.s[1]\n"
+ "fmla z25.s, z16.s, z0.s[1]\n"
+ "ld1w { z17.s }, p2/Z, [x12, #2, MUL VL]\n"
+ "ld1w { z16.s }, p2/Z, [x12, #3, MUL VL]\n"
+ "fmla z24.s, z17.s, z1.s[2]\n"
+ "fmla z25.s, z17.s, z0.s[2]\n"
"cmp x9, #0x4\n"
"add x28, x28, #0x10\n"
- "fmla z24.s, z11.s, z0.s[3]\n"
- "fmla z25.s, z11.s, z1.s[3]\n"
+ "fmla z24.s, z16.s, z1.s[3]\n"
+ "fmla z25.s, z16.s, z0.s[3]\n"
"add x27, x27, #0x10\n"
"addvl x12, x12, #4\n"
"bgt 22b\n"
@@ -270,26 +270,26 @@ void sve_hybrid_fp32_mla_8x1VL (
"ld1rqw { z0.s }, p0/Z, [x28]\n"
"ld1rqw { z1.s }, p0/Z, [x27]\n"
"subs x9, x9, #0x1\n"
- "ld1w { z8.s }, p2/Z, [x12]\n"
- "fmla z24.s, z8.s, z0.s[0]\n"
- "fmla z25.s, z8.s, z1.s[0]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z0.s[0]\n"
+ "fmla z25.s, z16.s, z1.s[0]\n"
"addvl x12, x12, #1\n"
"ble 24f\n"
- "ld1w { z9.s }, p2/Z, [x12]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
"subs x9, x9, #0x1\n"
- "fmla z24.s, z9.s, z0.s[1]\n"
- "fmla z25.s, z9.s, z1.s[1]\n"
+ "fmla z24.s, z16.s, z0.s[1]\n"
+ "fmla z25.s, z16.s, z1.s[1]\n"
"addvl x12, x12, #1\n"
"ble 24f\n"
- "ld1w { z10.s }, p2/Z, [x12]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
"subs x9, x9, #0x1\n"
- "fmla z24.s, z10.s, z0.s[2]\n"
- "fmla z25.s, z10.s, z1.s[2]\n"
+ "fmla z24.s, z16.s, z0.s[2]\n"
+ "fmla z25.s, z16.s, z1.s[2]\n"
"addvl x12, x12, #1\n"
"ble 24f\n"
- "ld1w { z11.s }, p2/Z, [x12]\n"
- "fmla z24.s, z11.s, z0.s[3]\n"
- "fmla z25.s, z11.s, z1.s[3]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z0.s[3]\n"
+ "fmla z25.s, z16.s, z1.s[3]\n"
"addvl x12, x12, #1\n"
"24:" // Height 2: Multiply loop: multiply skip
"ldr w20, [%x[args_ptr], %[offsetof_num_strings]]\n"
@@ -333,11 +333,11 @@ void sve_hybrid_fp32_mla_8x1VL (
"29:" // Height 3: no bias
"tbz %x[flags], #0, 30f\n"
"ldr x20, [%x[args_ptr], %[offsetof_output_offset]]\n"
- "add x27, x11, x20, LSL #2\n"
- "add x26, x27, x20, LSL #2\n"
+ "add x21, x11, x20, LSL #2\n"
+ "add x20, x21, x20, LSL #2\n"
"ld1w { z24.s }, p1/Z, [x11]\n"
- "ld1w { z25.s }, p1/Z, [x27]\n"
- "ld1w { z26.s }, p1/Z, [x26]\n"
+ "ld1w { z25.s }, p1/Z, [x21]\n"
+ "ld1w { z26.s }, p1/Z, [x20]\n"
"b 31f\n"
"30:" // Height 3: no accumulate
"mov z24.b, #0x0\n"
@@ -348,13 +348,13 @@ void sve_hybrid_fp32_mla_8x1VL (
"32:" // Height 3: String loop
"ldr x20, [%x[args_ptr], %[offsetof_string_lengths]]\n"
"ldr w9, [x20, x10, LSL #0x2]\n"
- "ldr x20, [%x[args_ptr], %[offsetof_input_offset]]\n"
+ "ldr x21, [%x[args_ptr], %[offsetof_input_offset]]\n"
"tbz %x[flags], #3, 33f\n"
- "ldr x21, [%x[input_ptr], x10, LSL #0x3]\n"
- "add x21, x21, x20, LSL #3\n"
- "ldr x28, [x21, #0x0]\n"
- "ldr x27, [x21, #0x8]\n"
- "ldr x26, [x21, #0x10]\n"
+ "ldr x20, [%x[input_ptr], x10, LSL #0x3]\n"
+ "add x20, x20, x21, LSL #3\n"
+ "ldr x28, [x20, #0x0]\n"
+ "ldr x27, [x20, #0x8]\n"
+ "ldr x26, [x20, #0x10]\n"
"cbnz x10, 34f\n"
"ldr x20, [%x[args_ptr], %[offsetof_input_initial_col]]\n"
"add x28, x28, x20, LSL #2\n"
@@ -363,38 +363,38 @@ void sve_hybrid_fp32_mla_8x1VL (
"b 34f\n"
"33:" // Height 3: setup direct input
"mov x28, %x[input_ptr]\n"
- "add x27, x28, x20, LSL #2\n"
- "add x26, x27, x20, LSL #2\n"
+ "add x27, x28, x21, LSL #2\n"
+ "add x26, x27, x21, LSL #2\n"
"34:" // Height 3: input setup done
"cmp x9, #0x4\n"
"ble 36f\n"
"35:" // Height 3: Multiply loop: Main loop head
"whilelt p0.s, XZR, x9\n"
- "ld1rqw { z0.s }, p0/Z, [x28]\n"
+ "ld1rqw { z2.s }, p0/Z, [x28]\n"
"ld1rqw { z1.s }, p0/Z, [x27]\n"
"sub x9, x9, #0x4\n"
- "ld1rqw { z2.s }, p0/Z, [x26]\n"
- "ld1w { z8.s }, p2/Z, [x12]\n"
- "fmla z24.s, z8.s, z0.s[0]\n"
- "fmla z25.s, z8.s, z1.s[0]\n"
- "fmla z26.s, z8.s, z2.s[0]\n"
- "ld1w { z9.s }, p2/Z, [x12, #1, MUL VL]\n"
- "fmla z24.s, z9.s, z0.s[1]\n"
- "ld1w { z10.s }, p2/Z, [x12, #2, MUL VL]\n"
- "fmla z25.s, z9.s, z1.s[1]\n"
- "fmla z26.s, z9.s, z2.s[1]\n"
- "ld1w { z11.s }, p2/Z, [x12, #3, MUL VL]\n"
+ "ld1rqw { z0.s }, p0/Z, [x26]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z2.s[0]\n"
+ "fmla z25.s, z16.s, z1.s[0]\n"
+ "fmla z26.s, z16.s, z0.s[0]\n"
+ "ld1w { z16.s }, p2/Z, [x12, #1, MUL VL]\n"
+ "fmla z24.s, z16.s, z2.s[1]\n"
+ "ld1w { z17.s }, p2/Z, [x12, #2, MUL VL]\n"
+ "fmla z25.s, z16.s, z1.s[1]\n"
+ "fmla z26.s, z16.s, z0.s[1]\n"
+ "ld1w { z16.s }, p2/Z, [x12, #3, MUL VL]\n"
"cmp x9, #0x4\n"
- "fmla z24.s, z10.s, z0.s[2]\n"
- "fmla z25.s, z10.s, z1.s[2]\n"
+ "fmla z24.s, z17.s, z2.s[2]\n"
+ "fmla z25.s, z17.s, z1.s[2]\n"
"add x28, x28, #0x10\n"
"add x27, x27, #0x10\n"
- "fmla z26.s, z10.s, z2.s[2]\n"
- "fmla z24.s, z11.s, z0.s[3]\n"
+ "fmla z26.s, z17.s, z0.s[2]\n"
+ "fmla z24.s, z16.s, z2.s[3]\n"
"add x26, x26, #0x10\n"
"addvl x12, x12, #4\n"
- "fmla z25.s, z11.s, z1.s[3]\n"
- "fmla z26.s, z11.s, z2.s[3]\n"
+ "fmla z25.s, z16.s, z1.s[3]\n"
+ "fmla z26.s, z16.s, z0.s[3]\n"
"bgt 35b\n"
"36:" // Height 3: Multiply loop: Single iteration only
"whilelt p0.s, XZR, x9\n"
@@ -402,31 +402,31 @@ void sve_hybrid_fp32_mla_8x1VL (
"ld1rqw { z1.s }, p0/Z, [x27]\n"
"subs x9, x9, #0x1\n"
"ld1rqw { z2.s }, p0/Z, [x26]\n"
- "ld1w { z8.s }, p2/Z, [x12]\n"
- "fmla z24.s, z8.s, z0.s[0]\n"
- "fmla z25.s, z8.s, z1.s[0]\n"
- "fmla z26.s, z8.s, z2.s[0]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z0.s[0]\n"
+ "fmla z25.s, z16.s, z1.s[0]\n"
+ "fmla z26.s, z16.s, z2.s[0]\n"
"addvl x12, x12, #1\n"
"ble 37f\n"
- "ld1w { z9.s }, p2/Z, [x12]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
"subs x9, x9, #0x1\n"
- "fmla z24.s, z9.s, z0.s[1]\n"
- "fmla z25.s, z9.s, z1.s[1]\n"
- "fmla z26.s, z9.s, z2.s[1]\n"
+ "fmla z24.s, z16.s, z0.s[1]\n"
+ "fmla z25.s, z16.s, z1.s[1]\n"
+ "fmla z26.s, z16.s, z2.s[1]\n"
"addvl x12, x12, #1\n"
"ble 37f\n"
- "ld1w { z10.s }, p2/Z, [x12]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
"subs x9, x9, #0x1\n"
- "fmla z24.s, z10.s, z0.s[2]\n"
- "fmla z25.s, z10.s, z1.s[2]\n"
- "fmla z26.s, z10.s, z2.s[2]\n"
+ "fmla z24.s, z16.s, z0.s[2]\n"
+ "fmla z25.s, z16.s, z1.s[2]\n"
+ "fmla z26.s, z16.s, z2.s[2]\n"
"addvl x12, x12, #1\n"
"ble 37f\n"
- "ld1w { z11.s }, p2/Z, [x12]\n"
- "fmla z24.s, z11.s, z0.s[3]\n"
- "fmla z25.s, z11.s, z1.s[3]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z0.s[3]\n"
+ "fmla z25.s, z16.s, z1.s[3]\n"
"addvl x12, x12, #1\n"
- "fmla z26.s, z11.s, z2.s[3]\n"
+ "fmla z26.s, z16.s, z2.s[3]\n"
"37:" // Height 3: Multiply loop: multiply skip
"ldr w20, [%x[args_ptr], %[offsetof_num_strings]]\n"
"add x10, x10, #0x1\n"
@@ -474,13 +474,13 @@ void sve_hybrid_fp32_mla_8x1VL (
"42:" // Height 4: no bias
"tbz %x[flags], #0, 43f\n"
"ldr x20, [%x[args_ptr], %[offsetof_output_offset]]\n"
- "add x27, x11, x20, LSL #2\n"
- "add x26, x27, x20, LSL #2\n"
+ "add x22, x11, x20, LSL #2\n"
+ "add x21, x22, x20, LSL #2\n"
"ld1w { z24.s }, p1/Z, [x11]\n"
- "add x25, x26, x20, LSL #2\n"
- "ld1w { z25.s }, p1/Z, [x27]\n"
- "ld1w { z26.s }, p1/Z, [x26]\n"
- "ld1w { z27.s }, p1/Z, [x25]\n"
+ "add x20, x21, x20, LSL #2\n"
+ "ld1w { z25.s }, p1/Z, [x22]\n"
+ "ld1w { z26.s }, p1/Z, [x21]\n"
+ "ld1w { z27.s }, p1/Z, [x20]\n"
"b 44f\n"
"43:" // Height 4: no accumulate
"mov z24.b, #0x0\n"
@@ -492,14 +492,14 @@ void sve_hybrid_fp32_mla_8x1VL (
"45:" // Height 4: String loop
"ldr x20, [%x[args_ptr], %[offsetof_string_lengths]]\n"
"ldr w9, [x20, x10, LSL #0x2]\n"
- "ldr x20, [%x[args_ptr], %[offsetof_input_offset]]\n"
+ "ldr x21, [%x[args_ptr], %[offsetof_input_offset]]\n"
"tbz %x[flags], #3, 46f\n"
- "ldr x21, [%x[input_ptr], x10, LSL #0x3]\n"
- "add x21, x21, x20, LSL #3\n"
- "ldr x28, [x21, #0x0]\n"
- "ldr x27, [x21, #0x8]\n"
- "ldr x26, [x21, #0x10]\n"
- "ldr x25, [x21, #0x18]\n"
+ "ldr x20, [%x[input_ptr], x10, LSL #0x3]\n"
+ "add x20, x20, x21, LSL #3\n"
+ "ldr x28, [x20, #0x0]\n"
+ "ldr x27, [x20, #0x8]\n"
+ "ldr x26, [x20, #0x10]\n"
+ "ldr x25, [x20, #0x18]\n"
"cbnz x10, 47f\n"
"ldr x20, [%x[args_ptr], %[offsetof_input_initial_col]]\n"
"add x28, x28, x20, LSL #2\n"
@@ -509,45 +509,45 @@ void sve_hybrid_fp32_mla_8x1VL (
"b 47f\n"
"46:" // Height 4: setup direct input
"mov x28, %x[input_ptr]\n"
- "add x27, x28, x20, LSL #2\n"
- "add x26, x27, x20, LSL #2\n"
- "add x25, x26, x20, LSL #2\n"
+ "add x27, x28, x21, LSL #2\n"
+ "add x26, x27, x21, LSL #2\n"
+ "add x25, x26, x21, LSL #2\n"
"47:" // Height 4: input setup done
"cmp x9, #0x4\n"
"ble 49f\n"
"48:" // Height 4: Multiply loop: Main loop head
"whilelt p0.s, XZR, x9\n"
- "ld1rqw { z0.s }, p0/Z, [x28]\n"
- "ld1rqw { z1.s }, p0/Z, [x27]\n"
+ "ld1rqw { z3.s }, p0/Z, [x28]\n"
+ "ld1rqw { z2.s }, p0/Z, [x27]\n"
"sub x9, x9, #0x4\n"
- "ld1rqw { z2.s }, p0/Z, [x26]\n"
- "ld1rqw { z3.s }, p0/Z, [x25]\n"
+ "ld1rqw { z1.s }, p0/Z, [x26]\n"
+ "ld1rqw { z0.s }, p0/Z, [x25]\n"
"cmp x9, #0x4\n"
"add x28, x28, #0x10\n"
- "ld1w { z8.s }, p2/Z, [x12]\n"
- "fmla z24.s, z8.s, z0.s[0]\n"
- "fmla z25.s, z8.s, z1.s[0]\n"
- "ld1w { z9.s }, p2/Z, [x12, #1, MUL VL]\n"
- "fmla z26.s, z8.s, z2.s[0]\n"
- "fmla z27.s, z8.s, z3.s[0]\n"
- "ld1w { z10.s }, p2/Z, [x12, #2, MUL VL]\n"
- "ld1w { z11.s }, p2/Z, [x12, #3, MUL VL]\n"
- "fmla z24.s, z9.s, z0.s[1]\n"
- "fmla z25.s, z9.s, z1.s[1]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z3.s[0]\n"
+ "fmla z25.s, z16.s, z2.s[0]\n"
+ "ld1w { z18.s }, p2/Z, [x12, #1, MUL VL]\n"
+ "fmla z26.s, z16.s, z1.s[0]\n"
+ "fmla z27.s, z16.s, z0.s[0]\n"
+ "ld1w { z17.s }, p2/Z, [x12, #2, MUL VL]\n"
+ "ld1w { z16.s }, p2/Z, [x12, #3, MUL VL]\n"
+ "fmla z24.s, z18.s, z3.s[1]\n"
+ "fmla z25.s, z18.s, z2.s[1]\n"
"add x27, x27, #0x10\n"
"add x26, x26, #0x10\n"
- "fmla z26.s, z9.s, z2.s[1]\n"
- "fmla z27.s, z9.s, z3.s[1]\n"
+ "fmla z26.s, z18.s, z1.s[1]\n"
+ "fmla z27.s, z18.s, z0.s[1]\n"
"add x25, x25, #0x10\n"
"addvl x12, x12, #4\n"
- "fmla z24.s, z10.s, z0.s[2]\n"
- "fmla z25.s, z10.s, z1.s[2]\n"
- "fmla z26.s, z10.s, z2.s[2]\n"
- "fmla z27.s, z10.s, z3.s[2]\n"
- "fmla z24.s, z11.s, z0.s[3]\n"
- "fmla z25.s, z11.s, z1.s[3]\n"
- "fmla z26.s, z11.s, z2.s[3]\n"
- "fmla z27.s, z11.s, z3.s[3]\n"
+ "fmla z24.s, z17.s, z3.s[2]\n"
+ "fmla z25.s, z17.s, z2.s[2]\n"
+ "fmla z26.s, z17.s, z1.s[2]\n"
+ "fmla z27.s, z17.s, z0.s[2]\n"
+ "fmla z24.s, z16.s, z3.s[3]\n"
+ "fmla z25.s, z16.s, z2.s[3]\n"
+ "fmla z26.s, z16.s, z1.s[3]\n"
+ "fmla z27.s, z16.s, z0.s[3]\n"
"bgt 48b\n"
"49:" // Height 4: Multiply loop: Single iteration only
"whilelt p0.s, XZR, x9\n"
@@ -556,35 +556,35 @@ void sve_hybrid_fp32_mla_8x1VL (
"subs x9, x9, #0x1\n"
"ld1rqw { z2.s }, p0/Z, [x26]\n"
"ld1rqw { z3.s }, p0/Z, [x25]\n"
- "ld1w { z8.s }, p2/Z, [x12]\n"
- "fmla z24.s, z8.s, z0.s[0]\n"
- "fmla z25.s, z8.s, z1.s[0]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z0.s[0]\n"
+ "fmla z25.s, z16.s, z1.s[0]\n"
"addvl x12, x12, #1\n"
- "fmla z26.s, z8.s, z2.s[0]\n"
- "fmla z27.s, z8.s, z3.s[0]\n"
+ "fmla z26.s, z16.s, z2.s[0]\n"
+ "fmla z27.s, z16.s, z3.s[0]\n"
"ble 50f\n"
- "ld1w { z9.s }, p2/Z, [x12]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
"subs x9, x9, #0x1\n"
- "fmla z24.s, z9.s, z0.s[1]\n"
- "fmla z25.s, z9.s, z1.s[1]\n"
- "fmla z26.s, z9.s, z2.s[1]\n"
- "fmla z27.s, z9.s, z3.s[1]\n"
+ "fmla z24.s, z16.s, z0.s[1]\n"
+ "fmla z25.s, z16.s, z1.s[1]\n"
+ "fmla z26.s, z16.s, z2.s[1]\n"
+ "fmla z27.s, z16.s, z3.s[1]\n"
"addvl x12, x12, #1\n"
"ble 50f\n"
- "ld1w { z10.s }, p2/Z, [x12]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
"subs x9, x9, #0x1\n"
- "fmla z24.s, z10.s, z0.s[2]\n"
- "fmla z25.s, z10.s, z1.s[2]\n"
- "fmla z26.s, z10.s, z2.s[2]\n"
- "fmla z27.s, z10.s, z3.s[2]\n"
+ "fmla z24.s, z16.s, z0.s[2]\n"
+ "fmla z25.s, z16.s, z1.s[2]\n"
+ "fmla z26.s, z16.s, z2.s[2]\n"
+ "fmla z27.s, z16.s, z3.s[2]\n"
"addvl x12, x12, #1\n"
"ble 50f\n"
- "ld1w { z11.s }, p2/Z, [x12]\n"
- "fmla z24.s, z11.s, z0.s[3]\n"
- "fmla z25.s, z11.s, z1.s[3]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z0.s[3]\n"
+ "fmla z25.s, z16.s, z1.s[3]\n"
"addvl x12, x12, #1\n"
- "fmla z26.s, z11.s, z2.s[3]\n"
- "fmla z27.s, z11.s, z3.s[3]\n"
+ "fmla z26.s, z16.s, z2.s[3]\n"
+ "fmla z27.s, z16.s, z3.s[3]\n"
"50:" // Height 4: Multiply loop: multiply skip
"ldr w20, [%x[args_ptr], %[offsetof_num_strings]]\n"
"add x10, x10, #0x1\n"
@@ -637,15 +637,15 @@ void sve_hybrid_fp32_mla_8x1VL (
"55:" // Height 5: no bias
"tbz %x[flags], #0, 56f\n"
"ldr x20, [%x[args_ptr], %[offsetof_output_offset]]\n"
- "add x27, x11, x20, LSL #2\n"
- "add x26, x27, x20, LSL #2\n"
+ "add x23, x11, x20, LSL #2\n"
+ "add x22, x23, x20, LSL #2\n"
"ld1w { z24.s }, p1/Z, [x11]\n"
- "add x25, x26, x20, LSL #2\n"
- "add x24, x25, x20, LSL #2\n"
- "ld1w { z25.s }, p1/Z, [x27]\n"
- "ld1w { z26.s }, p1/Z, [x26]\n"
- "ld1w { z27.s }, p1/Z, [x25]\n"
- "ld1w { z28.s }, p1/Z, [x24]\n"
+ "add x21, x22, x20, LSL #2\n"
+ "add x20, x21, x20, LSL #2\n"
+ "ld1w { z25.s }, p1/Z, [x23]\n"
+ "ld1w { z26.s }, p1/Z, [x22]\n"
+ "ld1w { z27.s }, p1/Z, [x21]\n"
+ "ld1w { z28.s }, p1/Z, [x20]\n"
"b 57f\n"
"56:" // Height 5: no accumulate
"mov z24.b, #0x0\n"
@@ -658,15 +658,15 @@ void sve_hybrid_fp32_mla_8x1VL (
"58:" // Height 5: String loop
"ldr x20, [%x[args_ptr], %[offsetof_string_lengths]]\n"
"ldr w9, [x20, x10, LSL #0x2]\n"
- "ldr x20, [%x[args_ptr], %[offsetof_input_offset]]\n"
+ "ldr x21, [%x[args_ptr], %[offsetof_input_offset]]\n"
"tbz %x[flags], #3, 59f\n"
- "ldr x21, [%x[input_ptr], x10, LSL #0x3]\n"
- "add x21, x21, x20, LSL #3\n"
- "ldr x28, [x21, #0x0]\n"
- "ldr x27, [x21, #0x8]\n"
- "ldr x26, [x21, #0x10]\n"
- "ldr x25, [x21, #0x18]\n"
- "ldr x24, [x21, #0x20]\n"
+ "ldr x20, [%x[input_ptr], x10, LSL #0x3]\n"
+ "add x20, x20, x21, LSL #3\n"
+ "ldr x28, [x20, #0x0]\n"
+ "ldr x27, [x20, #0x8]\n"
+ "ldr x26, [x20, #0x10]\n"
+ "ldr x25, [x20, #0x18]\n"
+ "ldr x24, [x20, #0x20]\n"
"cbnz x10, 60f\n"
"ldr x20, [%x[args_ptr], %[offsetof_input_initial_col]]\n"
"add x28, x28, x20, LSL #2\n"
@@ -677,52 +677,52 @@ void sve_hybrid_fp32_mla_8x1VL (
"b 60f\n"
"59:" // Height 5: setup direct input
"mov x28, %x[input_ptr]\n"
- "add x27, x28, x20, LSL #2\n"
- "add x26, x27, x20, LSL #2\n"
- "add x25, x26, x20, LSL #2\n"
- "add x24, x25, x20, LSL #2\n"
+ "add x27, x28, x21, LSL #2\n"
+ "add x26, x27, x21, LSL #2\n"
+ "add x25, x26, x21, LSL #2\n"
+ "add x24, x25, x21, LSL #2\n"
"60:" // Height 5: input setup done
"cmp x9, #0x4\n"
"ble 62f\n"
"61:" // Height 5: Multiply loop: Main loop head
"whilelt p0.s, XZR, x9\n"
- "ld1rqw { z0.s }, p0/Z, [x28]\n"
- "ld1rqw { z1.s }, p0/Z, [x27]\n"
+ "ld1rqw { z4.s }, p0/Z, [x28]\n"
+ "ld1rqw { z3.s }, p0/Z, [x27]\n"
"sub x9, x9, #0x4\n"
"ld1rqw { z2.s }, p0/Z, [x26]\n"
- "ld1rqw { z3.s }, p0/Z, [x25]\n"
+ "ld1rqw { z1.s }, p0/Z, [x25]\n"
"cmp x9, #0x4\n"
"add x28, x28, #0x10\n"
- "ld1rqw { z4.s }, p0/Z, [x24]\n"
- "ld1w { z8.s }, p2/Z, [x12]\n"
- "fmla z24.s, z8.s, z0.s[0]\n"
- "fmla z25.s, z8.s, z1.s[0]\n"
- "fmla z26.s, z8.s, z2.s[0]\n"
- "fmla z27.s, z8.s, z3.s[0]\n"
- "ld1w { z9.s }, p2/Z, [x12, #1, MUL VL]\n"
- "ld1w { z10.s }, p2/Z, [x12, #2, MUL VL]\n"
- "fmla z28.s, z8.s, z4.s[0]\n"
- "fmla z24.s, z9.s, z0.s[1]\n"
- "ld1w { z11.s }, p2/Z, [x12, #3, MUL VL]\n"
+ "ld1rqw { z0.s }, p0/Z, [x24]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z4.s[0]\n"
+ "fmla z25.s, z16.s, z3.s[0]\n"
+ "fmla z26.s, z16.s, z2.s[0]\n"
+ "fmla z27.s, z16.s, z1.s[0]\n"
+ "ld1w { z18.s }, p2/Z, [x12, #1, MUL VL]\n"
+ "ld1w { z17.s }, p2/Z, [x12, #2, MUL VL]\n"
+ "fmla z28.s, z16.s, z0.s[0]\n"
+ "fmla z24.s, z18.s, z4.s[1]\n"
+ "ld1w { z16.s }, p2/Z, [x12, #3, MUL VL]\n"
"add x27, x27, #0x10\n"
- "fmla z25.s, z9.s, z1.s[1]\n"
- "fmla z26.s, z9.s, z2.s[1]\n"
+ "fmla z25.s, z18.s, z3.s[1]\n"
+ "fmla z26.s, z18.s, z2.s[1]\n"
"add x26, x26, #0x10\n"
"add x25, x25, #0x10\n"
- "fmla z27.s, z9.s, z3.s[1]\n"
- "fmla z28.s, z9.s, z4.s[1]\n"
+ "fmla z27.s, z18.s, z1.s[1]\n"
+ "fmla z28.s, z18.s, z0.s[1]\n"
"add x24, x24, #0x10\n"
"addvl x12, x12, #4\n"
- "fmla z24.s, z10.s, z0.s[2]\n"
- "fmla z25.s, z10.s, z1.s[2]\n"
- "fmla z26.s, z10.s, z2.s[2]\n"
- "fmla z27.s, z10.s, z3.s[2]\n"
- "fmla z28.s, z10.s, z4.s[2]\n"
- "fmla z24.s, z11.s, z0.s[3]\n"
- "fmla z25.s, z11.s, z1.s[3]\n"
- "fmla z26.s, z11.s, z2.s[3]\n"
- "fmla z27.s, z11.s, z3.s[3]\n"
- "fmla z28.s, z11.s, z4.s[3]\n"
+ "fmla z24.s, z17.s, z4.s[2]\n"
+ "fmla z25.s, z17.s, z3.s[2]\n"
+ "fmla z26.s, z17.s, z2.s[2]\n"
+ "fmla z27.s, z17.s, z1.s[2]\n"
+ "fmla z28.s, z17.s, z0.s[2]\n"
+ "fmla z24.s, z16.s, z4.s[3]\n"
+ "fmla z25.s, z16.s, z3.s[3]\n"
+ "fmla z26.s, z16.s, z2.s[3]\n"
+ "fmla z27.s, z16.s, z1.s[3]\n"
+ "fmla z28.s, z16.s, z0.s[3]\n"
"bgt 61b\n"
"62:" // Height 5: Multiply loop: Single iteration only
"whilelt p0.s, XZR, x9\n"
@@ -732,39 +732,39 @@ void sve_hybrid_fp32_mla_8x1VL (
"ld1rqw { z2.s }, p0/Z, [x26]\n"
"ld1rqw { z3.s }, p0/Z, [x25]\n"
"ld1rqw { z4.s }, p0/Z, [x24]\n"
- "ld1w { z8.s }, p2/Z, [x12]\n"
- "fmla z24.s, z8.s, z0.s[0]\n"
- "fmla z25.s, z8.s, z1.s[0]\n"
- "fmla z26.s, z8.s, z2.s[0]\n"
- "fmla z27.s, z8.s, z3.s[0]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z0.s[0]\n"
+ "fmla z25.s, z16.s, z1.s[0]\n"
+ "fmla z26.s, z16.s, z2.s[0]\n"
+ "fmla z27.s, z16.s, z3.s[0]\n"
"addvl x12, x12, #1\n"
- "fmla z28.s, z8.s, z4.s[0]\n"
+ "fmla z28.s, z16.s, z4.s[0]\n"
"ble 63f\n"
- "ld1w { z9.s }, p2/Z, [x12]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
"subs x9, x9, #0x1\n"
- "fmla z24.s, z9.s, z0.s[1]\n"
- "fmla z25.s, z9.s, z1.s[1]\n"
- "fmla z26.s, z9.s, z2.s[1]\n"
- "fmla z27.s, z9.s, z3.s[1]\n"
+ "fmla z24.s, z16.s, z0.s[1]\n"
+ "fmla z25.s, z16.s, z1.s[1]\n"
+ "fmla z26.s, z16.s, z2.s[1]\n"
+ "fmla z27.s, z16.s, z3.s[1]\n"
"addvl x12, x12, #1\n"
- "fmla z28.s, z9.s, z4.s[1]\n"
+ "fmla z28.s, z16.s, z4.s[1]\n"
"ble 63f\n"
- "ld1w { z10.s }, p2/Z, [x12]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
"subs x9, x9, #0x1\n"
- "fmla z24.s, z10.s, z0.s[2]\n"
- "fmla z25.s, z10.s, z1.s[2]\n"
- "fmla z26.s, z10.s, z2.s[2]\n"
- "fmla z27.s, z10.s, z3.s[2]\n"
+ "fmla z24.s, z16.s, z0.s[2]\n"
+ "fmla z25.s, z16.s, z1.s[2]\n"
+ "fmla z26.s, z16.s, z2.s[2]\n"
+ "fmla z27.s, z16.s, z3.s[2]\n"
"addvl x12, x12, #1\n"
- "fmla z28.s, z10.s, z4.s[2]\n"
+ "fmla z28.s, z16.s, z4.s[2]\n"
"ble 63f\n"
- "ld1w { z11.s }, p2/Z, [x12]\n"
- "fmla z24.s, z11.s, z0.s[3]\n"
- "fmla z25.s, z11.s, z1.s[3]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z0.s[3]\n"
+ "fmla z25.s, z16.s, z1.s[3]\n"
"addvl x12, x12, #1\n"
- "fmla z26.s, z11.s, z2.s[3]\n"
- "fmla z27.s, z11.s, z3.s[3]\n"
- "fmla z28.s, z11.s, z4.s[3]\n"
+ "fmla z26.s, z16.s, z2.s[3]\n"
+ "fmla z27.s, z16.s, z3.s[3]\n"
+ "fmla z28.s, z16.s, z4.s[3]\n"
"63:" // Height 5: Multiply loop: multiply skip
"ldr w20, [%x[args_ptr], %[offsetof_num_strings]]\n"
"add x10, x10, #0x1\n"
@@ -821,18 +821,18 @@ void sve_hybrid_fp32_mla_8x1VL (
"b 70f\n"
"68:" // Height 6: no bias
"tbz %x[flags], #0, 69f\n"
- "ldr x20, [%x[args_ptr], %[offsetof_output_offset]]\n"
- "add x27, x11, x20, LSL #2\n"
- "add x26, x27, x20, LSL #2\n"
+ "ldr x24, [%x[args_ptr], %[offsetof_output_offset]]\n"
+ "add x23, x11, x24, LSL #2\n"
+ "add x20, x23, x24, LSL #2\n"
"ld1w { z24.s }, p1/Z, [x11]\n"
- "add x25, x26, x20, LSL #2\n"
- "add x24, x25, x20, LSL #2\n"
- "ld1w { z25.s }, p1/Z, [x27]\n"
- "ld1w { z26.s }, p1/Z, [x26]\n"
- "add x23, x24, x20, LSL #2\n"
- "ld1w { z27.s }, p1/Z, [x25]\n"
- "ld1w { z28.s }, p1/Z, [x24]\n"
- "ld1w { z29.s }, p1/Z, [x23]\n"
+ "add x22, x20, x24, LSL #2\n"
+ "add x21, x22, x24, LSL #2\n"
+ "ld1w { z25.s }, p1/Z, [x23]\n"
+ "ld1w { z26.s }, p1/Z, [x20]\n"
+ "add x20, x21, x24, LSL #2\n"
+ "ld1w { z27.s }, p1/Z, [x22]\n"
+ "ld1w { z28.s }, p1/Z, [x21]\n"
+ "ld1w { z29.s }, p1/Z, [x20]\n"
"b 70f\n"
"69:" // Height 6: no accumulate
"mov z24.b, #0x0\n"
@@ -846,16 +846,16 @@ void sve_hybrid_fp32_mla_8x1VL (
"71:" // Height 6: String loop
"ldr x20, [%x[args_ptr], %[offsetof_string_lengths]]\n"
"ldr w9, [x20, x10, LSL #0x2]\n"
- "ldr x20, [%x[args_ptr], %[offsetof_input_offset]]\n"
+ "ldr x21, [%x[args_ptr], %[offsetof_input_offset]]\n"
"tbz %x[flags], #3, 72f\n"
- "ldr x21, [%x[input_ptr], x10, LSL #0x3]\n"
- "add x21, x21, x20, LSL #3\n"
- "ldr x28, [x21, #0x0]\n"
- "ldr x27, [x21, #0x8]\n"
- "ldr x26, [x21, #0x10]\n"
- "ldr x25, [x21, #0x18]\n"
- "ldr x24, [x21, #0x20]\n"
- "ldr x23, [x21, #0x28]\n"
+ "ldr x20, [%x[input_ptr], x10, LSL #0x3]\n"
+ "add x20, x20, x21, LSL #3\n"
+ "ldr x28, [x20, #0x0]\n"
+ "ldr x27, [x20, #0x8]\n"
+ "ldr x26, [x20, #0x10]\n"
+ "ldr x25, [x20, #0x18]\n"
+ "ldr x24, [x20, #0x20]\n"
+ "ldr x23, [x20, #0x28]\n"
"cbnz x10, 73f\n"
"ldr x20, [%x[args_ptr], %[offsetof_input_initial_col]]\n"
"add x28, x28, x20, LSL #2\n"
@@ -867,59 +867,59 @@ void sve_hybrid_fp32_mla_8x1VL (
"b 73f\n"
"72:" // Height 6: setup direct input
"mov x28, %x[input_ptr]\n"
- "add x27, x28, x20, LSL #2\n"
- "add x26, x27, x20, LSL #2\n"
- "add x25, x26, x20, LSL #2\n"
- "add x24, x25, x20, LSL #2\n"
- "add x23, x24, x20, LSL #2\n"
+ "add x27, x28, x21, LSL #2\n"
+ "add x26, x27, x21, LSL #2\n"
+ "add x25, x26, x21, LSL #2\n"
+ "add x24, x25, x21, LSL #2\n"
+ "add x23, x24, x21, LSL #2\n"
"73:" // Height 6: input setup done
"cmp x9, #0x4\n"
"ble 75f\n"
"74:" // Height 6: Multiply loop: Main loop head
"whilelt p0.s, XZR, x9\n"
- "ld1rqw { z0.s }, p0/Z, [x28]\n"
- "ld1rqw { z1.s }, p0/Z, [x27]\n"
+ "ld1rqw { z5.s }, p0/Z, [x28]\n"
+ "ld1rqw { z4.s }, p0/Z, [x27]\n"
"sub x9, x9, #0x4\n"
- "ld1rqw { z2.s }, p0/Z, [x26]\n"
- "ld1rqw { z3.s }, p0/Z, [x25]\n"
+ "ld1rqw { z3.s }, p0/Z, [x26]\n"
+ "ld1rqw { z2.s }, p0/Z, [x25]\n"
"cmp x9, #0x4\n"
"add x28, x28, #0x10\n"
- "ld1rqw { z4.s }, p0/Z, [x24]\n"
- "ld1rqw { z5.s }, p0/Z, [x23]\n"
+ "ld1rqw { z1.s }, p0/Z, [x24]\n"
+ "ld1rqw { z0.s }, p0/Z, [x23]\n"
"add x27, x27, #0x10\n"
"add x26, x26, #0x10\n"
- "ld1w { z8.s }, p2/Z, [x12]\n"
- "fmla z24.s, z8.s, z0.s[0]\n"
- "fmla z25.s, z8.s, z1.s[0]\n"
- "ld1w { z9.s }, p2/Z, [x12, #1, MUL VL]\n"
- "fmla z26.s, z8.s, z2.s[0]\n"
- "fmla z27.s, z8.s, z3.s[0]\n"
- "ld1w { z10.s }, p2/Z, [x12, #2, MUL VL]\n"
- "ld1w { z11.s }, p2/Z, [x12, #3, MUL VL]\n"
- "fmla z28.s, z8.s, z4.s[0]\n"
- "fmla z29.s, z8.s, z5.s[0]\n"
+ "ld1w { z19.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z19.s, z5.s[0]\n"
+ "fmla z25.s, z19.s, z4.s[0]\n"
+ "ld1w { z18.s }, p2/Z, [x12, #1, MUL VL]\n"
+ "fmla z26.s, z19.s, z3.s[0]\n"
+ "fmla z27.s, z19.s, z2.s[0]\n"
+ "ld1w { z17.s }, p2/Z, [x12, #2, MUL VL]\n"
+ "ld1w { z16.s }, p2/Z, [x12, #3, MUL VL]\n"
+ "fmla z28.s, z19.s, z1.s[0]\n"
+ "fmla z29.s, z19.s, z0.s[0]\n"
"add x25, x25, #0x10\n"
"add x24, x24, #0x10\n"
- "fmla z24.s, z9.s, z0.s[1]\n"
- "fmla z25.s, z9.s, z1.s[1]\n"
+ "fmla z24.s, z18.s, z5.s[1]\n"
+ "fmla z25.s, z18.s, z4.s[1]\n"
"add x23, x23, #0x10\n"
"addvl x12, x12, #4\n"
- "fmla z26.s, z9.s, z2.s[1]\n"
- "fmla z27.s, z9.s, z3.s[1]\n"
- "fmla z28.s, z9.s, z4.s[1]\n"
- "fmla z29.s, z9.s, z5.s[1]\n"
- "fmla z24.s, z10.s, z0.s[2]\n"
- "fmla z25.s, z10.s, z1.s[2]\n"
- "fmla z26.s, z10.s, z2.s[2]\n"
- "fmla z27.s, z10.s, z3.s[2]\n"
- "fmla z28.s, z10.s, z4.s[2]\n"
- "fmla z29.s, z10.s, z5.s[2]\n"
- "fmla z24.s, z11.s, z0.s[3]\n"
- "fmla z25.s, z11.s, z1.s[3]\n"
- "fmla z26.s, z11.s, z2.s[3]\n"
- "fmla z27.s, z11.s, z3.s[3]\n"
- "fmla z28.s, z11.s, z4.s[3]\n"
- "fmla z29.s, z11.s, z5.s[3]\n"
+ "fmla z26.s, z18.s, z3.s[1]\n"
+ "fmla z27.s, z18.s, z2.s[1]\n"
+ "fmla z28.s, z18.s, z1.s[1]\n"
+ "fmla z29.s, z18.s, z0.s[1]\n"
+ "fmla z24.s, z17.s, z5.s[2]\n"
+ "fmla z25.s, z17.s, z4.s[2]\n"
+ "fmla z26.s, z17.s, z3.s[2]\n"
+ "fmla z27.s, z17.s, z2.s[2]\n"
+ "fmla z28.s, z17.s, z1.s[2]\n"
+ "fmla z29.s, z17.s, z0.s[2]\n"
+ "fmla z24.s, z16.s, z5.s[3]\n"
+ "fmla z25.s, z16.s, z4.s[3]\n"
+ "fmla z26.s, z16.s, z3.s[3]\n"
+ "fmla z27.s, z16.s, z2.s[3]\n"
+ "fmla z28.s, z16.s, z1.s[3]\n"
+ "fmla z29.s, z16.s, z0.s[3]\n"
"bgt 74b\n"
"75:" // Height 6: Multiply loop: Single iteration only
"whilelt p0.s, XZR, x9\n"
@@ -930,43 +930,43 @@ void sve_hybrid_fp32_mla_8x1VL (
"ld1rqw { z3.s }, p0/Z, [x25]\n"
"ld1rqw { z4.s }, p0/Z, [x24]\n"
"ld1rqw { z5.s }, p0/Z, [x23]\n"
- "ld1w { z8.s }, p2/Z, [x12]\n"
- "fmla z24.s, z8.s, z0.s[0]\n"
- "fmla z25.s, z8.s, z1.s[0]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z0.s[0]\n"
+ "fmla z25.s, z16.s, z1.s[0]\n"
"addvl x12, x12, #1\n"
- "fmla z26.s, z8.s, z2.s[0]\n"
- "fmla z27.s, z8.s, z3.s[0]\n"
- "fmla z28.s, z8.s, z4.s[0]\n"
- "fmla z29.s, z8.s, z5.s[0]\n"
+ "fmla z26.s, z16.s, z2.s[0]\n"
+ "fmla z27.s, z16.s, z3.s[0]\n"
+ "fmla z28.s, z16.s, z4.s[0]\n"
+ "fmla z29.s, z16.s, z5.s[0]\n"
"ble 76f\n"
- "ld1w { z9.s }, p2/Z, [x12]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
"subs x9, x9, #0x1\n"
- "fmla z24.s, z9.s, z0.s[1]\n"
- "fmla z25.s, z9.s, z1.s[1]\n"
- "fmla z26.s, z9.s, z2.s[1]\n"
- "fmla z27.s, z9.s, z3.s[1]\n"
+ "fmla z24.s, z16.s, z0.s[1]\n"
+ "fmla z25.s, z16.s, z1.s[1]\n"
+ "fmla z26.s, z16.s, z2.s[1]\n"
+ "fmla z27.s, z16.s, z3.s[1]\n"
"addvl x12, x12, #1\n"
- "fmla z28.s, z9.s, z4.s[1]\n"
- "fmla z29.s, z9.s, z5.s[1]\n"
+ "fmla z28.s, z16.s, z4.s[1]\n"
+ "fmla z29.s, z16.s, z5.s[1]\n"
"ble 76f\n"
- "ld1w { z10.s }, p2/Z, [x12]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
"subs x9, x9, #0x1\n"
- "fmla z24.s, z10.s, z0.s[2]\n"
- "fmla z25.s, z10.s, z1.s[2]\n"
- "fmla z26.s, z10.s, z2.s[2]\n"
- "fmla z27.s, z10.s, z3.s[2]\n"
+ "fmla z24.s, z16.s, z0.s[2]\n"
+ "fmla z25.s, z16.s, z1.s[2]\n"
+ "fmla z26.s, z16.s, z2.s[2]\n"
+ "fmla z27.s, z16.s, z3.s[2]\n"
"addvl x12, x12, #1\n"
- "fmla z28.s, z10.s, z4.s[2]\n"
- "fmla z29.s, z10.s, z5.s[2]\n"
+ "fmla z28.s, z16.s, z4.s[2]\n"
+ "fmla z29.s, z16.s, z5.s[2]\n"
"ble 76f\n"
- "ld1w { z11.s }, p2/Z, [x12]\n"
- "fmla z24.s, z11.s, z0.s[3]\n"
- "fmla z25.s, z11.s, z1.s[3]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z0.s[3]\n"
+ "fmla z25.s, z16.s, z1.s[3]\n"
"addvl x12, x12, #1\n"
- "fmla z26.s, z11.s, z2.s[3]\n"
- "fmla z27.s, z11.s, z3.s[3]\n"
- "fmla z28.s, z11.s, z4.s[3]\n"
- "fmla z29.s, z11.s, z5.s[3]\n"
+ "fmla z26.s, z16.s, z2.s[3]\n"
+ "fmla z27.s, z16.s, z3.s[3]\n"
+ "fmla z28.s, z16.s, z4.s[3]\n"
+ "fmla z29.s, z16.s, z5.s[3]\n"
"76:" // Height 6: Multiply loop: multiply skip
"ldr w20, [%x[args_ptr], %[offsetof_num_strings]]\n"
"add x10, x10, #0x1\n"
@@ -1028,20 +1028,20 @@ void sve_hybrid_fp32_mla_8x1VL (
"b 83f\n"
"81:" // Height 7: no bias
"tbz %x[flags], #0, 82f\n"
- "ldr x20, [%x[args_ptr], %[offsetof_output_offset]]\n"
- "add x27, x11, x20, LSL #2\n"
- "add x26, x27, x20, LSL #2\n"
+ "ldr x24, [%x[args_ptr], %[offsetof_output_offset]]\n"
+ "add x21, x11, x24, LSL #2\n"
+ "add x20, x21, x24, LSL #2\n"
"ld1w { z24.s }, p1/Z, [x11]\n"
- "add x25, x26, x20, LSL #2\n"
- "add x24, x25, x20, LSL #2\n"
- "ld1w { z25.s }, p1/Z, [x27]\n"
- "ld1w { z26.s }, p1/Z, [x26]\n"
- "add x23, x24, x20, LSL #2\n"
- "add x22, x23, x20, LSL #2\n"
- "ld1w { z27.s }, p1/Z, [x25]\n"
- "ld1w { z28.s }, p1/Z, [x24]\n"
- "ld1w { z29.s }, p1/Z, [x23]\n"
- "ld1w { z30.s }, p1/Z, [x22]\n"
+ "add x23, x20, x24, LSL #2\n"
+ "add x22, x23, x24, LSL #2\n"
+ "ld1w { z25.s }, p1/Z, [x21]\n"
+ "ld1w { z26.s }, p1/Z, [x20]\n"
+ "add x21, x22, x24, LSL #2\n"
+ "add x20, x21, x24, LSL #2\n"
+ "ld1w { z27.s }, p1/Z, [x23]\n"
+ "ld1w { z28.s }, p1/Z, [x22]\n"
+ "ld1w { z29.s }, p1/Z, [x21]\n"
+ "ld1w { z30.s }, p1/Z, [x20]\n"
"b 83f\n"
"82:" // Height 7: no accumulate
"mov z24.b, #0x0\n"
@@ -1056,17 +1056,17 @@ void sve_hybrid_fp32_mla_8x1VL (
"84:" // Height 7: String loop
"ldr x20, [%x[args_ptr], %[offsetof_string_lengths]]\n"
"ldr w9, [x20, x10, LSL #0x2]\n"
- "ldr x20, [%x[args_ptr], %[offsetof_input_offset]]\n"
+ "ldr x21, [%x[args_ptr], %[offsetof_input_offset]]\n"
"tbz %x[flags], #3, 85f\n"
- "ldr x21, [%x[input_ptr], x10, LSL #0x3]\n"
- "add x21, x21, x20, LSL #3\n"
- "ldr x28, [x21, #0x0]\n"
- "ldr x27, [x21, #0x8]\n"
- "ldr x26, [x21, #0x10]\n"
- "ldr x25, [x21, #0x18]\n"
- "ldr x24, [x21, #0x20]\n"
- "ldr x23, [x21, #0x28]\n"
- "ldr x22, [x21, #0x30]\n"
+ "ldr x20, [%x[input_ptr], x10, LSL #0x3]\n"
+ "add x20, x20, x21, LSL #3\n"
+ "ldr x28, [x20, #0x0]\n"
+ "ldr x27, [x20, #0x8]\n"
+ "ldr x26, [x20, #0x10]\n"
+ "ldr x25, [x20, #0x18]\n"
+ "ldr x24, [x20, #0x20]\n"
+ "ldr x23, [x20, #0x28]\n"
+ "ldr x22, [x20, #0x30]\n"
"cbnz x10, 86f\n"
"ldr x20, [%x[args_ptr], %[offsetof_input_initial_col]]\n"
"add x28, x28, x20, LSL #2\n"
@@ -1079,66 +1079,66 @@ void sve_hybrid_fp32_mla_8x1VL (
"b 86f\n"
"85:" // Height 7: setup direct input
"mov x28, %x[input_ptr]\n"
- "add x27, x28, x20, LSL #2\n"
- "add x26, x27, x20, LSL #2\n"
- "add x25, x26, x20, LSL #2\n"
- "add x24, x25, x20, LSL #2\n"
- "add x23, x24, x20, LSL #2\n"
- "add x22, x23, x20, LSL #2\n"
+ "add x27, x28, x21, LSL #2\n"
+ "add x26, x27, x21, LSL #2\n"
+ "add x25, x26, x21, LSL #2\n"
+ "add x24, x25, x21, LSL #2\n"
+ "add x23, x24, x21, LSL #2\n"
+ "add x22, x23, x21, LSL #2\n"
"86:" // Height 7: input setup done
"cmp x9, #0x4\n"
"ble 88f\n"
"87:" // Height 7: Multiply loop: Main loop head
"whilelt p0.s, XZR, x9\n"
- "ld1rqw { z0.s }, p0/Z, [x28]\n"
- "ld1rqw { z1.s }, p0/Z, [x27]\n"
+ "ld1rqw { z6.s }, p0/Z, [x28]\n"
+ "ld1rqw { z5.s }, p0/Z, [x27]\n"
"sub x9, x9, #0x4\n"
- "ld1rqw { z2.s }, p0/Z, [x26]\n"
+ "ld1rqw { z4.s }, p0/Z, [x26]\n"
"ld1rqw { z3.s }, p0/Z, [x25]\n"
"cmp x9, #0x4\n"
"add x28, x28, #0x10\n"
- "ld1rqw { z4.s }, p0/Z, [x24]\n"
- "ld1rqw { z5.s }, p0/Z, [x23]\n"
+ "ld1rqw { z2.s }, p0/Z, [x24]\n"
+ "ld1rqw { z1.s }, p0/Z, [x23]\n"
"add x27, x27, #0x10\n"
"add x26, x26, #0x10\n"
- "ld1rqw { z6.s }, p0/Z, [x22]\n"
- "ld1w { z8.s }, p2/Z, [x12]\n"
- "fmla z24.s, z8.s, z0.s[0]\n"
- "fmla z25.s, z8.s, z1.s[0]\n"
- "fmla z26.s, z8.s, z2.s[0]\n"
- "fmla z27.s, z8.s, z3.s[0]\n"
- "ld1w { z9.s }, p2/Z, [x12, #1, MUL VL]\n"
- "ld1w { z10.s }, p2/Z, [x12, #2, MUL VL]\n"
- "fmla z28.s, z8.s, z4.s[0]\n"
- "fmla z29.s, z8.s, z5.s[0]\n"
- "ld1w { z11.s }, p2/Z, [x12, #3, MUL VL]\n"
+ "ld1rqw { z0.s }, p0/Z, [x22]\n"
+ "ld1w { z19.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z19.s, z6.s[0]\n"
+ "fmla z25.s, z19.s, z5.s[0]\n"
+ "fmla z26.s, z19.s, z4.s[0]\n"
+ "fmla z27.s, z19.s, z3.s[0]\n"
+ "ld1w { z18.s }, p2/Z, [x12, #1, MUL VL]\n"
+ "ld1w { z17.s }, p2/Z, [x12, #2, MUL VL]\n"
+ "fmla z28.s, z19.s, z2.s[0]\n"
+ "fmla z29.s, z19.s, z1.s[0]\n"
+ "ld1w { z16.s }, p2/Z, [x12, #3, MUL VL]\n"
"add x25, x25, #0x10\n"
- "fmla z30.s, z8.s, z6.s[0]\n"
- "fmla z24.s, z9.s, z0.s[1]\n"
+ "fmla z30.s, z19.s, z0.s[0]\n"
+ "fmla z24.s, z18.s, z6.s[1]\n"
"add x24, x24, #0x10\n"
"add x23, x23, #0x10\n"
- "fmla z25.s, z9.s, z1.s[1]\n"
- "fmla z26.s, z9.s, z2.s[1]\n"
+ "fmla z25.s, z18.s, z5.s[1]\n"
+ "fmla z26.s, z18.s, z4.s[1]\n"
"add x22, x22, #0x10\n"
"addvl x12, x12, #4\n"
- "fmla z27.s, z9.s, z3.s[1]\n"
- "fmla z28.s, z9.s, z4.s[1]\n"
- "fmla z29.s, z9.s, z5.s[1]\n"
- "fmla z30.s, z9.s, z6.s[1]\n"
- "fmla z24.s, z10.s, z0.s[2]\n"
- "fmla z25.s, z10.s, z1.s[2]\n"
- "fmla z26.s, z10.s, z2.s[2]\n"
- "fmla z27.s, z10.s, z3.s[2]\n"
- "fmla z28.s, z10.s, z4.s[2]\n"
- "fmla z29.s, z10.s, z5.s[2]\n"
- "fmla z30.s, z10.s, z6.s[2]\n"
- "fmla z24.s, z11.s, z0.s[3]\n"
- "fmla z25.s, z11.s, z1.s[3]\n"
- "fmla z26.s, z11.s, z2.s[3]\n"
- "fmla z27.s, z11.s, z3.s[3]\n"
- "fmla z28.s, z11.s, z4.s[3]\n"
- "fmla z29.s, z11.s, z5.s[3]\n"
- "fmla z30.s, z11.s, z6.s[3]\n"
+ "fmla z27.s, z18.s, z3.s[1]\n"
+ "fmla z28.s, z18.s, z2.s[1]\n"
+ "fmla z29.s, z18.s, z1.s[1]\n"
+ "fmla z30.s, z18.s, z0.s[1]\n"
+ "fmla z24.s, z17.s, z6.s[2]\n"
+ "fmla z25.s, z17.s, z5.s[2]\n"
+ "fmla z26.s, z17.s, z4.s[2]\n"
+ "fmla z27.s, z17.s, z3.s[2]\n"
+ "fmla z28.s, z17.s, z2.s[2]\n"
+ "fmla z29.s, z17.s, z1.s[2]\n"
+ "fmla z30.s, z17.s, z0.s[2]\n"
+ "fmla z24.s, z16.s, z6.s[3]\n"
+ "fmla z25.s, z16.s, z5.s[3]\n"
+ "fmla z26.s, z16.s, z4.s[3]\n"
+ "fmla z27.s, z16.s, z3.s[3]\n"
+ "fmla z28.s, z16.s, z2.s[3]\n"
+ "fmla z29.s, z16.s, z1.s[3]\n"
+ "fmla z30.s, z16.s, z0.s[3]\n"
"bgt 87b\n"
"88:" // Height 7: Multiply loop: Single iteration only
"whilelt p0.s, XZR, x9\n"
@@ -1150,47 +1150,47 @@ void sve_hybrid_fp32_mla_8x1VL (
"ld1rqw { z4.s }, p0/Z, [x24]\n"
"ld1rqw { z5.s }, p0/Z, [x23]\n"
"ld1rqw { z6.s }, p0/Z, [x22]\n"
- "ld1w { z8.s }, p2/Z, [x12]\n"
- "fmla z24.s, z8.s, z0.s[0]\n"
- "fmla z25.s, z8.s, z1.s[0]\n"
- "fmla z26.s, z8.s, z2.s[0]\n"
- "fmla z27.s, z8.s, z3.s[0]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z0.s[0]\n"
+ "fmla z25.s, z16.s, z1.s[0]\n"
+ "fmla z26.s, z16.s, z2.s[0]\n"
+ "fmla z27.s, z16.s, z3.s[0]\n"
"addvl x12, x12, #1\n"
- "fmla z28.s, z8.s, z4.s[0]\n"
- "fmla z29.s, z8.s, z5.s[0]\n"
- "fmla z30.s, z8.s, z6.s[0]\n"
+ "fmla z28.s, z16.s, z4.s[0]\n"
+ "fmla z29.s, z16.s, z5.s[0]\n"
+ "fmla z30.s, z16.s, z6.s[0]\n"
"ble 89f\n"
- "ld1w { z9.s }, p2/Z, [x12]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
"subs x9, x9, #0x1\n"
- "fmla z24.s, z9.s, z0.s[1]\n"
- "fmla z25.s, z9.s, z1.s[1]\n"
- "fmla z26.s, z9.s, z2.s[1]\n"
- "fmla z27.s, z9.s, z3.s[1]\n"
+ "fmla z24.s, z16.s, z0.s[1]\n"
+ "fmla z25.s, z16.s, z1.s[1]\n"
+ "fmla z26.s, z16.s, z2.s[1]\n"
+ "fmla z27.s, z16.s, z3.s[1]\n"
"addvl x12, x12, #1\n"
- "fmla z28.s, z9.s, z4.s[1]\n"
- "fmla z29.s, z9.s, z5.s[1]\n"
- "fmla z30.s, z9.s, z6.s[1]\n"
+ "fmla z28.s, z16.s, z4.s[1]\n"
+ "fmla z29.s, z16.s, z5.s[1]\n"
+ "fmla z30.s, z16.s, z6.s[1]\n"
"ble 89f\n"
- "ld1w { z10.s }, p2/Z, [x12]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
"subs x9, x9, #0x1\n"
- "fmla z24.s, z10.s, z0.s[2]\n"
- "fmla z25.s, z10.s, z1.s[2]\n"
- "fmla z26.s, z10.s, z2.s[2]\n"
- "fmla z27.s, z10.s, z3.s[2]\n"
+ "fmla z24.s, z16.s, z0.s[2]\n"
+ "fmla z25.s, z16.s, z1.s[2]\n"
+ "fmla z26.s, z16.s, z2.s[2]\n"
+ "fmla z27.s, z16.s, z3.s[2]\n"
"addvl x12, x12, #1\n"
- "fmla z28.s, z10.s, z4.s[2]\n"
- "fmla z29.s, z10.s, z5.s[2]\n"
- "fmla z30.s, z10.s, z6.s[2]\n"
+ "fmla z28.s, z16.s, z4.s[2]\n"
+ "fmla z29.s, z16.s, z5.s[2]\n"
+ "fmla z30.s, z16.s, z6.s[2]\n"
"ble 89f\n"
- "ld1w { z11.s }, p2/Z, [x12]\n"
- "fmla z24.s, z11.s, z0.s[3]\n"
- "fmla z25.s, z11.s, z1.s[3]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z0.s[3]\n"
+ "fmla z25.s, z16.s, z1.s[3]\n"
"addvl x12, x12, #1\n"
- "fmla z26.s, z11.s, z2.s[3]\n"
- "fmla z27.s, z11.s, z3.s[3]\n"
- "fmla z28.s, z11.s, z4.s[3]\n"
- "fmla z29.s, z11.s, z5.s[3]\n"
- "fmla z30.s, z11.s, z6.s[3]\n"
+ "fmla z26.s, z16.s, z2.s[3]\n"
+ "fmla z27.s, z16.s, z3.s[3]\n"
+ "fmla z28.s, z16.s, z4.s[3]\n"
+ "fmla z29.s, z16.s, z5.s[3]\n"
+ "fmla z30.s, z16.s, z6.s[3]\n"
"89:" // Height 7: Multiply loop: multiply skip
"ldr w20, [%x[args_ptr], %[offsetof_num_strings]]\n"
"add x10, x10, #0x1\n"
@@ -1260,22 +1260,22 @@ void sve_hybrid_fp32_mla_8x1VL (
"b 96f\n"
"94:" // Height 8: no bias
"tbz %x[flags], #0, 95f\n"
- "ldr x20, [%x[args_ptr], %[offsetof_output_offset]]\n"
- "add x27, x11, x20, LSL #2\n"
- "add x26, x27, x20, LSL #2\n"
+ "ldr x24, [%x[args_ptr], %[offsetof_output_offset]]\n"
+ "add x22, x11, x24, LSL #2\n"
+ "add x21, x22, x24, LSL #2\n"
"ld1w { z24.s }, p1/Z, [x11]\n"
- "add x25, x26, x20, LSL #2\n"
- "add x24, x25, x20, LSL #2\n"
- "ld1w { z25.s }, p1/Z, [x27]\n"
- "ld1w { z26.s }, p1/Z, [x26]\n"
- "add x23, x24, x20, LSL #2\n"
- "add x22, x23, x20, LSL #2\n"
- "ld1w { z27.s }, p1/Z, [x25]\n"
- "ld1w { z28.s }, p1/Z, [x24]\n"
- "add x21, x22, x20, LSL #2\n"
- "ld1w { z29.s }, p1/Z, [x23]\n"
- "ld1w { z30.s }, p1/Z, [x22]\n"
- "ld1w { z31.s }, p1/Z, [x21]\n"
+ "add x23, x21, x24, LSL #2\n"
+ "add x20, x23, x24, LSL #2\n"
+ "ld1w { z25.s }, p1/Z, [x22]\n"
+ "ld1w { z26.s }, p1/Z, [x21]\n"
+ "add x22, x20, x24, LSL #2\n"
+ "add x21, x22, x24, LSL #2\n"
+ "ld1w { z27.s }, p1/Z, [x23]\n"
+ "ld1w { z28.s }, p1/Z, [x20]\n"
+ "add x20, x21, x24, LSL #2\n"
+ "ld1w { z29.s }, p1/Z, [x22]\n"
+ "ld1w { z30.s }, p1/Z, [x21]\n"
+ "ld1w { z31.s }, p1/Z, [x20]\n"
"b 96f\n"
"95:" // Height 8: no accumulate
"mov z24.b, #0x0\n"
@@ -1291,18 +1291,18 @@ void sve_hybrid_fp32_mla_8x1VL (
"97:" // Height 8: String loop
"ldr x20, [%x[args_ptr], %[offsetof_string_lengths]]\n"
"ldr w9, [x20, x10, LSL #0x2]\n"
- "ldr x20, [%x[args_ptr], %[offsetof_input_offset]]\n"
+ "ldr x21, [%x[args_ptr], %[offsetof_input_offset]]\n"
"tbz %x[flags], #3, 98f\n"
- "ldr x21, [%x[input_ptr], x10, LSL #0x3]\n"
- "add x21, x21, x20, LSL #3\n"
- "ldr x28, [x21, #0x0]\n"
- "ldr x27, [x21, #0x8]\n"
- "ldr x26, [x21, #0x10]\n"
- "ldr x25, [x21, #0x18]\n"
- "ldr x24, [x21, #0x20]\n"
- "ldr x23, [x21, #0x28]\n"
- "ldr x22, [x21, #0x30]\n"
- "ldr x21, [x21, #0x38]\n"
+ "ldr x20, [%x[input_ptr], x10, LSL #0x3]\n"
+ "add x20, x20, x21, LSL #3\n"
+ "ldr x28, [x20, #0x0]\n"
+ "ldr x27, [x20, #0x8]\n"
+ "ldr x26, [x20, #0x10]\n"
+ "ldr x25, [x20, #0x18]\n"
+ "ldr x24, [x20, #0x20]\n"
+ "ldr x23, [x20, #0x28]\n"
+ "ldr x22, [x20, #0x30]\n"
+ "ldr x21, [x20, #0x38]\n"
"cbnz x10, 99f\n"
"ldr x20, [%x[args_ptr], %[offsetof_input_initial_col]]\n"
"add x28, x28, x20, LSL #2\n"
@@ -1316,73 +1316,73 @@ void sve_hybrid_fp32_mla_8x1VL (
"b 99f\n"
"98:" // Height 8: setup direct input
"mov x28, %x[input_ptr]\n"
- "add x27, x28, x20, LSL #2\n"
- "add x26, x27, x20, LSL #2\n"
- "add x25, x26, x20, LSL #2\n"
- "add x24, x25, x20, LSL #2\n"
- "add x23, x24, x20, LSL #2\n"
- "add x22, x23, x20, LSL #2\n"
- "add x21, x22, x20, LSL #2\n"
+ "add x27, x28, x21, LSL #2\n"
+ "add x26, x27, x21, LSL #2\n"
+ "add x25, x26, x21, LSL #2\n"
+ "add x24, x25, x21, LSL #2\n"
+ "add x23, x24, x21, LSL #2\n"
+ "add x22, x23, x21, LSL #2\n"
+ "add x21, x22, x21, LSL #2\n"
"99:" // Height 8: input setup done
"cmp x9, #0x4\n"
"ble 101f\n"
"100:" // Height 8: Multiply loop: Main loop head
"whilelt p0.s, XZR, x9\n"
- "ld1rqw { z0.s }, p0/Z, [x28]\n"
- "ld1rqw { z1.s }, p0/Z, [x27]\n"
+ "ld1rqw { z7.s }, p0/Z, [x28]\n"
+ "ld1rqw { z6.s }, p0/Z, [x27]\n"
"sub x9, x9, #0x4\n"
- "ld1rqw { z2.s }, p0/Z, [x26]\n"
- "ld1rqw { z3.s }, p0/Z, [x25]\n"
+ "ld1rqw { z5.s }, p0/Z, [x26]\n"
+ "ld1rqw { z4.s }, p0/Z, [x25]\n"
"cmp x9, #0x4\n"
"add x28, x28, #0x10\n"
- "ld1rqw { z4.s }, p0/Z, [x24]\n"
- "ld1rqw { z5.s }, p0/Z, [x23]\n"
+ "ld1rqw { z3.s }, p0/Z, [x24]\n"
+ "ld1rqw { z2.s }, p0/Z, [x23]\n"
"add x27, x27, #0x10\n"
"add x26, x26, #0x10\n"
- "ld1rqw { z6.s }, p0/Z, [x22]\n"
- "ld1rqw { z7.s }, p0/Z, [x21]\n"
+ "ld1rqw { z1.s }, p0/Z, [x22]\n"
+ "ld1rqw { z0.s }, p0/Z, [x21]\n"
"add x25, x25, #0x10\n"
"add x24, x24, #0x10\n"
- "ld1w { z8.s }, p2/Z, [x12]\n"
- "fmla z24.s, z8.s, z0.s[0]\n"
- "fmla z25.s, z8.s, z1.s[0]\n"
- "ld1w { z9.s }, p2/Z, [x12, #1, MUL VL]\n"
- "fmla z26.s, z8.s, z2.s[0]\n"
- "fmla z27.s, z8.s, z3.s[0]\n"
- "ld1w { z10.s }, p2/Z, [x12, #2, MUL VL]\n"
- "ld1w { z11.s }, p2/Z, [x12, #3, MUL VL]\n"
- "fmla z28.s, z8.s, z4.s[0]\n"
- "fmla z29.s, z8.s, z5.s[0]\n"
+ "ld1w { z19.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z19.s, z7.s[0]\n"
+ "fmla z25.s, z19.s, z6.s[0]\n"
+ "ld1w { z18.s }, p2/Z, [x12, #1, MUL VL]\n"
+ "fmla z26.s, z19.s, z5.s[0]\n"
+ "fmla z27.s, z19.s, z4.s[0]\n"
+ "ld1w { z17.s }, p2/Z, [x12, #2, MUL VL]\n"
+ "ld1w { z16.s }, p2/Z, [x12, #3, MUL VL]\n"
+ "fmla z28.s, z19.s, z3.s[0]\n"
+ "fmla z29.s, z19.s, z2.s[0]\n"
"add x23, x23, #0x10\n"
"add x22, x22, #0x10\n"
- "fmla z30.s, z8.s, z6.s[0]\n"
- "fmla z31.s, z8.s, z7.s[0]\n"
+ "fmla z30.s, z19.s, z1.s[0]\n"
+ "fmla z31.s, z19.s, z0.s[0]\n"
"add x21, x21, #0x10\n"
"addvl x12, x12, #4\n"
- "fmla z24.s, z9.s, z0.s[1]\n"
- "fmla z25.s, z9.s, z1.s[1]\n"
- "fmla z26.s, z9.s, z2.s[1]\n"
- "fmla z27.s, z9.s, z3.s[1]\n"
- "fmla z28.s, z9.s, z4.s[1]\n"
- "fmla z29.s, z9.s, z5.s[1]\n"
- "fmla z30.s, z9.s, z6.s[1]\n"
- "fmla z31.s, z9.s, z7.s[1]\n"
- "fmla z24.s, z10.s, z0.s[2]\n"
- "fmla z25.s, z10.s, z1.s[2]\n"
- "fmla z26.s, z10.s, z2.s[2]\n"
- "fmla z27.s, z10.s, z3.s[2]\n"
- "fmla z28.s, z10.s, z4.s[2]\n"
- "fmla z29.s, z10.s, z5.s[2]\n"
- "fmla z30.s, z10.s, z6.s[2]\n"
- "fmla z31.s, z10.s, z7.s[2]\n"
- "fmla z24.s, z11.s, z0.s[3]\n"
- "fmla z25.s, z11.s, z1.s[3]\n"
- "fmla z26.s, z11.s, z2.s[3]\n"
- "fmla z27.s, z11.s, z3.s[3]\n"
- "fmla z28.s, z11.s, z4.s[3]\n"
- "fmla z29.s, z11.s, z5.s[3]\n"
- "fmla z30.s, z11.s, z6.s[3]\n"
- "fmla z31.s, z11.s, z7.s[3]\n"
+ "fmla z24.s, z18.s, z7.s[1]\n"
+ "fmla z25.s, z18.s, z6.s[1]\n"
+ "fmla z26.s, z18.s, z5.s[1]\n"
+ "fmla z27.s, z18.s, z4.s[1]\n"
+ "fmla z28.s, z18.s, z3.s[1]\n"
+ "fmla z29.s, z18.s, z2.s[1]\n"
+ "fmla z30.s, z18.s, z1.s[1]\n"
+ "fmla z31.s, z18.s, z0.s[1]\n"
+ "fmla z24.s, z17.s, z7.s[2]\n"
+ "fmla z25.s, z17.s, z6.s[2]\n"
+ "fmla z26.s, z17.s, z5.s[2]\n"
+ "fmla z27.s, z17.s, z4.s[2]\n"
+ "fmla z28.s, z17.s, z3.s[2]\n"
+ "fmla z29.s, z17.s, z2.s[2]\n"
+ "fmla z30.s, z17.s, z1.s[2]\n"
+ "fmla z31.s, z17.s, z0.s[2]\n"
+ "fmla z24.s, z16.s, z7.s[3]\n"
+ "fmla z25.s, z16.s, z6.s[3]\n"
+ "fmla z26.s, z16.s, z5.s[3]\n"
+ "fmla z27.s, z16.s, z4.s[3]\n"
+ "fmla z28.s, z16.s, z3.s[3]\n"
+ "fmla z29.s, z16.s, z2.s[3]\n"
+ "fmla z30.s, z16.s, z1.s[3]\n"
+ "fmla z31.s, z16.s, z0.s[3]\n"
"bgt 100b\n"
"101:" // Height 8: Multiply loop: Single iteration only
"whilelt p0.s, XZR, x9\n"
@@ -1395,51 +1395,51 @@ void sve_hybrid_fp32_mla_8x1VL (
"ld1rqw { z5.s }, p0/Z, [x23]\n"
"ld1rqw { z6.s }, p0/Z, [x22]\n"
"ld1rqw { z7.s }, p0/Z, [x21]\n"
- "ld1w { z8.s }, p2/Z, [x12]\n"
- "fmla z24.s, z8.s, z0.s[0]\n"
- "fmla z25.s, z8.s, z1.s[0]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z0.s[0]\n"
+ "fmla z25.s, z16.s, z1.s[0]\n"
"addvl x12, x12, #1\n"
- "fmla z26.s, z8.s, z2.s[0]\n"
- "fmla z27.s, z8.s, z3.s[0]\n"
- "fmla z28.s, z8.s, z4.s[0]\n"
- "fmla z29.s, z8.s, z5.s[0]\n"
- "fmla z30.s, z8.s, z6.s[0]\n"
- "fmla z31.s, z8.s, z7.s[0]\n"
+ "fmla z26.s, z16.s, z2.s[0]\n"
+ "fmla z27.s, z16.s, z3.s[0]\n"
+ "fmla z28.s, z16.s, z4.s[0]\n"
+ "fmla z29.s, z16.s, z5.s[0]\n"
+ "fmla z30.s, z16.s, z6.s[0]\n"
+ "fmla z31.s, z16.s, z7.s[0]\n"
"ble 102f\n"
- "ld1w { z9.s }, p2/Z, [x12]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
"subs x9, x9, #0x1\n"
- "fmla z24.s, z9.s, z0.s[1]\n"
- "fmla z25.s, z9.s, z1.s[1]\n"
- "fmla z26.s, z9.s, z2.s[1]\n"
- "fmla z27.s, z9.s, z3.s[1]\n"
+ "fmla z24.s, z16.s, z0.s[1]\n"
+ "fmla z25.s, z16.s, z1.s[1]\n"
+ "fmla z26.s, z16.s, z2.s[1]\n"
+ "fmla z27.s, z16.s, z3.s[1]\n"
"addvl x12, x12, #1\n"
- "fmla z28.s, z9.s, z4.s[1]\n"
- "fmla z29.s, z9.s, z5.s[1]\n"
- "fmla z30.s, z9.s, z6.s[1]\n"
- "fmla z31.s, z9.s, z7.s[1]\n"
+ "fmla z28.s, z16.s, z4.s[1]\n"
+ "fmla z29.s, z16.s, z5.s[1]\n"
+ "fmla z30.s, z16.s, z6.s[1]\n"
+ "fmla z31.s, z16.s, z7.s[1]\n"
"ble 102f\n"
- "ld1w { z10.s }, p2/Z, [x12]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
"subs x9, x9, #0x1\n"
- "fmla z24.s, z10.s, z0.s[2]\n"
- "fmla z25.s, z10.s, z1.s[2]\n"
- "fmla z26.s, z10.s, z2.s[2]\n"
- "fmla z27.s, z10.s, z3.s[2]\n"
+ "fmla z24.s, z16.s, z0.s[2]\n"
+ "fmla z25.s, z16.s, z1.s[2]\n"
+ "fmla z26.s, z16.s, z2.s[2]\n"
+ "fmla z27.s, z16.s, z3.s[2]\n"
"addvl x12, x12, #1\n"
- "fmla z28.s, z10.s, z4.s[2]\n"
- "fmla z29.s, z10.s, z5.s[2]\n"
- "fmla z30.s, z10.s, z6.s[2]\n"
- "fmla z31.s, z10.s, z7.s[2]\n"
+ "fmla z28.s, z16.s, z4.s[2]\n"
+ "fmla z29.s, z16.s, z5.s[2]\n"
+ "fmla z30.s, z16.s, z6.s[2]\n"
+ "fmla z31.s, z16.s, z7.s[2]\n"
"ble 102f\n"
- "ld1w { z11.s }, p2/Z, [x12]\n"
- "fmla z24.s, z11.s, z0.s[3]\n"
- "fmla z25.s, z11.s, z1.s[3]\n"
+ "ld1w { z16.s }, p2/Z, [x12]\n"
+ "fmla z24.s, z16.s, z0.s[3]\n"
+ "fmla z25.s, z16.s, z1.s[3]\n"
"addvl x12, x12, #1\n"
- "fmla z26.s, z11.s, z2.s[3]\n"
- "fmla z27.s, z11.s, z3.s[3]\n"
- "fmla z28.s, z11.s, z4.s[3]\n"
- "fmla z29.s, z11.s, z5.s[3]\n"
- "fmla z30.s, z11.s, z6.s[3]\n"
- "fmla z31.s, z11.s, z7.s[3]\n"
+ "fmla z26.s, z16.s, z2.s[3]\n"
+ "fmla z27.s, z16.s, z3.s[3]\n"
+ "fmla z28.s, z16.s, z4.s[3]\n"
+ "fmla z29.s, z16.s, z5.s[3]\n"
+ "fmla z30.s, z16.s, z6.s[3]\n"
+ "fmla z31.s, z16.s, z7.s[3]\n"
"102:" // Height 8: Multiply loop: multiply skip
"ldr w20, [%x[args_ptr], %[offsetof_num_strings]]\n"
"add x10, x10, #0x1\n"
@@ -1500,12 +1500,11 @@ void sve_hybrid_fp32_mla_8x1VL (
"madd %x[input_ptr], x20, x21, %x[input_ptr]\n"
"b 1b\n"
"106:" // Exit
-
: [M] "+&r" (M), [input_ptr] "+&r" (input_ptr), [output_ptr] "+&r" (output_ptr)
: [args_ptr] "r" (&ka), [bias] "r" (bias), [flags] "r" (flags), [offset_max] "I" (offsetof(KernelArgs, maxval)), [offset_min] "I" (offsetof(KernelArgs, minval)), [offsetof_B_ptr] "I" (offsetof(KernelArgs, B_ptr)), [offsetof_N] "I" (offsetof(KernelArgs, N)), [offsetof_input_initial_col] "I" (offsetof(KernelArgs, input_initial_col)), [offsetof_input_offset] "I" (offsetof(KernelArgs, input_offset)), [offsetof_num_strings] "I" (offsetof(KernelArgs, num_strings)), [offsetof_output_offset] "I" (offsetof(KernelArgs, output_offset)), [offsetof_string_lengths] "I" (offsetof(KernelArgs, string_lengths))
- : "cc", "memory", "p0", "p1", "p2", "x9", "x10", "x11", "x12", "x13", "x14", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z16", "z17", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ : "cc", "memory", "p0", "p1", "p2", "x9", "x10", "x11", "x12", "x13", "x14", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z16", "z17", "z18", "z19", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
);
}
} // namespace arm_gemm
-#endif // ARM_COMPUTE_ENABLE_SVE
+#endif // ARM_COMPUTE_ENABLE_SVE