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authorAnthony Barbier <anthony.barbier@arm.com>2018-07-03 16:22:02 +0100
committerAnthony Barbier <anthony.barbier@arm.com>2018-11-02 16:54:10 +0000
commit5f707736413aeac77818c42838296966f8dc6761 (patch)
treeb829ed3243ea5f3085f288836132416c78bc2e72 /src/core/NEON/kernels/arm_gemm/asmlib.hpp
parent7485d5a62685cb745ab50e970adb722cb71557ac (diff)
downloadComputeLibrary-5f707736413aeac77818c42838296966f8dc6761.tar.gz
COMPMID-1369: Revert accidental formatting of RSH's repo
Pulled latest fixes from David's repo: commit f43ebe932c84083332b0b1a0348241b69dda63a7 Author: David Mansell <David.Mansell@arm.com> Date: Tue Jul 3 18:09:01 2018 +0100 Whitespace tidying, fixed comment in gemv_batched imported from ACL. Change-Id: Ie37a623f44e90d88072236cb853ac55ac82d5f51 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/138530 Tested-by: Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Reviewed-by: David Mansell <david.mansell@arm.com> Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/asmlib.hpp')
-rw-r--r--src/core/NEON/kernels/arm_gemm/asmlib.hpp85
1 files changed, 43 insertions, 42 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/asmlib.hpp b/src/core/NEON/kernels/arm_gemm/asmlib.hpp
index b3fcb33bfb..38f51ae72c 100644
--- a/src/core/NEON/kernels/arm_gemm/asmlib.hpp
+++ b/src/core/NEON/kernels/arm_gemm/asmlib.hpp
@@ -31,21 +31,21 @@
// used by the workaround.
// "Correct" version
-#define ASM_PREFETCH(address) "PRFM PLDL1KEEP, " address "\n"
-#define ASM_PREFETCHL2(address) "PRFM PLDL2KEEP, " address "\n"
-#define ASM_PREFETCHW(address) "PRFM PSTL1KEEP, " address "\n"
+#define ASM_PREFETCH(address) "PRFM PLDL1KEEP, " address "\n"
+#define ASM_PREFETCHL2(address) "PRFM PLDL2KEEP, " address "\n"
+#define ASM_PREFETCHW(address) "PRFM PSTL1KEEP, " address "\n"
#define ASM_PREFETCHWL2(address) "PRFM PSTL2KEEP, " address "\n"
// Lee's uarchsim hack
-//#define ASM_PREFETCH(address) "LDNP x20, x21, " address "\n"
+//#define ASM_PREFETCH(address) "LDNP x20, x21, " address "\n"
// No preload at all
//#define ASM_PREFETCH(address) ""
#else
// "Correct" versions for AArch32
-#define ASM_PREFETCH(address) "PLD " address "\n"
-#define ASM_PREFETCHW(address) "PLDW " address "\n"
+#define ASM_PREFETCH(address) "PLD " address "\n"
+#define ASM_PREFETCHW(address) "PLDW " address "\n"
#endif
@@ -53,76 +53,77 @@
* Do some prefetches.
*/
template <typename T>
-static inline void prefetch_6x(const T *pfp)
-{
- __asm __volatile(
+static inline void prefetch_6x(const T *pfp) {
+ __asm __volatile (
ASM_PREFETCH("[%[pfp]]")
ASM_PREFETCH("[%[pfp], #64]")
ASM_PREFETCH("[%[pfp], #128]")
ASM_PREFETCH("[%[pfp], #192]")
ASM_PREFETCH("[%[pfp], #256]")
ASM_PREFETCH("[%[pfp], #320]")
- :
- : [pfp] "r"(pfp)
- : "memory");
+ :
+ : [pfp] "r" (pfp)
+ : "memory"
+ );
}
template <typename T>
-static inline void prefetch_5x(const T *pfp)
-{
- __asm __volatile(
+static inline void prefetch_5x(const T *pfp) {
+ __asm __volatile (
ASM_PREFETCH("[%[pfp]]")
ASM_PREFETCH("[%[pfp], #64]")
ASM_PREFETCH("[%[pfp], #128]")
ASM_PREFETCH("[%[pfp], #192]")
ASM_PREFETCH("[%[pfp], #256]")
- :
- : [pfp] "r"(pfp)
- : "memory");
+ :
+ : [pfp] "r" (pfp)
+ : "memory"
+ );
}
template <typename T>
-static inline void prefetch_4x(const T *pfp)
-{
- __asm __volatile(
+static inline void prefetch_4x(const T *pfp) {
+ __asm __volatile (
ASM_PREFETCH("[%[pfp]]")
ASM_PREFETCH("[%[pfp], #64]")
ASM_PREFETCH("[%[pfp], #128]")
ASM_PREFETCH("[%[pfp], #192]")
- :
- : [pfp] "r"(pfp)
- : "memory");
+ :
+ : [pfp] "r" (pfp)
+ : "memory"
+ );
}
template <typename T>
-static inline void prefetch_3x(const T *pfp)
-{
- __asm __volatile(
+static inline void prefetch_3x(const T *pfp) {
+ __asm __volatile (
ASM_PREFETCH("[%[pfp]]")
ASM_PREFETCH("[%[pfp], #64]")
ASM_PREFETCH("[%[pfp], #128]")
- :
- : [pfp] "r"(pfp)
- : "memory");
+ :
+ : [pfp] "r" (pfp)
+ : "memory"
+ );
}
template <typename T>
-static inline void prefetch_2x(const T *pfp)
-{
- __asm __volatile(
+static inline void prefetch_2x(const T *pfp) {
+ __asm __volatile (
ASM_PREFETCH("[%[pfp]]")
ASM_PREFETCH("[%[pfp], #64]")
- :
- : [pfp] "r"(pfp)
- : "memory");
+ :
+ : [pfp] "r" (pfp)
+ : "memory"
+ );
}
template <typename T>
-static inline void prefetch_1x(const T *pfp)
-{
- __asm __volatile(
+static inline void prefetch_1x(const T *pfp) {
+ __asm __volatile (
ASM_PREFETCH("[%[pfp]]")
- :
- : [pfp] "r"(pfp)
- : "memory");
+ :
+ : [pfp] "r" (pfp)
+ : "memory"
+ );
}
+