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author | ramelg01 <ramy.elgammal@arm.com> | 2022-04-08 03:52:28 +0100 |
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committer | Ramy Elgammal <ramy.elgammal@arm.com> | 2022-04-25 15:35:59 +0000 |
commit | c827e99fc46521f43719b0c2d1b6f05d66abf68c (patch) | |
tree | 31df1002673b2a4c4aae66608ad85b1ad6517050 /src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp | |
parent | 0a3948394e7e77344201b8732e9c20fcb5fa9a38 (diff) | |
download | ComputeLibrary-c827e99fc46521f43719b0c2d1b6f05d66abf68c.tar.gz |
Update Neon™ pooling kernel
- Reduce duplication and simplify overall structure.
- Improve multi-threaded performance by sharing more data
in lower-level caches.
Partially Resolves: COMPMID-5054
Signed-off-by: Ramy Elgammal<ramy.elgammal@arm.com>
Change-Id: I5f4dc50913401d5c1cbfc10b866fae9490cbc4d7
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/7404
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Andrew Mundy
Reviewed-by: Sheri Zhang <sheri.zhang@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp')
-rw-r--r-- | src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp | 27 |
1 files changed, 9 insertions, 18 deletions
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp index 0103de812d..556d833681 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 Arm Limited. + * Copyright (c) 2021-2022 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -29,27 +29,18 @@ namespace pooling { void a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst_impl(unsigned int, const uint8_t *const *const, uint8_t *const *const, bool, unsigned int, unsigned int, unsigned int, unsigned int); -struct a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst +struct a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst : public DepthfirstStrategy<uint8_t, uint8_t> { - typedef uint8_t operand_type; - typedef uint8_t return_type; + using Parent = DepthfirstStrategy<uint8_t, uint8_t>; - typedef void (*kern_type)(unsigned int, const uint8_t *const *const, uint8_t *const *const, bool, unsigned int, unsigned int, unsigned int, unsigned int); + const static auto pooling_type = PoolingType::MAX; + const static auto pool_rows = 2u, pool_cols = 2u; + const static auto stride_rows = 1u, stride_cols = 1u; - constexpr static PoolingType pooling_type(void) { return PoolingType::MAX; } + a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst(const CPUInfo *) + : Parent(pool_rows, pool_cols, stride_rows, stride_cols, 2, 2) {} - constexpr static unsigned int pool_rows(void) { return 2; } - constexpr static unsigned int pool_cols(void) { return 2; } - - constexpr static unsigned int stride_rows(void) { return 1; } - constexpr static unsigned int stride_cols(void) { return 1; } - - constexpr static unsigned int out_rows(void) { return 2; } - constexpr static unsigned int out_cols(void) { return 2; } - - kern_type kernel = a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst_impl; - - a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst(const CPUInfo *) {} + Parent::KernelType get_kernel(void) const { return a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst_impl; } }; } // namespace pooling |