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| author | Michael Tyler <michael.tyler@arm.com> | 2023-02-01 16:37:07 +0000 |
|---|---|---|
| committer | michael.tyler <michael.tyler@arm.com> | 2023-02-08 15:33:26 +0000 |
| commit | 7d9a626aaba9837cb82d189a9c4f0bcef58825bb (patch) | |
| tree | e3d8cfeb7f8539cca3a8bf2f1a8f412d25d89041 /src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst | |
| parent | 4e2bbbbb23e6f4bd452f7f865e51228e1f51efec (diff) | |
| download | ComputeLibrary-7d9a626aaba9837cb82d189a9c4f0bcef58825bb.tar.gz | |
Update CPU kernels to remove x19 and w19
Resolves: COMPMID-5805
Change-Id: Idf720bbb136474810086f5089c5ed23b3f79835a
Signed-off-by: Michael Tyler <michael.tyler@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/9081
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Diffstat (limited to 'src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst')
3 files changed, 402 insertions, 657 deletions
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic.cpp deleted file mode 100644 index eddcffc196..0000000000 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic.cpp +++ /dev/null @@ -1,255 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. - * - * SPDX-License-Identifier: MIT - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to - * deal in the Software without restriction, including without limitation the - * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include <cstddef> -#include <cstdint> - -#if defined(ARM_COMPUTE_ENABLE_SVE) - -namespace arm_conv { -namespace depthwise { - -void sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_impl( - const float *const *const input_ptrs, - float *const *const outptrs, - const void *params, - unsigned int n_channels, - const float activation_min, - const float activation_max -) -{ - const float *const inptrs[16] = { - input_ptrs[0], input_ptrs[1], input_ptrs[4], input_ptrs[5], input_ptrs[2], input_ptrs[6], input_ptrs[3], input_ptrs[7], input_ptrs[8], input_ptrs[9], input_ptrs[10], input_ptrs[11], input_ptrs[12], input_ptrs[13], input_ptrs[14], input_ptrs[15], - }; - const float minmax_vals[2] = { activation_min, activation_max }; - - __asm__ __volatile__( - "ldp x26, x23, [%x[inptrs], #0x0]\n" - "ptrue p2.b\n" - "ldp x25, x16, [%x[inptrs], #0x10]\n" - "mov x15, #0x0\n" - "ld1w { z15.s }, p2/Z, [%x[params]]\n" - "mov z14.d, z15.d\n" - "ld1w { z13.s }, p2/Z, [%x[params], #1, MUL VL]\n" - "cntw x14\n" - "mov z12.d, z15.d\n" - "ld1w { z11.s }, p2/Z, [%x[params], #2, MUL VL]\n" - "sub x13, XZR, x14\n" - "mov z10.d, z15.d\n" - "ld1w { z9.s }, p2/Z, [%x[params], #3, MUL VL]\n" - "whilelt p1.s, XZR, %x[n_channels]\n" - "mov z8.d, z15.d\n" - "ld1w { z7.s }, p2/Z, [%x[params], #4, MUL VL]\n" - "cmp x14, %x[n_channels]\n" - "ld1w { z6.s }, p2/Z, [%x[params], #5, MUL VL]\n" - "ld1w { z5.s }, p2/Z, [%x[params], #6, MUL VL]\n" - "ld1w { z4.s }, p2/Z, [%x[params], #7, MUL VL]\n" - "addvl %x[params], %x[params], #16\n" - "ld1w { z3.s }, p1/Z, [x26, x15, LSL #2]\n" - "ld1w { z2.s }, p2/Z, [%x[params], #-8, MUL VL]\n" - "ld1w { z1.s }, p2/Z, [%x[params], #-7, MUL VL]\n" - "addvl %x[params], %x[params], #-6\n" - "ld1w { z0.s }, p1/Z, [x23, x15, LSL #2]\n" - "ld1w { z31.s }, p1/Z, [x25, x15, LSL #2]\n" - "ld1w { z30.s }, p1/Z, [x16, x15, LSL #2]\n" - "ldp x24, x12, [%x[inptrs], #0x20]\n" - "ldp x23, x11, [%x[inptrs], #0x30]\n" - "ldp x10, x9, [%x[inptrs], #0x40]\n" - "ld1w { z29.s }, p1/Z, [x24, x15, LSL #2]\n" - "ld1w { z28.s }, p1/Z, [x12, x15, LSL #2]\n" - "ld1w { z27.s }, p1/Z, [x23, x15, LSL #2]\n" - "ld1w { z26.s }, p1/Z, [x11, x15, LSL #2]\n" - "ld1w { z25.s }, p1/Z, [x10, x15, LSL #2]\n" - "ld1w { z24.s }, p1/Z, [x9, x15, LSL #2]\n" - "ldp x28, x27, [%x[inptrs], #0x50]\n" - "ldp x26, x25, [%x[inptrs], #0x60]\n" - "ldp x24, x23, [%x[inptrs], #0x70]\n" - "ld1w { z23.s }, p1/Z, [x28, x15, LSL #2]\n" - "ld1w { z22.s }, p1/Z, [x27, x15, LSL #2]\n" - "ld1w { z21.s }, p1/Z, [x26, x15, LSL #2]\n" - "ld1w { z20.s }, p1/Z, [x25, x15, LSL #2]\n" - "ld1w { z19.s }, p1/Z, [x24, x15, LSL #2]\n" - "ld1w { z18.s }, p1/Z, [x23, x15, LSL #2]\n" - "ldp x22, x21, [%x[outptrs], #0x0]\n" - "ldp x20, x19, [%x[outptrs], #0x10]\n" - "ld1rw { z17.s }, p2/Z, [%x[minmax_vals]]\n" - "ld1rw { z16.s }, p2/Z, [%x[minmax_vals], #4]\n" - "bge 1f\n" - "1:" // Loop - "fmla z14.s, p2/M, z13.s, z3.s\n" - "ld1w { z15.s }, p2/Z, [%x[params]]\n" - "incw x13\n" - "fmla z12.s, p2/M, z13.s, z0.s\n" - "ldp x26, x23, [%x[inptrs], #0x0]\n" - "mov p0.b, p1.b\n" - "fmla z10.s, p2/M, z13.s, z31.s\n" - "ldp x25, x16, [%x[inptrs], #0x10]\n" - "mov x15, x14\n" - "fmla z8.s, p2/M, z13.s, z30.s\n" - "ld1w { z13.s }, p2/Z, [%x[params], #1, MUL VL]\n" - "incw x14\n" - "fmla z14.s, p2/M, z11.s, z0.s\n" - "ldp x24, x12, [%x[inptrs], #0x20]\n" - "whilelt p1.s, x15, %x[n_channels]\n" - "fmla z12.s, p2/M, z11.s, z29.s\n" - "ld1w { z3.s }, p1/Z, [x26, x15, LSL #2]\n" - "cmp x14, %x[n_channels]\n" - "fmla z10.s, p2/M, z11.s, z30.s\n" - "ld1w { z0.s }, p1/Z, [x23, x15, LSL #2]\n" - "ldp x23, x11, [%x[inptrs], #0x30]\n" - "fmla z8.s, p2/M, z11.s, z28.s\n" - "ld1w { z11.s }, p2/Z, [%x[params], #2, MUL VL]\n" - "fmla z14.s, p2/M, z9.s, z29.s\n" - "ld1w { z29.s }, p1/Z, [x24, x15, LSL #2]\n" - "fmla z12.s, p2/M, z9.s, z27.s\n" - "ld1w { z27.s }, p1/Z, [x23, x15, LSL #2]\n" - "fmla z10.s, p2/M, z9.s, z28.s\n" - "ldp x10, x9, [%x[inptrs], #0x40]\n" - "fmla z8.s, p2/M, z9.s, z26.s\n" - "ld1w { z9.s }, p2/Z, [%x[params], #3, MUL VL]\n" - "fmla z14.s, p2/M, z7.s, z31.s\n" - "ld1w { z31.s }, p1/Z, [x25, x15, LSL #2]\n" - "fmla z12.s, p2/M, z7.s, z30.s\n" - "ldp x28, x27, [%x[inptrs], #0x50]\n" - "fmla z10.s, p2/M, z7.s, z25.s\n" - "ldp x26, x25, [%x[inptrs], #0x60]\n" - "fmla z8.s, p2/M, z7.s, z24.s\n" - "ld1w { z7.s }, p2/Z, [%x[params], #4, MUL VL]\n" - "fmla z14.s, p2/M, z6.s, z30.s\n" - "ld1w { z30.s }, p1/Z, [x16, x15, LSL #2]\n" - "fmla z12.s, p2/M, z6.s, z28.s\n" - "ldp x24, x23, [%x[inptrs], #0x70]\n" - "fmla z10.s, p2/M, z6.s, z24.s\n" - "fmla z8.s, p2/M, z6.s, z23.s\n" - "ld1w { z6.s }, p2/Z, [%x[params], #5, MUL VL]\n" - "fmla z14.s, p2/M, z5.s, z28.s\n" - "ld1w { z28.s }, p1/Z, [x12, x15, LSL #2]\n" - "fmla z12.s, p2/M, z5.s, z26.s\n" - "ld1w { z26.s }, p1/Z, [x11, x15, LSL #2]\n" - "fmla z10.s, p2/M, z5.s, z23.s\n" - "fmla z8.s, p2/M, z5.s, z22.s\n" - "ld1w { z5.s }, p2/Z, [%x[params], #6, MUL VL]\n" - "fmla z14.s, p2/M, z4.s, z25.s\n" - "ld1w { z25.s }, p1/Z, [x10, x15, LSL #2]\n" - "fmla z12.s, p2/M, z4.s, z24.s\n" - "fmla z10.s, p2/M, z4.s, z21.s\n" - "ld1w { z21.s }, p1/Z, [x26, x15, LSL #2]\n" - "fmla z8.s, p2/M, z4.s, z20.s\n" - "ld1w { z4.s }, p2/Z, [%x[params], #7, MUL VL]\n" - "addvl %x[params], %x[params], #16\n" - "fmla z14.s, p2/M, z2.s, z24.s\n" - "ld1w { z24.s }, p1/Z, [x9, x15, LSL #2]\n" - "fmla z12.s, p2/M, z2.s, z23.s\n" - "fmla z10.s, p2/M, z2.s, z20.s\n" - "ld1w { z20.s }, p1/Z, [x25, x15, LSL #2]\n" - "fmla z8.s, p2/M, z2.s, z19.s\n" - "ld1w { z2.s }, p2/Z, [%x[params], #-8, MUL VL]\n" - "fmla z14.s, p2/M, z1.s, z23.s\n" - "ld1w { z23.s }, p1/Z, [x28, x15, LSL #2]\n" - "fmla z12.s, p2/M, z1.s, z22.s\n" - "ld1w { z22.s }, p1/Z, [x27, x15, LSL #2]\n" - "fmla z10.s, p2/M, z1.s, z19.s\n" - "ld1w { z19.s }, p1/Z, [x24, x15, LSL #2]\n" - "fmla z8.s, p2/M, z1.s, z18.s\n" - "ld1w { z1.s }, p2/Z, [%x[params], #-7, MUL VL]\n" - "addvl %x[params], %x[params], #-6\n" - "fmax z14.s, p2/M, z14.s, z17.s\n" - "ld1w { z18.s }, p1/Z, [x23, x15, LSL #2]\n" - "fmax z12.s, p2/M, z12.s, z17.s\n" - "fmax z10.s, p2/M, z10.s, z17.s\n" - "fmax z8.s, p2/M, z8.s, z17.s\n" - "fmin z14.s, p2/M, z14.s, z16.s\n" - "st1w { z14.s }, p0, [x22, x13, LSL #2]\n" - "mov z14.d, z15.d\n" - "fmin z12.s, p2/M, z12.s, z16.s\n" - "st1w { z12.s }, p0, [x21, x13, LSL #2]\n" - "mov z12.d, z15.d\n" - "fmin z10.s, p2/M, z10.s, z16.s\n" - "st1w { z10.s }, p0, [x20, x13, LSL #2]\n" - "mov z10.d, z15.d\n" - "fmin z8.s, p2/M, z8.s, z16.s\n" - "st1w { z8.s }, p0, [x19, x13, LSL #2]\n" - "mov z8.d, z15.d\n" - "blt 1b\n" - "2:" // Tail - "fmla z14.s, p2/M, z13.s, z3.s\n" - "incw x13\n" - "fmla z12.s, p2/M, z13.s, z0.s\n" - "mov p0.b, p1.b\n" - "fmla z10.s, p2/M, z13.s, z31.s\n" - "fmla z8.s, p2/M, z13.s, z30.s\n" - "fmla z14.s, p2/M, z11.s, z0.s\n" - "fmla z12.s, p2/M, z11.s, z29.s\n" - "fmla z10.s, p2/M, z11.s, z30.s\n" - "fmla z8.s, p2/M, z11.s, z28.s\n" - "fmla z14.s, p2/M, z9.s, z29.s\n" - "fmla z12.s, p2/M, z9.s, z27.s\n" - "fmla z10.s, p2/M, z9.s, z28.s\n" - "fmla z8.s, p2/M, z9.s, z26.s\n" - "fmla z14.s, p2/M, z7.s, z31.s\n" - "fmla z12.s, p2/M, z7.s, z30.s\n" - "fmla z10.s, p2/M, z7.s, z25.s\n" - "fmla z8.s, p2/M, z7.s, z24.s\n" - "fmla z14.s, p2/M, z6.s, z30.s\n" - "fmla z12.s, p2/M, z6.s, z28.s\n" - "fmla z10.s, p2/M, z6.s, z24.s\n" - "fmla z8.s, p2/M, z6.s, z23.s\n" - "fmla z14.s, p2/M, z5.s, z28.s\n" - "fmla z12.s, p2/M, z5.s, z26.s\n" - "fmla z10.s, p2/M, z5.s, z23.s\n" - "fmla z8.s, p2/M, z5.s, z22.s\n" - "fmla z14.s, p2/M, z4.s, z25.s\n" - "fmla z12.s, p2/M, z4.s, z24.s\n" - "fmla z10.s, p2/M, z4.s, z21.s\n" - "fmla z8.s, p2/M, z4.s, z20.s\n" - "fmla z14.s, p2/M, z2.s, z24.s\n" - "fmla z12.s, p2/M, z2.s, z23.s\n" - "fmla z10.s, p2/M, z2.s, z20.s\n" - "fmla z8.s, p2/M, z2.s, z19.s\n" - "fmla z14.s, p2/M, z1.s, z23.s\n" - "fmla z12.s, p2/M, z1.s, z22.s\n" - "fmla z10.s, p2/M, z1.s, z19.s\n" - "fmla z8.s, p2/M, z1.s, z18.s\n" - "fmax z14.s, p2/M, z14.s, z17.s\n" - "fmax z12.s, p2/M, z12.s, z17.s\n" - "fmax z10.s, p2/M, z10.s, z17.s\n" - "fmax z8.s, p2/M, z8.s, z17.s\n" - "fmin z14.s, p2/M, z14.s, z16.s\n" - "st1w { z14.s }, p0, [x22, x13, LSL #2]\n" - "fmin z12.s, p2/M, z12.s, z16.s\n" - "fmin z10.s, p2/M, z10.s, z16.s\n" - "st1w { z12.s }, p0, [x21, x13, LSL #2]\n" - "fmin z8.s, p2/M, z8.s, z16.s\n" - "st1w { z10.s }, p0, [x20, x13, LSL #2]\n" - "st1w { z8.s }, p0, [x19, x13, LSL #2]\n" - : [params] "+r" (params) - : [inptrs] "r" (inptrs), [minmax_vals] "r" (minmax_vals), [n_channels] "r" ((unsigned long) n_channels), [outptrs] "r" (outptrs) - : "cc", "memory", "p0", "p1", "p2", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31" - ); -} - -} // namespace depthwise -} // namespace arm_conv - -#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp index 571246be3e..a570c5aa6a 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 Arm Limited. + * Copyright (c) 2021, 2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -88,225 +88,225 @@ void sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_direct_impl( __asm__ __volatile__( "ptrue p3.b\n" - "mov x17, #0x0\n" - "mov x16, #0x0\n" + "mov x10, #0x0\n" + "mov x14, #0x0\n" "1:" // Tile loop - "str x17, [%x[params_struct], %[offsetof_args_tile_i]]\n" - "mov x23, #0x2\n" - "str x16, [%x[params_struct], %[offsetof_args_tile_j]]\n" - "mov x15, #0x2\n" - "ldr x14, [%x[params_struct], %[offsetof_args_params]]\n" - "mov x13, #0x0\n" - "ldr x22, [%x[params_struct], %[offsetof_args_ld_input_row]]\n" - "cntw x12\n" - "ldr x11, [%x[params_struct], %[offsetof_args_ld_input_col]]\n" - "sub x21, XZR, x12\n" - "ldr x10, [%x[params_struct], %[offsetof_args_inptr]]\n" - "mul x19, x17, x22\n" // offset = tile_i * ld_input_row - "ldr x20, [%x[params_struct], %[offsetof_args_ld_output_row]]\n" - "madd x19, x16, x11, x19\n" // offset += tile_j * ld_input_col - "ldr x9, [%x[params_struct], %[offsetof_args_ld_output_col]]\n" - "mul x19, x19, x23\n" // offset *= kernel_stride * output_size - "ldr x28, [%x[params_struct], %[offsetof_args_outptr]]\n" - "add x10, x10, x19, LSL #2\n" // inptr[0] += offset * sizeof(float) - "ld1rw { z18.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n" - "add x27, x10, x22, LSL #2\n" - "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n" - "add x26, x27, x22, LSL #2\n" - "ld1w { z16.s }, p3/Z, [x14]\n" - "add x25, x26, x22, LSL #2\n" - "ld1w { z0.s }, p3/Z, [x14, #1, MUL VL]\n" - "add x24, x11, x11\n" - "ld1w { z1.s }, p3/Z, [x14, #2, MUL VL]\n" - "add x23, x24, x11\n" - "ld1w { z2.s }, p3/Z, [x14, #3, MUL VL]\n" - "mul x19, x17, x20\n" // offset = tile_i * ld_output_row - "ld1w { z3.s }, p3/Z, [x14, #4, MUL VL]\n" - "madd x19, x16, x9, x19\n" // offset += tile_j * ld_output_col - "ld1w { z4.s }, p3/Z, [x14, #5, MUL VL]\n" - "mul x19, x19, x15\n" // offset *= output_tile_size - "ld1w { z5.s }, p3/Z, [x14, #6, MUL VL]\n" - "add x28, x28, x19, LSL #2\n" // outptrs[0] += offset * sizeof(float) - "ld1w { z6.s }, p3/Z, [x14, #7, MUL VL]\n" - "add x22, x28, x20, LSL #2\n" + "str x10, [%x[params_struct], %[offsetof_args_tile_i]]\n" + "mov x25, #0x2\n" + "mov x24, #0x2\n" + "str x14, [%x[params_struct], %[offsetof_args_tile_j]]\n" + "ldr x23, [%x[params_struct], %[offsetof_args_ld_input_row]]\n" + "ldr x22, [%x[params_struct], %[offsetof_args_ld_output_row]]\n" + "mul x21, x10, x23\n" // offset = tile_i * ld_input_row + "ldr x13, [%x[params_struct], %[offsetof_args_ld_input_col]]\n" + "ldr x12, [%x[params_struct], %[offsetof_args_ld_output_col]]\n" + "mul x20, x10, x22\n" // offset = tile_i * ld_output_row + "cntw x11\n" + "madd x21, x14, x13, x21\n" // offset += tile_j * ld_input_col + "ldr x10, [%x[params_struct], %[offsetof_args_params]]\n" + "ldr x9, [%x[params_struct], %[offsetof_args_inptr]]\n" "whilelt p2.s, XZR, %x[n_channels]\n" - "ld1w { z9.s }, p2/Z, [x27, x11, LSL #2]\n" - "ld1w { z10.s }, p2/Z, [x10]\n" - "addvl x14, x14, #16\n" - "ld1w { z11.s }, p2/Z, [x10, x23, LSL #2]\n" - "cmp x12, %x[n_channels]\n" - "ld1w { z7.s }, p3/Z, [x14, #-8, MUL VL]\n" - "ld1w { z8.s }, p3/Z, [x14, #-7, MUL VL]\n" - "addvl x14, x14, #-6\n" - "ld1w { z12.s }, p2/Z, [x27, x24, LSL #2]\n" - "ld1w { z13.s }, p2/Z, [x26, x11, LSL #2]\n" + "madd x20, x14, x12, x20\n" // offset += tile_j * ld_output_col + "ldr x28, [%x[params_struct], %[offsetof_args_outptr]]\n" + "ld1w { z18.s }, p3/Z, [x10]\n" + "add x27, x13, x13\n" + "mul x21, x21, x25\n" // offset *= kernel_stride * output_size + "add x9, x9, x21, LSL #2\n" // inptr[0] += offset * sizeof(float) + "ld1w { z0.s }, p3/Z, [x10, #1, MUL VL]\n" + "ld1w { z1.s }, p3/Z, [x10, #2, MUL VL]\n" + "mul x20, x20, x24\n" // offset *= output_tile_size + "ld1w { z2.s }, p3/Z, [x10, #3, MUL VL]\n" + "ld1w { z3.s }, p3/Z, [x10, #4, MUL VL]\n" + "add x26, x9, x23, LSL #2\n" + "ld1w { z4.s }, p3/Z, [x10, #5, MUL VL]\n" + "ld1w { z5.s }, p3/Z, [x10, #6, MUL VL]\n" + "add x25, x26, x23, LSL #2\n" + "add x24, x27, x13\n" + "ld1w { z6.s }, p3/Z, [x10, #7, MUL VL]\n" + "addvl x10, x10, #16\n" + "add x28, x28, x20, LSL #2\n" // outptrs[0] += offset * sizeof(float) + "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n" + "cmp x11, %x[n_channels]\n" + "add x23, x25, x23, LSL #2\n" + "ld1rw { z16.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n" + "ld1w { z7.s }, p3/Z, [x10, #-8, MUL VL]\n" + "add x22, x28, x22, LSL #2\n" + "mov x21, #0x0\n" + "ld1w { z8.s }, p3/Z, [x10, #-7, MUL VL]\n" + "ld1w { z9.s }, p2/Z, [x26, x13, LSL #2]\n" + "sub x20, XZR, x11\n" + "ld1w { z10.s }, p2/Z, [x9]\n" + "ld1w { z11.s }, p2/Z, [x9, x24, LSL #2]\n" + "addvl x10, x10, #-6\n" + "ld1w { z12.s }, p2/Z, [x26, x27, LSL #2]\n" + "ld1w { z13.s }, p2/Z, [x25, x13, LSL #2]\n" "bge 3f\n" "2:" // Tile loop: Channel loop - "movprfx z31, z16\n fmla z31.s, p3/M, z4.s, z9.s\n" - "whilelt p1.s, x12, %x[n_channels]\n" - "movprfx z30, z16\n fmla z30.s, p3/M, z3.s, z9.s\n" + "movprfx z28, z18\n fmla z28.s, p3/M, z4.s, z9.s\n" + "movprfx z29, z18\n fmla z29.s, p3/M, z3.s, z9.s\n" + "whilelt p1.s, x11, %x[n_channels]\n" "incw x21\n" - "movprfx z29, z16\n fmla z29.s, p3/M, z1.s, z9.s\n" + "movprfx z30, z18\n fmla z30.s, p3/M, z1.s, z9.s\n" + "movprfx z31, z18\n fmla z31.s, p3/M, z0.s, z9.s\n" + "ld1w { z9.s }, p2/Z, [x23]\n" + "incw x11\n" + "fmla z28.s, p3/M, z0.s, z10.s\n" + "fmla z29.s, p3/M, z2.s, z11.s\n" + "ld1w { z11.s }, p2/Z, [x23, x24, LSL #2]\n" + "ld1w { z10.s }, p2/Z, [x25, x27, LSL #2]\n" + "fmla z30.s, p3/M, z2.s, z12.s\n" + "fmla z31.s, p3/M, z1.s, z12.s\n" "mov p0.b, p2.b\n" - "movprfx z28, z16\n fmla z28.s, p3/M, z0.s, z9.s\n" - "ld1w { z9.s }, p2/Z, [x25]\n" - "incw x13\n" - "fmla z31.s, p3/M, z0.s, z10.s\n" - "ld1w { z10.s }, p2/Z, [x26, x24, LSL #2]\n" - "incw x12\n" - "fmla z30.s, p3/M, z2.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x25, x23, LSL #2]\n" - "fmla z29.s, p3/M, z2.s, z12.s\n" - "ld1w { z16.s }, p3/Z, [x14]\n" + "ld1w { z18.s }, p3/Z, [x10]\n" + "fmla z28.s, p3/M, z5.s, z12.s\n" + "fmla z29.s, p3/M, z4.s, z12.s\n" + "ld1w { z12.s }, p2/Z, [x9, x13, LSL #2]\n" + "incw x20\n" + "fmla z30.s, p3/M, z6.s, z9.s\n" + "fmla z31.s, p3/M, z3.s, z13.s\n" + "ld1w { z9.s }, p2/Z, [x9, x27, LSL #2]\n" + "addvl x9, x9, #1\n" + "fmla z28.s, p3/M, z7.s, z13.s\n" + "fmla z29.s, p3/M, z6.s, z13.s\n" + "fmla z30.s, p3/M, z4.s, z13.s\n" + "fmla z31.s, p3/M, z8.s, z11.s\n" + "ld1w { z11.s }, p2/Z, [x26]\n" "fmla z28.s, p3/M, z1.s, z12.s\n" - "fmla z31.s, p3/M, z5.s, z12.s\n" - "fmla z30.s, p3/M, z4.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x10, x11, LSL #2]\n" - "fmla z29.s, p3/M, z6.s, z9.s\n" - "ld1w { z9.s }, p2/Z, [x10, x24, LSL #2]\n" - "addvl x10, x10, #1\n" - "fmla z28.s, p3/M, z3.s, z13.s\n" - "fmla z31.s, p3/M, z7.s, z13.s\n" - "fmla z30.s, p3/M, z6.s, z13.s\n" - "fmla z29.s, p3/M, z4.s, z13.s\n" - "fmla z28.s, p3/M, z8.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x27]\n" - "fmla z31.s, p3/M, z1.s, z12.s\n" - "fmla z30.s, p3/M, z0.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x27, x23, LSL #2]\n" - "addvl x27, x27, #1\n" - "fmla z29.s, p3/M, z5.s, z10.s\n" - "fmla z28.s, p3/M, z4.s, z10.s\n" - "ld1w { z4.s }, p3/Z, [x14, #5, MUL VL]\n" - "fmla z31.s, p3/M, z2.s, z9.s\n" - "fmla z30.s, p3/M, z1.s, z9.s\n" - "ld1w { z9.s }, p2/Z, [x26]\n" - "ld1w { z1.s }, p3/Z, [x14, #2, MUL VL]\n" - "fmla z29.s, p3/M, z0.s, z11.s\n" - "ld1w { z0.s }, p3/Z, [x14, #1, MUL VL]\n" - "fmla z28.s, p3/M, z2.s, z12.s\n" - "ld1w { z2.s }, p3/Z, [x14, #3, MUL VL]\n" - "fmla z31.s, p3/M, z8.s, z10.s\n" - "fmla z30.s, p3/M, z7.s, z10.s\n" - "ld1w { z10.s }, p2/Z, [x26, x23, LSL #2]\n" + "fmla z29.s, p3/M, z0.s, z12.s\n" + "ld1w { z12.s }, p2/Z, [x26, x24, LSL #2]\n" "addvl x26, x26, #1\n" - "fmla z29.s, p3/M, z3.s, z9.s\n" - "ld1w { z13.s }, p1/Z, [x26, x11, LSL #2]\n" - "fmla z31.s, p3/M, z3.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x25, x11, LSL #2]\n" - "fmla z28.s, p3/M, z5.s, z10.s\n" - "ld1w { z3.s }, p3/Z, [x14, #4, MUL VL]\n" - "fmla z30.s, p3/M, z5.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x25, x24, LSL #2]\n" - "whilelt p2.s, x13, %x[n_channels]\n" - "fmla z29.s, p3/M, z7.s, z11.s\n" - "ld1w { z5.s }, p3/Z, [x14, #6, MUL VL]\n" + "fmla z30.s, p3/M, z5.s, z10.s\n" + "fmla z31.s, p3/M, z4.s, z10.s\n" + "ld1w { z4.s }, p3/Z, [x10, #5, MUL VL]\n" + "fmla z28.s, p3/M, z2.s, z9.s\n" + "fmla z29.s, p3/M, z1.s, z9.s\n" + "ld1w { z9.s }, p2/Z, [x25]\n" + "ld1w { z1.s }, p3/Z, [x10, #2, MUL VL]\n" + "fmla z30.s, p3/M, z0.s, z11.s\n" + "fmla z31.s, p3/M, z2.s, z12.s\n" + "ld1w { z0.s }, p3/Z, [x10, #1, MUL VL]\n" + "ld1w { z2.s }, p3/Z, [x10, #3, MUL VL]\n" + "fmla z28.s, p3/M, z8.s, z10.s\n" + "fmla z29.s, p3/M, z7.s, z10.s\n" + "ld1w { z10.s }, p2/Z, [x25, x24, LSL #2]\n" "addvl x25, x25, #1\n" - "fmla z31.s, p3/M, z6.s, z9.s\n" - "ld1w { z9.s }, p1/Z, [x27, x11, LSL #2]\n" - "cmp x12, %x[n_channels]\n" - "fmla z30.s, p3/M, z8.s, z10.s\n" - "ld1w { z10.s }, p1/Z, [x10]\n" - "fmla z28.s, p3/M, z6.s, z11.s\n" - "ld1w { z11.s }, p1/Z, [x10, x23, LSL #2]\n" - "ld1w { z6.s }, p3/Z, [x14, #7, MUL VL]\n" - "fmla z29.s, p3/M, z8.s, z12.s\n" - "addvl x14, x14, #16\n" - "fmax z31.s, p3/M, z31.s, z18.s\n" - "ld1w { z8.s }, p3/Z, [x14, #-7, MUL VL]\n" - "fmla z28.s, p3/M, z7.s, z12.s\n" - "ld1w { z12.s }, p1/Z, [x27, x24, LSL #2]\n" - "fmax z30.s, p3/M, z30.s, z18.s\n" - "ld1w { z7.s }, p3/Z, [x14, #-8, MUL VL]\n" - "addvl x14, x14, #-6\n" - "fmax z29.s, p3/M, z29.s, z18.s\n" - "fmin z31.s, p3/M, z31.s, z17.s\n" - "st1w { z31.s }, p0, [x28]\n" - "fmin z30.s, p3/M, z30.s, z17.s\n" - "fmin z29.s, p3/M, z29.s, z17.s\n" - "st1w { z30.s }, p0, [x28, x9, LSL #2]\n" - "fmax z28.s, p3/M, z28.s, z18.s\n" + "fmla z30.s, p3/M, z3.s, z9.s\n" + "fmla z31.s, p3/M, z5.s, z10.s\n" + "ld1w { z13.s }, p1/Z, [x25, x13, LSL #2]\n" + "fmla z28.s, p3/M, z3.s, z11.s\n" + "ld1w { z11.s }, p2/Z, [x23, x13, LSL #2]\n" + "fmla z29.s, p3/M, z5.s, z12.s\n" + "ld1w { z12.s }, p2/Z, [x23, x27, LSL #2]\n" + "fmla z30.s, p3/M, z7.s, z11.s\n" + "fmla z31.s, p3/M, z6.s, z11.s\n" + "ld1w { z3.s }, p3/Z, [x10, #4, MUL VL]\n" + "ld1w { z5.s }, p3/Z, [x10, #6, MUL VL]\n" + "fmla z28.s, p3/M, z6.s, z9.s\n" + "fmla z29.s, p3/M, z8.s, z10.s\n" + "fmax z28.s, p3/M, z28.s, z17.s\n" + "fmax z29.s, p3/M, z29.s, z17.s\n" + "fmla z30.s, p3/M, z8.s, z12.s\n" + "fmla z31.s, p3/M, z7.s, z12.s\n" + "fmax z30.s, p3/M, z30.s, z17.s\n" + "fmax z31.s, p3/M, z31.s, z17.s\n" + "ld1w { z6.s }, p3/Z, [x10, #7, MUL VL]\n" + "addvl x10, x10, #16\n" + "whilelt p2.s, x21, %x[n_channels]\n" + "ld1w { z9.s }, p1/Z, [x26, x13, LSL #2]\n" + "cmp x11, %x[n_channels]\n" + "fmin z28.s, p3/M, z28.s, z16.s\n" + "ld1w { z10.s }, p1/Z, [x9]\n" + "ld1w { z11.s }, p1/Z, [x9, x24, LSL #2]\n" + "fmin z29.s, p3/M, z29.s, z16.s\n" + "fmin z30.s, p3/M, z30.s, z16.s\n" + "ld1w { z12.s }, p1/Z, [x26, x27, LSL #2]\n" + "st1w { z28.s }, p0, [x28]\n" + "fmin z31.s, p3/M, z31.s, z16.s\n" + "addvl x23, x23, #1\n" + "st1w { z29.s }, p0, [x28, x12, LSL #2]\n" + "ld1w { z7.s }, p3/Z, [x10, #-8, MUL VL]\n" + "st1w { z30.s }, p0, [x22]\n" "addvl x28, x28, #1\n" - "fmin z28.s, p3/M, z28.s, z17.s\n" - "st1w { z29.s }, p0, [x22]\n" - "st1w { z28.s }, p0, [x22, x9, LSL #2]\n" + "ld1w { z8.s }, p3/Z, [x10, #-7, MUL VL]\n" + "addvl x10, x10, #-6\n" + "st1w { z31.s }, p0, [x22, x12, LSL #2]\n" "addvl x22, x22, #1\n" "blt 2b\n" "3:" // Tile loop: Channel tail - "movprfx z31, z16\n fmla z31.s, p3/M, z4.s, z9.s\n" - "ldr x17, [%x[params_struct], %[offsetof_args_tile_i]]\n" - "mov p0.b, p2.b\n" - "movprfx z30, z16\n fmla z30.s, p3/M, z3.s, z9.s\n" - "ldr x16, [%x[params_struct], %[offsetof_args_tile_j]]\n" - "add x21, x17, #0x1\n" - "movprfx z29, z16\n fmla z29.s, p3/M, z1.s, z9.s\n" + "movprfx z28, z18\n fmla z28.s, p3/M, z4.s, z9.s\n" + "movprfx z29, z18\n fmla z29.s, p3/M, z3.s, z9.s\n" + "ldr x14, [%x[params_struct], %[offsetof_args_tile_j]]\n" + "ldr x10, [%x[params_struct], %[offsetof_args_tile_i]]\n" + "movprfx z30, z18\n fmla z30.s, p3/M, z1.s, z9.s\n" + "movprfx z31, z18\n fmla z31.s, p3/M, z0.s, z9.s\n" + "ld1w { z9.s }, p2/Z, [x23]\n" + "ldr x20, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n" + "fmla z28.s, p3/M, z0.s, z10.s\n" + "fmla z29.s, p3/M, z2.s, z11.s\n" + "ld1w { z11.s }, p2/Z, [x23, x24, LSL #2]\n" + "ld1w { z10.s }, p2/Z, [x25, x27, LSL #2]\n" + "fmla z30.s, p3/M, z2.s, z12.s\n" + "fmla z31.s, p3/M, z1.s, z12.s\n" + "add x14, x14, #0x1\n" + "cmp x14, x20\n" + "fmla z28.s, p3/M, z5.s, z12.s\n" + "fmla z29.s, p3/M, z4.s, z12.s\n" + "ld1w { z12.s }, p2/Z, [x9, x13, LSL #2]\n" + "add x21, x10, #0x1\n" + "fmla z30.s, p3/M, z6.s, z9.s\n" + "fmla z31.s, p3/M, z3.s, z13.s\n" + "ld1w { z9.s }, p2/Z, [x9, x27, LSL #2]\n" "ldr x20, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n" - "movprfx z28, z16\n fmla z28.s, p3/M, z0.s, z9.s\n" - "ld1w { z9.s }, p2/Z, [x25]\n" - "add x16, x16, #0x1\n" - "fmla z31.s, p3/M, z0.s, z10.s\n" - "ld1w { z10.s }, p2/Z, [x26, x24, LSL #2]\n" - "fmla z30.s, p3/M, z2.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x25, x23, LSL #2]\n" - "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n" - "fmla z29.s, p3/M, z2.s, z12.s\n" - "cmp x16, x19\n" - "fmla z31.s, p3/M, z5.s, z12.s\n" - "fmla z30.s, p3/M, z4.s, z12.s\n" - "csel x16, x16, XZR, LT\n" + "fmla z28.s, p3/M, z7.s, z13.s\n" + "fmla z29.s, p3/M, z6.s, z13.s\n" + "csel x10, x10, x21, LT\n" + "mov p0.b, p2.b\n" + "fmla z30.s, p3/M, z4.s, z13.s\n" + "fmla z31.s, p3/M, z8.s, z11.s\n" + "ld1w { z11.s }, p2/Z, [x26]\n" + "csel x14, x14, XZR, LT\n" "fmla z28.s, p3/M, z1.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x10, x11, LSL #2]\n" - "csel x17, x17, x21, LT\n" - "fmla z29.s, p3/M, z6.s, z9.s\n" - "ld1w { z9.s }, p2/Z, [x10, x24, LSL #2]\n" - "cmp x17, x20\n" - "fmla z31.s, p3/M, z7.s, z13.s\n" - "fmla z30.s, p3/M, z6.s, z13.s\n" - "fmla z28.s, p3/M, z3.s, z13.s\n" - "fmla z29.s, p3/M, z4.s, z13.s\n" - "fmla z31.s, p3/M, z1.s, z12.s\n" - "fmla z30.s, p3/M, z0.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x27, x23, LSL #2]\n" - "fmla z28.s, p3/M, z8.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x27]\n" - "fmla z29.s, p3/M, z5.s, z10.s\n" - "fmla z31.s, p3/M, z2.s, z9.s\n" - "fmla z30.s, p3/M, z1.s, z9.s\n" - "ld1w { z9.s }, p2/Z, [x26]\n" - "fmla z28.s, p3/M, z4.s, z10.s\n" - "fmla z29.s, p3/M, z0.s, z11.s\n" - "fmla z31.s, p3/M, z8.s, z10.s\n" - "fmla z30.s, p3/M, z7.s, z10.s\n" - "ld1w { z10.s }, p2/Z, [x26, x23, LSL #2]\n" - "fmla z28.s, p3/M, z2.s, z12.s\n" - "fmla z29.s, p3/M, z3.s, z9.s\n" - "fmla z31.s, p3/M, z3.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x25, x11, LSL #2]\n" - "fmla z30.s, p3/M, z5.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x25, x24, LSL #2]\n" - "fmla z28.s, p3/M, z5.s, z10.s\n" - "fmla z29.s, p3/M, z7.s, z11.s\n" - "fmla z31.s, p3/M, z6.s, z9.s\n" - "fmla z30.s, p3/M, z8.s, z10.s\n" - "fmla z28.s, p3/M, z6.s, z11.s\n" - "fmla z29.s, p3/M, z8.s, z12.s\n" - "fmax z31.s, p3/M, z31.s, z18.s\n" - "fmax z30.s, p3/M, z30.s, z18.s\n" - "fmla z28.s, p3/M, z7.s, z12.s\n" - "fmax z29.s, p3/M, z29.s, z18.s\n" - "fmin z31.s, p3/M, z31.s, z17.s\n" - "st1w { z31.s }, p0, [x28]\n" - "fmin z30.s, p3/M, z30.s, z17.s\n" - "fmin z29.s, p3/M, z29.s, z17.s\n" - "st1w { z30.s }, p0, [x28, x9, LSL #2]\n" - "fmax z28.s, p3/M, z28.s, z18.s\n" - "st1w { z29.s }, p0, [x22]\n" - "fmin z28.s, p3/M, z28.s, z17.s\n" - "st1w { z28.s }, p0, [x22, x9, LSL #2]\n" + "fmla z29.s, p3/M, z0.s, z12.s\n" + "ld1w { z12.s }, p2/Z, [x26, x24, LSL #2]\n" + "cmp x10, x20\n" + "fmla z30.s, p3/M, z5.s, z10.s\n" + "fmla z31.s, p3/M, z4.s, z10.s\n" + "fmla z28.s, p3/M, z2.s, z9.s\n" + "fmla z29.s, p3/M, z1.s, z9.s\n" + "ld1w { z9.s }, p2/Z, [x25]\n" + "fmla z30.s, p3/M, z0.s, z11.s\n" + "fmla z31.s, p3/M, z2.s, z12.s\n" + "fmla z28.s, p3/M, z8.s, z10.s\n" + "fmla z29.s, p3/M, z7.s, z10.s\n" + "ld1w { z10.s }, p2/Z, [x25, x24, LSL #2]\n" + "fmla z30.s, p3/M, z3.s, z9.s\n" + "fmla z31.s, p3/M, z5.s, z10.s\n" + "fmla z28.s, p3/M, z3.s, z11.s\n" + "ld1w { z11.s }, p2/Z, [x23, x13, LSL #2]\n" + "fmla z29.s, p3/M, z5.s, z12.s\n" + "ld1w { z12.s }, p2/Z, [x23, x27, LSL #2]\n" + "fmla z30.s, p3/M, z7.s, z11.s\n" + "fmla z31.s, p3/M, z6.s, z11.s\n" + "fmla z28.s, p3/M, z6.s, z9.s\n" + "fmla z29.s, p3/M, z8.s, z10.s\n" + "fmax z28.s, p3/M, z28.s, z17.s\n" + "fmax z29.s, p3/M, z29.s, z17.s\n" + "fmla z30.s, p3/M, z8.s, z12.s\n" + "fmla z31.s, p3/M, z7.s, z12.s\n" + "fmax z30.s, p3/M, z30.s, z17.s\n" + "fmax z31.s, p3/M, z31.s, z17.s\n" + "fmin z28.s, p3/M, z28.s, z16.s\n" + "fmin z29.s, p3/M, z29.s, z16.s\n" + "st1w { z28.s }, p0, [x28]\n" + "fmin z30.s, p3/M, z30.s, z16.s\n" + "fmin z31.s, p3/M, z31.s, z16.s\n" + "st1w { z29.s }, p0, [x28, x12, LSL #2]\n" + "st1w { z30.s }, p0, [x22]\n" + "st1w { z31.s }, p0, [x22, x12, LSL #2]\n" "blt 1b\n" : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_args_inptr] "I" (offsetof(Args, inptr)), [offsetof_args_ld_input_col] "I" (offsetof(Args, ld_input_col)), [offsetof_args_ld_input_row] "I" (offsetof(Args, ld_input_row)), [offsetof_args_ld_output_col] "I" (offsetof(Args, ld_output_col)), [offsetof_args_ld_output_row] "I" (offsetof(Args, ld_output_row)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_n_tile_cols] "I" (offsetof(Args, n_tile_cols)), [offsetof_args_n_tile_rows] "I" (offsetof(Args, n_tile_rows)), [offsetof_args_outptr] "I" (offsetof(Args, outptr)), [offsetof_args_params] "I" (offsetof(Args, params)), [offsetof_args_tile_i] "I" (offsetof(Args, tile_i)), [offsetof_args_tile_j] "I" (offsetof(Args, tile_j)), [params_struct] "r" (¶ms_struct) - : "cc", "memory", "p0", "p1", "p2", "p3", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z16", "z17", "z18", "z28", "z29", "z30", "z31" + : "cc", "memory", "p0", "p1", "p2", "p3", "x9", "x10", "x11", "x12", "x13", "x14", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z16", "z17", "z18", "z28", "z29", "z30", "z31" ); } diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp index 77a6c683b0..903de0d309 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 Arm Limited. + * Copyright (c) 2021, 2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -78,215 +78,215 @@ void sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_indirect_impl( activation_min, activation_max); __asm__ __volatile__( - "ldr x19, [%x[params_struct], %[offsetof_args_outptrs]]\n" "ptrue p3.b\n" - "ldr x15, [%x[params_struct], %[offsetof_args_params]]\n" - "add x14, %x[params_struct], %[offsetof_Args_inptrs]\n" - "ld1rw { z18.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n" - "mov x13, #0x0\n" - "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n" - "cntw x12\n" - "ldp x11, x10, [x19, #0x0]\n" - "sub x9, XZR, x12\n" - "ldp x28, x27, [x19, #0x10]\n" + "ldr x20, [%x[params_struct], %[offsetof_args_outptrs]]\n" + "ldr x16, [%x[params_struct], %[offsetof_args_params]]\n" + "add x15, %x[params_struct], %[offsetof_Args_inptrs]\n" + "cntw x14\n" + "ldp x13, x12, [x20, #0x0]\n" + "ldp x11, x10, [x20, #0x10]\n" + "mov x9, #0x0\n" "whilelt p2.s, XZR, %x[n_channels]\n" - "ld1w { z16.s }, p3/Z, [x15]\n" - "cmp x12, %x[n_channels]\n" - "ld1w { z0.s }, p3/Z, [x15, #1, MUL VL]\n" - "ld1w { z1.s }, p3/Z, [x15, #2, MUL VL]\n" - "ld1w { z2.s }, p3/Z, [x15, #3, MUL VL]\n" - "ld1w { z3.s }, p3/Z, [x15, #4, MUL VL]\n" - "ld1w { z4.s }, p3/Z, [x15, #5, MUL VL]\n" - "ld1w { z5.s }, p3/Z, [x15, #6, MUL VL]\n" - "ld1w { z6.s }, p3/Z, [x15, #7, MUL VL]\n" - "addvl x15, x15, #16\n" - "ldp x26, x25, [x14, #0x0]\n" - "ld1w { z7.s }, p3/Z, [x15, #-8, MUL VL]\n" - "ld1w { z8.s }, p3/Z, [x15, #-7, MUL VL]\n" - "addvl x15, x15, #-6\n" - "ld1w { z9.s }, p2/Z, [x26, x13, LSL #2]\n" - "ld1w { z10.s }, p2/Z, [x25, x13, LSL #2]\n" - "ldp x24, x23, [x14, #0x10]\n" - "ldr x22, [x14, #0x20]\n" - "ld1w { z11.s }, p2/Z, [x24, x13, LSL #2]\n" - "ld1w { z12.s }, p2/Z, [x23, x13, LSL #2]\n" - "ld1w { z13.s }, p2/Z, [x22, x13, LSL #2]\n" + "ld1w { z18.s }, p3/Z, [x16]\n" + "ld1w { z0.s }, p3/Z, [x16, #1, MUL VL]\n" + "cmp x14, %x[n_channels]\n" + "ld1w { z1.s }, p3/Z, [x16, #2, MUL VL]\n" + "ld1w { z2.s }, p3/Z, [x16, #3, MUL VL]\n" + "sub x28, XZR, x14\n" + "ld1w { z3.s }, p3/Z, [x16, #4, MUL VL]\n" + "ld1w { z4.s }, p3/Z, [x16, #5, MUL VL]\n" + "ld1w { z5.s }, p3/Z, [x16, #6, MUL VL]\n" + "ld1w { z6.s }, p3/Z, [x16, #7, MUL VL]\n" + "addvl x16, x16, #16\n" + "ldp x27, x26, [x15, #0x0]\n" + "ldp x25, x24, [x15, #0x10]\n" + "ldr x23, [x15, #0x20]\n" + "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n" + "ld1rw { z16.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n" + "ld1w { z7.s }, p3/Z, [x16, #-8, MUL VL]\n" + "ld1w { z8.s }, p3/Z, [x16, #-7, MUL VL]\n" + "ld1w { z9.s }, p2/Z, [x27, x9, LSL #2]\n" + "addvl x16, x16, #-6\n" + "ld1w { z10.s }, p2/Z, [x26, x9, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x25, x9, LSL #2]\n" + "ld1w { z12.s }, p2/Z, [x24, x9, LSL #2]\n" + "ld1w { z13.s }, p2/Z, [x23, x9, LSL #2]\n" "bge 2f\n" "1:" // Channel loop - "movprfx z31, z16\n fmla z31.s, p3/M, z4.s, z9.s\n" - "ldr x21, [x14, #0x28]\n" - "whilelt p1.s, x12, %x[n_channels]\n" - "movprfx z30, z16\n fmla z30.s, p3/M, z3.s, z9.s\n" - "ldr x20, [x14, #0x30]\n" - "incw x9\n" - "movprfx z29, z16\n fmla z29.s, p3/M, z1.s, z9.s\n" - "ldr x19, [x14, #0x38]\n" - "mov p0.b, p2.b\n" - "movprfx z28, z16\n fmla z28.s, p3/M, z0.s, z9.s\n" - "ld1w { z9.s }, p2/Z, [x21, x13, LSL #2]\n" - "ldr x26, [x14, #0x40]\n" - "fmla z31.s, p3/M, z0.s, z10.s\n" - "ldr x25, [x14, #0x48]\n" - "fmla z30.s, p3/M, z2.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x20, x13, LSL #2]\n" - "fmla z29.s, p3/M, z2.s, z12.s\n" - "ldr x24, [x14, #0x50]\n" - "fmla z28.s, p3/M, z1.s, z12.s\n" - "ld1w { z10.s }, p2/Z, [x25, x13, LSL #2]\n" - "fmla z31.s, p3/M, z5.s, z12.s\n" - "ldr x23, [x14, #0x58]\n" - "fmla z30.s, p3/M, z4.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x19, x13, LSL #2]\n" - "fmla z29.s, p3/M, z6.s, z9.s\n" - "ld1w { z9.s }, p2/Z, [x26, x13, LSL #2]\n" - "fmla z28.s, p3/M, z3.s, z13.s\n" - "ldr x22, [x14, #0x60]\n" - "fmla z31.s, p3/M, z7.s, z13.s\n" - "ldr x21, [x14, #0x68]\n" - "fmla z30.s, p3/M, z6.s, z13.s\n" - "ldr x20, [x14, #0x70]\n" - "fmla z29.s, p3/M, z4.s, z13.s\n" - "ldr x19, [x14, #0x78]\n" - "fmla z28.s, p3/M, z8.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x24, x13, LSL #2]\n" + "movprfx z28, z18\n fmla z28.s, p3/M, z4.s, z9.s\n" + "movprfx z29, z18\n fmla z29.s, p3/M, z3.s, z9.s\n" + "ldr x22, [x15, #0x28]\n" + "ldr x21, [x15, #0x30]\n" + "movprfx z30, z18\n fmla z30.s, p3/M, z1.s, z9.s\n" + "movprfx z31, z18\n fmla z31.s, p3/M, z0.s, z9.s\n" + "ld1w { z9.s }, p2/Z, [x22, x9, LSL #2]\n" + "ldr x20, [x15, #0x38]\n" + "fmla z28.s, p3/M, z0.s, z10.s\n" + "fmla z29.s, p3/M, z2.s, z11.s\n" + "ld1w { z11.s }, p2/Z, [x21, x9, LSL #2]\n" + "ldr x26, [x15, #0x48]\n" + "fmla z30.s, p3/M, z2.s, z12.s\n" "fmla z31.s, p3/M, z1.s, z12.s\n" - "ldp x26, x25, [x14, #0x0]\n" - "fmla z30.s, p3/M, z0.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x23, x13, LSL #2]\n" - "fmla z29.s, p3/M, z5.s, z10.s\n" - "ldp x24, x23, [x14, #0x10]\n" - "fmla z28.s, p3/M, z4.s, z10.s\n" - "ld1w { z16.s }, p3/Z, [x15]\n" - "fmla z31.s, p3/M, z2.s, z9.s\n" - "ld1w { z4.s }, p3/Z, [x15, #5, MUL VL]\n" - "fmla z30.s, p3/M, z1.s, z9.s\n" - "ld1w { z9.s }, p2/Z, [x22, x13, LSL #2]\n" - "fmla z29.s, p3/M, z0.s, z11.s\n" - "ldr x22, [x14, #0x20]\n" - "fmla z28.s, p3/M, z2.s, z12.s\n" - "ld1w { z0.s }, p3/Z, [x15, #1, MUL VL]\n" - "fmla z31.s, p3/M, z8.s, z10.s\n" - "ld1w { z1.s }, p3/Z, [x15, #2, MUL VL]\n" - "fmla z30.s, p3/M, z7.s, z10.s\n" - "ld1w { z10.s }, p2/Z, [x21, x13, LSL #2]\n" - "fmla z29.s, p3/M, z3.s, z9.s\n" - "ld1w { z13.s }, p1/Z, [x22, x12, LSL #2]\n" - "fmla z31.s, p3/M, z3.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x20, x13, LSL #2]\n" - "fmla z28.s, p3/M, z5.s, z10.s\n" - "ld1w { z2.s }, p3/Z, [x15, #3, MUL VL]\n" - "fmla z30.s, p3/M, z5.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x19, x13, LSL #2]\n" - "incw x13\n" - "fmla z29.s, p3/M, z7.s, z11.s\n" - "ld1w { z3.s }, p3/Z, [x15, #4, MUL VL]\n" - "whilelt p2.s, x13, %x[n_channels]\n" - "fmla z31.s, p3/M, z6.s, z9.s\n" - "ld1w { z9.s }, p1/Z, [x26, x12, LSL #2]\n" - "fmla z28.s, p3/M, z6.s, z11.s\n" - "ld1w { z11.s }, p1/Z, [x24, x12, LSL #2]\n" - "fmla z30.s, p3/M, z8.s, z10.s\n" - "ld1w { z10.s }, p1/Z, [x25, x12, LSL #2]\n" - "ld1w { z5.s }, p3/Z, [x15, #6, MUL VL]\n" - "fmla z29.s, p3/M, z8.s, z12.s\n" - "ld1w { z6.s }, p3/Z, [x15, #7, MUL VL]\n" - "fmla z28.s, p3/M, z7.s, z12.s\n" - "addvl x15, x15, #16\n" - "fmax z31.s, p3/M, z31.s, z18.s\n" - "ld1w { z12.s }, p1/Z, [x23, x12, LSL #2]\n" - "incw x12\n" - "fmax z30.s, p3/M, z30.s, z18.s\n" - "ld1w { z7.s }, p3/Z, [x15, #-8, MUL VL]\n" - "cmp x12, %x[n_channels]\n" - "fmax z29.s, p3/M, z29.s, z18.s\n" - "ld1w { z8.s }, p3/Z, [x15, #-7, MUL VL]\n" - "addvl x15, x15, #-6\n" - "fmax z28.s, p3/M, z28.s, z18.s\n" - "fmin z31.s, p3/M, z31.s, z17.s\n" - "st1w { z31.s }, p0, [x11, x9, LSL #2]\n" - "fmin z30.s, p3/M, z30.s, z17.s\n" - "fmin z29.s, p3/M, z29.s, z17.s\n" - "st1w { z30.s }, p0, [x10, x9, LSL #2]\n" - "fmin z28.s, p3/M, z28.s, z17.s\n" - "st1w { z29.s }, p0, [x28, x9, LSL #2]\n" - "st1w { z28.s }, p0, [x27, x9, LSL #2]\n" + "ldr x27, [x15, #0x40]\n" + "ld1w { z10.s }, p2/Z, [x26, x9, LSL #2]\n" + "fmla z28.s, p3/M, z5.s, z12.s\n" + "fmla z29.s, p3/M, z4.s, z12.s\n" + "ld1w { z12.s }, p2/Z, [x20, x9, LSL #2]\n" + "ldr x25, [x15, #0x50]\n" + "fmla z30.s, p3/M, z6.s, z9.s\n" + "fmla z31.s, p3/M, z3.s, z13.s\n" + "ld1w { z9.s }, p2/Z, [x27, x9, LSL #2]\n" + "ldr x24, [x15, #0x58]\n" + "fmla z28.s, p3/M, z7.s, z13.s\n" + "fmla z29.s, p3/M, z6.s, z13.s\n" + "ldr x23, [x15, #0x60]\n" + "ldr x22, [x15, #0x68]\n" + "fmla z30.s, p3/M, z4.s, z13.s\n" + "fmla z31.s, p3/M, z8.s, z11.s\n" + "ld1w { z11.s }, p2/Z, [x25, x9, LSL #2]\n" + "ldr x21, [x15, #0x70]\n" + "fmla z28.s, p3/M, z1.s, z12.s\n" + "fmla z29.s, p3/M, z0.s, z12.s\n" + "ld1w { z12.s }, p2/Z, [x24, x9, LSL #2]\n" + "ldr x20, [x15, #0x78]\n" + "fmla z30.s, p3/M, z5.s, z10.s\n" + "fmla z31.s, p3/M, z4.s, z10.s\n" + "whilelt p1.s, x14, %x[n_channels]\n" + "ldp x27, x26, [x15, #0x0]\n" + "fmla z28.s, p3/M, z2.s, z9.s\n" + "fmla z29.s, p3/M, z1.s, z9.s\n" + "ld1w { z9.s }, p2/Z, [x23, x9, LSL #2]\n" + "ldp x25, x24, [x15, #0x10]\n" + "fmla z30.s, p3/M, z0.s, z11.s\n" + "fmla z31.s, p3/M, z2.s, z12.s\n" + "ldr x23, [x15, #0x20]\n" + "ld1w { z13.s }, p1/Z, [x23, x14, LSL #2]\n" + "fmla z28.s, p3/M, z8.s, z10.s\n" + "fmla z29.s, p3/M, z7.s, z10.s\n" + "ld1w { z10.s }, p2/Z, [x22, x9, LSL #2]\n" + "incw x28\n" + "fmla z30.s, p3/M, z3.s, z9.s\n" + "fmla z31.s, p3/M, z5.s, z10.s\n" + "mov p0.b, p2.b\n" + "ld1w { z18.s }, p3/Z, [x16]\n" + "fmla z28.s, p3/M, z3.s, z11.s\n" + "ld1w { z11.s }, p2/Z, [x21, x9, LSL #2]\n" + "fmla z29.s, p3/M, z5.s, z12.s\n" + "ld1w { z12.s }, p2/Z, [x20, x9, LSL #2]\n" + "fmla z30.s, p3/M, z7.s, z11.s\n" + "fmla z31.s, p3/M, z6.s, z11.s\n" + "incw x9\n" + "ld1w { z11.s }, p1/Z, [x25, x14, LSL #2]\n" + "fmla z28.s, p3/M, z6.s, z9.s\n" + "fmla z29.s, p3/M, z8.s, z10.s\n" + "ld1w { z9.s }, p1/Z, [x27, x14, LSL #2]\n" + "ld1w { z10.s }, p1/Z, [x26, x14, LSL #2]\n" + "fmla z30.s, p3/M, z8.s, z12.s\n" + "fmla z31.s, p3/M, z7.s, z12.s\n" + "ld1w { z12.s }, p1/Z, [x24, x14, LSL #2]\n" + "incw x14\n" + "fmax z28.s, p3/M, z28.s, z17.s\n" + "fmax z29.s, p3/M, z29.s, z17.s\n" + "ld1w { z0.s }, p3/Z, [x16, #1, MUL VL]\n" + "ld1w { z1.s }, p3/Z, [x16, #2, MUL VL]\n" + "fmax z30.s, p3/M, z30.s, z17.s\n" + "fmax z31.s, p3/M, z31.s, z17.s\n" + "ld1w { z2.s }, p3/Z, [x16, #3, MUL VL]\n" + "ld1w { z3.s }, p3/Z, [x16, #4, MUL VL]\n" + "ld1w { z4.s }, p3/Z, [x16, #5, MUL VL]\n" + "ld1w { z5.s }, p3/Z, [x16, #6, MUL VL]\n" + "whilelt p2.s, x9, %x[n_channels]\n" + "cmp x14, %x[n_channels]\n" + "ld1w { z6.s }, p3/Z, [x16, #7, MUL VL]\n" + "addvl x16, x16, #16\n" + "fmin z28.s, p3/M, z28.s, z16.s\n" + "st1w { z28.s }, p0, [x13, x28, LSL #2]\n" + "fmin z29.s, p3/M, z29.s, z16.s\n" + "fmin z30.s, p3/M, z30.s, z16.s\n" + "st1w { z29.s }, p0, [x12, x28, LSL #2]\n" + "ld1w { z7.s }, p3/Z, [x16, #-8, MUL VL]\n" + "fmin z31.s, p3/M, z31.s, z16.s\n" + "st1w { z30.s }, p0, [x11, x28, LSL #2]\n" + "ld1w { z8.s }, p3/Z, [x16, #-7, MUL VL]\n" + "addvl x16, x16, #-6\n" + "st1w { z31.s }, p0, [x10, x28, LSL #2]\n" "blt 1b\n" "2:" // Channel tail - "movprfx z31, z16\n fmla z31.s, p3/M, z4.s, z9.s\n" - "ldr x21, [x14, #0x28]\n" - "incw x9\n" - "movprfx z30, z16\n fmla z30.s, p3/M, z3.s, z9.s\n" - "ldr x20, [x14, #0x30]\n" - "mov p0.b, p2.b\n" - "movprfx z29, z16\n fmla z29.s, p3/M, z1.s, z9.s\n" - "ldr x19, [x14, #0x38]\n" - "movprfx z28, z16\n fmla z28.s, p3/M, z0.s, z9.s\n" - "ld1w { z9.s }, p2/Z, [x21, x13, LSL #2]\n" - "ldr x26, [x14, #0x40]\n" - "fmla z31.s, p3/M, z0.s, z10.s\n" - "ldr x25, [x14, #0x48]\n" - "fmla z30.s, p3/M, z2.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x20, x13, LSL #2]\n" - "fmla z29.s, p3/M, z2.s, z12.s\n" - "fmla z28.s, p3/M, z1.s, z12.s\n" - "ld1w { z10.s }, p2/Z, [x25, x13, LSL #2]\n" - "ldr x24, [x14, #0x50]\n" - "fmla z31.s, p3/M, z5.s, z12.s\n" - "ldr x23, [x14, #0x58]\n" - "fmla z30.s, p3/M, z4.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x19, x13, LSL #2]\n" - "fmla z29.s, p3/M, z6.s, z9.s\n" - "fmla z28.s, p3/M, z3.s, z13.s\n" - "ld1w { z9.s }, p2/Z, [x26, x13, LSL #2]\n" - "ldr x22, [x14, #0x60]\n" - "fmla z31.s, p3/M, z7.s, z13.s\n" - "ldr x21, [x14, #0x68]\n" - "fmla z30.s, p3/M, z6.s, z13.s\n" - "ldr x20, [x14, #0x70]\n" - "fmla z29.s, p3/M, z4.s, z13.s\n" - "fmla z28.s, p3/M, z8.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x24, x13, LSL #2]\n" - "ldr x19, [x14, #0x78]\n" + "movprfx z28, z18\n fmla z28.s, p3/M, z4.s, z9.s\n" + "movprfx z29, z18\n fmla z29.s, p3/M, z3.s, z9.s\n" + "ldr x22, [x15, #0x28]\n" + "ldr x21, [x15, #0x30]\n" + "movprfx z30, z18\n fmla z30.s, p3/M, z1.s, z9.s\n" + "movprfx z31, z18\n fmla z31.s, p3/M, z0.s, z9.s\n" + "ld1w { z9.s }, p2/Z, [x22, x9, LSL #2]\n" + "ldr x20, [x15, #0x38]\n" + "fmla z28.s, p3/M, z0.s, z10.s\n" + "fmla z29.s, p3/M, z2.s, z11.s\n" + "ld1w { z11.s }, p2/Z, [x21, x9, LSL #2]\n" + "ldr x26, [x15, #0x48]\n" + "fmla z30.s, p3/M, z2.s, z12.s\n" "fmla z31.s, p3/M, z1.s, z12.s\n" - "fmla z30.s, p3/M, z0.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x23, x13, LSL #2]\n" - "fmla z29.s, p3/M, z5.s, z10.s\n" - "fmla z28.s, p3/M, z4.s, z10.s\n" - "fmla z31.s, p3/M, z2.s, z9.s\n" - "fmla z30.s, p3/M, z1.s, z9.s\n" - "ld1w { z9.s }, p2/Z, [x22, x13, LSL #2]\n" - "fmla z29.s, p3/M, z0.s, z11.s\n" - "fmla z28.s, p3/M, z2.s, z12.s\n" - "fmla z31.s, p3/M, z8.s, z10.s\n" - "fmla z30.s, p3/M, z7.s, z10.s\n" - "ld1w { z10.s }, p2/Z, [x21, x13, LSL #2]\n" - "fmla z29.s, p3/M, z3.s, z9.s\n" - "fmla z31.s, p3/M, z3.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x20, x13, LSL #2]\n" - "fmla z28.s, p3/M, z5.s, z10.s\n" - "fmla z30.s, p3/M, z5.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x19, x13, LSL #2]\n" - "fmla z29.s, p3/M, z7.s, z11.s\n" - "fmla z31.s, p3/M, z6.s, z9.s\n" - "fmla z28.s, p3/M, z6.s, z11.s\n" - "fmla z30.s, p3/M, z8.s, z10.s\n" - "fmla z29.s, p3/M, z8.s, z12.s\n" - "fmla z28.s, p3/M, z7.s, z12.s\n" - "fmax z31.s, p3/M, z31.s, z18.s\n" - "fmax z30.s, p3/M, z30.s, z18.s\n" - "fmax z29.s, p3/M, z29.s, z18.s\n" - "fmin z31.s, p3/M, z31.s, z17.s\n" - "st1w { z31.s }, p0, [x11, x9, LSL #2]\n" - "fmin z30.s, p3/M, z30.s, z17.s\n" - "fmin z29.s, p3/M, z29.s, z17.s\n" - "st1w { z30.s }, p0, [x10, x9, LSL #2]\n" - "fmax z28.s, p3/M, z28.s, z18.s\n" - "st1w { z29.s }, p0, [x28, x9, LSL #2]\n" - "fmin z28.s, p3/M, z28.s, z17.s\n" - "st1w { z28.s }, p0, [x27, x9, LSL #2]\n" + "ldr x27, [x15, #0x40]\n" + "ld1w { z10.s }, p2/Z, [x26, x9, LSL #2]\n" + "fmla z28.s, p3/M, z5.s, z12.s\n" + "fmla z29.s, p3/M, z4.s, z12.s\n" + "ld1w { z12.s }, p2/Z, [x20, x9, LSL #2]\n" + "ldr x25, [x15, #0x50]\n" + "fmla z30.s, p3/M, z6.s, z9.s\n" + "fmla z31.s, p3/M, z3.s, z13.s\n" + "ld1w { z9.s }, p2/Z, [x27, x9, LSL #2]\n" + "ldr x24, [x15, #0x58]\n" + "fmla z28.s, p3/M, z7.s, z13.s\n" + "fmla z29.s, p3/M, z6.s, z13.s\n" + "ldr x23, [x15, #0x60]\n" + "ldr x22, [x15, #0x68]\n" + "fmla z30.s, p3/M, z4.s, z13.s\n" + "fmla z31.s, p3/M, z8.s, z11.s\n" + "ld1w { z11.s }, p2/Z, [x25, x9, LSL #2]\n" + "ldr x21, [x15, #0x70]\n" + "fmla z28.s, p3/M, z1.s, z12.s\n" + "fmla z29.s, p3/M, z0.s, z12.s\n" + "ld1w { z12.s }, p2/Z, [x24, x9, LSL #2]\n" + "ldr x20, [x15, #0x78]\n" + "fmla z30.s, p3/M, z5.s, z10.s\n" + "fmla z31.s, p3/M, z4.s, z10.s\n" + "incw x28\n" + "mov p0.b, p2.b\n" + "fmla z28.s, p3/M, z2.s, z9.s\n" + "fmla z29.s, p3/M, z1.s, z9.s\n" + "ld1w { z9.s }, p2/Z, [x23, x9, LSL #2]\n" + "fmla z30.s, p3/M, z0.s, z11.s\n" + "fmla z31.s, p3/M, z2.s, z12.s\n" + "fmla z28.s, p3/M, z8.s, z10.s\n" + "fmla z29.s, p3/M, z7.s, z10.s\n" + "ld1w { z10.s }, p2/Z, [x22, x9, LSL #2]\n" + "fmla z30.s, p3/M, z3.s, z9.s\n" + "fmla z31.s, p3/M, z5.s, z10.s\n" + "fmla z28.s, p3/M, z3.s, z11.s\n" + "ld1w { z11.s }, p2/Z, [x21, x9, LSL #2]\n" + "fmla z29.s, p3/M, z5.s, z12.s\n" + "ld1w { z12.s }, p2/Z, [x20, x9, LSL #2]\n" + "fmla z30.s, p3/M, z7.s, z11.s\n" + "fmla z31.s, p3/M, z6.s, z11.s\n" + "fmla z28.s, p3/M, z6.s, z9.s\n" + "fmla z29.s, p3/M, z8.s, z10.s\n" + "fmax z28.s, p3/M, z28.s, z17.s\n" + "fmax z29.s, p3/M, z29.s, z17.s\n" + "fmla z30.s, p3/M, z8.s, z12.s\n" + "fmla z31.s, p3/M, z7.s, z12.s\n" + "fmax z30.s, p3/M, z30.s, z17.s\n" + "fmax z31.s, p3/M, z31.s, z17.s\n" + "fmin z28.s, p3/M, z28.s, z16.s\n" + "fmin z29.s, p3/M, z29.s, z16.s\n" + "st1w { z28.s }, p0, [x13, x28, LSL #2]\n" + "fmin z30.s, p3/M, z30.s, z16.s\n" + "fmin z31.s, p3/M, z31.s, z16.s\n" + "st1w { z29.s }, p0, [x12, x28, LSL #2]\n" + "st1w { z30.s }, p0, [x11, x28, LSL #2]\n" + "st1w { z31.s }, p0, [x10, x28, LSL #2]\n" : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_Args_inptrs] "I" (offsetof(Args, inptrs)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_args_params] "I" (offsetof(Args, params)), [params_struct] "r" (¶ms_struct) - : "cc", "memory", "p0", "p1", "p2", "p3", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z16", "z17", "z18", "z28", "z29", "z30", "z31" + : "cc", "memory", "p0", "p1", "p2", "p3", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z16", "z17", "z18", "z28", "z29", "z30", "z31" ); } |