diff options
author | ramelg01 <ramy.elgammal@arm.com> | 2022-04-07 02:42:52 +0100 |
---|---|---|
committer | Ramy Elgammal <ramy.elgammal@arm.com> | 2022-04-26 15:51:22 +0000 |
commit | 8a164884dddf769643cf3b9f7f94e43cb4f3c20b (patch) | |
tree | 35958dd48b6df1a851c880dad2b2ce285671b611 /src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_u8s8u8q_nhwc_generic_output9_mla_depthfirst.hpp | |
parent | c827e99fc46521f43719b0c2d1b6f05d66abf68c (diff) | |
download | ComputeLibrary-8a164884dddf769643cf3b9f7f94e43cb4f3c20b.tar.gz |
Update Neon™ depthwise kernel
- Reduce duplication and simplify overall structure.
- Improve multi-threaded performance by sharing more data
in lower-level caches.
Partially Resolves: COMPMID-5054
Signed-off-by: Ramy Elgammal <ramy.elgammal@arm.com>
Change-Id: Iac747f39b21c540122fa75218762631c4d787911
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/7449
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Andrew Mundy
Reviewed-by: Sheri Zhang <sheri.zhang@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_u8s8u8q_nhwc_generic_output9_mla_depthfirst.hpp')
-rw-r--r-- | src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_u8s8u8q_nhwc_generic_output9_mla_depthfirst.hpp | 23 |
1 files changed, 9 insertions, 14 deletions
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_u8s8u8q_nhwc_generic_output9_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_u8s8u8q_nhwc_generic_output9_mla_depthfirst.hpp index 2bfeac0556..6bdcca115c 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_u8s8u8q_nhwc_generic_output9_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_u8s8u8q_nhwc_generic_output9_mla_depthfirst.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 Arm Limited. + * Copyright (c) 2021-2022 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -28,28 +28,23 @@ #pragma once +#if defined(__aarch64__) + namespace arm_conv { namespace depthwise { void a64_u8s8u8q_nhwc_generic_output9_mla_depthfirst_impl(const uint8_t *const *const, uint8_t *const *const, const void *, const arm_gemm::Requantize32&, const unsigned int, const unsigned int); -struct a64_u8s8u8q_nhwc_generic_output9_mla_depthfirst +class a64_u8s8u8q_nhwc_generic_output9_mla_depthfirst : public GenericDepthfirstKernelStrategy<uint8_t, int8_t, uint8_t, int32_t> { - typedef int32_t bias_type; - typedef uint8_t input_type; - typedef int8_t weight_type; - typedef uint8_t return_type; - - typedef void (*kern_type)(const uint8_t *const *const, uint8_t *const *const, const void *, const arm_gemm::Requantize32&, const unsigned int, const unsigned int); - - constexpr static arm_gemm::VLType vl_type = arm_gemm::VLType::None; - - constexpr static unsigned int n_output_points = 9; + KernelType kernel = a64_u8s8u8q_nhwc_generic_output9_mla_depthfirst_impl; - kern_type kernel = a64_u8s8u8q_nhwc_generic_output9_mla_depthfirst_impl; + public: + a64_u8s8u8q_nhwc_generic_output9_mla_depthfirst(const CPUInfo *) : GenericDepthfirstKernelStrategy<uint8_t, int8_t, uint8_t, int32_t>(9, arm_gemm::VLType::None) {} - a64_u8s8u8q_nhwc_generic_output9_mla_depthfirst(const CPUInfo *) {} + KernelType get_kernel() const override { return kernel; } }; } // namespace depthwise } // namespace arm_conv +#endif // defined(__aarch64__) |