diff options
| author | Michael Tyler <michael.tyler@arm.com> | 2023-01-17 11:04:14 +0000 |
|---|---|---|
| committer | Gian Marco Iodice <gianmarco.iodice@arm.com> | 2023-01-18 09:43:38 +0000 |
| commit | be13cead34e566bdd561ad3ffc3f645b460e482e (patch) | |
| tree | cdc086de205d5a07fdd816afa6333d0b2f38d4e9 /src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst | |
| parent | 13bab71a76096985752a9e12711507021e25858d (diff) | |
| download | ComputeLibrary-be13cead34e566bdd561ad3ffc3f645b460e482e.tar.gz | |
Revert "Update CPU kernels to remove x19"
This reverts commit 3c59f01c209d2732a15d97d65565ead964787a8b.
Resolves: COMPMID-5817
Change-Id: Ie2443a21854a95db1e3d0cafa2121c0187a5e237
Signed-off-by: Michael Tyler <michael.tyler@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/8974
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst')
2 files changed, 1619 insertions, 1619 deletions
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp index a3a372be05..b5bee7ae7c 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, 2023 Arm Limited. + * Copyright (c) 2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -87,186 +87,187 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( ); __asm__ __volatile__( - "mov x27, #0x0\n" "mov x26, #0x0\n" + "mov x25, #0x0\n" "1:" // Tile loop - "str x27, [%x[params_struct], %[offsetof_args_tile_i]]\n" - "mov x25, #0x4\n" - "mov x23, #0x4\n" - "str x26, [%x[params_struct], %[offsetof_args_tile_j]]\n" - "ldr x24, [%x[params_struct], %[offsetof_args_ld_input_row]]\n" - "ldr x22, [%x[params_struct], %[offsetof_args_ld_output_row]]\n" - "mul x21, x27, x24\n" // offset = tile_i * ld_input_row - "ldr x4, [%x[params_struct], %[offsetof_args_ld_input_col]]\n" - "ldr x5, [%x[params_struct], %[offsetof_args_ld_output_col]]\n" - "mul x20, x27, x22\n" // offset = tile_i * ld_output_row - "mov x6, #0x10\n" // cntb _, ALL, #1 - "madd x21, x26, x4, x21\n" // offset += tile_j * ld_input_col - "ldr x7, [%x[params_struct], %[offsetof_args_inptr]]\n" - "lsl x4, x4, #0x1\n" - "ldr x8, [%x[params_struct], %[offsetof_args_outptr]]\n" - "madd x20, x26, x5, x20\n" // offset += tile_j * ld_output_col + "str x26, [%x[params_struct], %[offsetof_args_tile_i]]\n" + "mov x24, #0x4\n" + "mov x22, #0x4\n" + "str x25, [%x[params_struct], %[offsetof_args_tile_j]]\n" + "ldr x23, [%x[params_struct], %[offsetof_args_ld_input_row]]\n" + "ldr x21, [%x[params_struct], %[offsetof_args_ld_output_row]]\n" + "mul x20, x26, x23\n" // offset = tile_i * ld_input_row + "ldr x5, [%x[params_struct], %[offsetof_args_ld_input_col]]\n" + "ldr x6, [%x[params_struct], %[offsetof_args_ld_output_col]]\n" + "mul x19, x26, x21\n" // offset = tile_i * ld_output_row + "mov x7, #0x10\n" // cntb _, ALL, #1 + "madd x20, x25, x5, x20\n" // offset += tile_j * ld_input_col + "ldr x8, [%x[params_struct], %[offsetof_args_inptr]]\n" "lsl x5, x5, #0x1\n" - "add x17, x4, x4\n" - "ldr x16, [%x[params_struct], %[offsetof_args_params]]\n" - "mul x21, x21, x25\n" // offset *= kernel_stride * output_size - "add x7, x7, x21, LSL #1\n" // inptr[0] += offset * sizeof(__fp16) - "add x15, x7, x24, LSL #1\n" - "mul x20, x20, x23\n" // offset *= output_tile_size - "add x14, x15, x24, LSL #1\n" - "add x8, x8, x20, LSL #1\n" // outptrs[0] += offset * sizeof(__fp16) - "lsr x13, %x[n_channels], #0x3\n" - "add x12, x14, x24, LSL #1\n" - "add x11, x17, x4\n" - "add x10, x8, x22, LSL #1\n" - "add x9, x12, x24, LSL #1\n" - "add x28, x11, x4\n" - "add x27, x10, x22, LSL #1\n" - "add x23, x5, x5\n" + "ldr x17, [%x[params_struct], %[offsetof_args_outptr]]\n" + "madd x19, x25, x6, x19\n" // offset += tile_j * ld_output_col + "lsl x6, x6, #0x1\n" + "add x16, x5, x5\n" + "ldr x15, [%x[params_struct], %[offsetof_args_params]]\n" + "mul x20, x20, x24\n" // offset *= kernel_stride * output_size + "add x8, x8, x20, LSL #1\n" // inptr[0] += offset * sizeof(__fp16) + "add x14, x8, x23, LSL #1\n" + "mul x19, x19, x22\n" // offset *= output_tile_size + "add x13, x14, x23, LSL #1\n" + "add x17, x17, x19, LSL #1\n" // outptrs[0] += offset * sizeof(__fp16) + "lsr x12, %x[n_channels], #0x3\n" + "add x11, x13, x23, LSL #1\n" + "add x10, x16, x5\n" + "add x9, x17, x21, LSL #1\n" + "add x28, x11, x23, LSL #1\n" + "add x27, x10, x5\n" + "add x26, x9, x21, LSL #1\n" + "add x22, x6, x6\n" "add x20, %x[params_struct], %[offsetof_args_min]\n" + "add x19, %x[params_struct], %[offsetof_args_max]\n" "ld1r { v15.8h }, [x20]\n" - "add x20, %x[params_struct], %[offsetof_args_max]\n" - "ld1r { v14.8h }, [x20]\n" - "add x26, x9, x24, LSL #1\n" - "add x25, x28, x4\n" - "add x24, x27, x22, LSL #1\n" - "add x22, x23, x5\n" - "mov x21, #0x0\n" - "sub x20, XZR, x6\n" - "cbz x13, 4f\n" - "ldr q13, [x16, #0x0]\n" - "ldr q0, [x16, #0x10]\n" - "cmp x6, x13, LSL #4\n" - "ldr q1, [x16, #0x20]\n" - "ldr q2, [x16, #0x30]\n" - "ldr q3, [x16, #0x40]\n" - "ldr q4, [x16, #0x50]\n" - "ldr q5, [x16, #0x60]\n" - "ldr q6, [x16, #0x70]\n" - "ldr q7, [x16, #0x80]\n" - "ldr q8, [x16, #0x90]\n" - "add x16, x16, #0xa0\n" - "ldr q9, [x14, x17]\n" - "ld1 { v10.8h }, [x7]\n" - "ldr q11, [x7, x25]\n" - "ldr q12, [x14, x11]\n" + "ld1r { v14.8h }, [x19]\n" + "add x25, x28, x23, LSL #1\n" + "add x24, x27, x5\n" + "add x23, x26, x21, LSL #1\n" + "add x21, x22, x6\n" + "mov x20, #0x0\n" + "sub x19, XZR, x7\n" + "cbz x12, 4f\n" + "ldr q13, [x15, #0x0]\n" + "cmp x7, x12, LSL #4\n" + "ldr q0, [x15, #0x10]\n" + "ldr q1, [x15, #0x20]\n" + "ldr q2, [x15, #0x30]\n" + "ldr q3, [x15, #0x40]\n" + "ldr q4, [x15, #0x50]\n" + "ldr q5, [x15, #0x60]\n" + "ldr q6, [x15, #0x70]\n" + "ldr q7, [x15, #0x80]\n" + "ldr q8, [x15, #0x90]\n" + "ldr q9, [x13, x16]\n" + "add x15, x15, #0xa0\n" + "ld1 { v10.8h }, [x8]\n" + "ldr q11, [x8, x24]\n" + "ldr q12, [x13, x10]\n" "bge 3f\n" "2:" // Tile loop: Channel loop "mov v21.16b, v13.16b\n fmla v21.8h, v4.8h, v9.8h\n" "mov v16.16b, v13.16b\n fmla v16.8h, v8.8h, v9.8h\n" - "add x6, x6, #0x10\n" - "cmp x6, x13, LSL #4\n" + "add x7, x7, #0x10\n" + "cmp x7, x12, LSL #4\n" "mov v22.16b, v13.16b\n fmla v22.8h, v3.8h, v9.8h\n" "mov v25.16b, v13.16b\n fmla v25.8h, v1.8h, v9.8h\n" + "add x19, x19, #0x10\n" "add x20, x20, #0x10\n" - "add x21, x21, #0x10\n" "mov v26.16b, v13.16b\n fmla v26.8h, v0.8h, v9.8h\n" "fmla v21.8h, v5.8h, v12.8h\n" "mov v17.16b, v13.16b\n fmla v17.8h, v7.8h, v9.8h\n" "mov v18.16b, v13.16b\n fmla v18.8h, v6.8h, v9.8h\n" "mov v20.16b, v13.16b\n fmla v20.8h, v5.8h, v9.8h\n" "mov v24.16b, v13.16b\n fmla v24.8h, v2.8h, v9.8h\n" - "ldr q9, [x12, x17]\n" + "ldr q9, [x11, x16]\n" "fmla v16.8h, v0.8h, v10.8h\n" - "ld1 { v10.8h }, [x26]\n" "mov v19.16b, v13.16b\n fmla v19.8h, v2.8h, v11.8h\n" - "ldr q11, [x26, x25]\n" + "ld1 { v10.8h }, [x25]\n" + "ldr q11, [x25, x24]\n" "fmla v22.8h, v4.8h, v12.8h\n" "fmla v25.8h, v2.8h, v12.8h\n" "fmla v26.8h, v1.8h, v12.8h\n" "mov v28.16b, v13.16b\n fmla v28.8h, v6.8h, v10.8h\n" - "ldr q10, [x12, x11]\n" + "ldr q10, [x11, x10]\n" "fmla v21.8h, v7.8h, v9.8h\n" "fmla v17.8h, v8.8h, v12.8h\n" "fmla v18.8h, v7.8h, v12.8h\n" "fmla v19.8h, v6.8h, v12.8h\n" "mov v23.16b, v13.16b\n fmla v23.8h, v3.8h, v12.8h\n" "mov v27.16b, v13.16b\n fmla v27.8h, v0.8h, v12.8h\n" - "ldr q12, [x7, x4]\n" + "ldr q12, [x8, x5]\n" "mov v31.16b, v13.16b\n fmla v31.8h, v8.8h, v11.8h\n" - "ldr q11, [x7, x28]\n" "fmla v22.8h, v6.8h, v9.8h\n" + "ldr q11, [x8, x27]\n" "fmla v25.8h, v4.8h, v9.8h\n" "fmla v26.8h, v3.8h, v9.8h\n" + "mov v29.16b, v13.16b\n fmla v29.8h, v1.8h, v9.8h\n" + "mov v30.16b, v13.16b\n fmla v30.8h, v0.8h, v9.8h\n" + "ldr q13, [x15, #0x0]\n" "fmla v20.8h, v8.8h, v9.8h\n" "fmla v24.8h, v5.8h, v9.8h\n" "fmla v28.8h, v2.8h, v9.8h\n" "fmla v21.8h, v8.8h, v10.8h\n" + "ld1 { v9.8h }, [x14]\n" "fmla v16.8h, v1.8h, v12.8h\n" "fmla v17.8h, v0.8h, v12.8h\n" - "ldr q12, [x15, x25]\n" + "ldr q12, [x14, x24]\n" "fmla v18.8h, v2.8h, v11.8h\n" "fmla v19.8h, v1.8h, v11.8h\n" - "ld1 { v11.8h }, [x9]\n" + "ld1 { v11.8h }, [x28]\n" "fmla v22.8h, v7.8h, v10.8h\n" "fmla v23.8h, v6.8h, v10.8h\n" "fmla v25.8h, v5.8h, v10.8h\n" "fmla v26.8h, v4.8h, v10.8h\n" "fmla v27.8h, v3.8h, v10.8h\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "fmla v24.8h, v6.8h, v11.8h\n" - "fmla v28.8h, v3.8h, v11.8h\n" - "ldr q11, [x9, x25]\n" - "fmla v19.8h, v5.8h, v12.8h\n" - "fmla v23.8h, v2.8h, v12.8h\n" - "ldr q12, [x15, x11]\n" - "fmla v27.8h, v8.8h, v11.8h\n" - "fmla v31.8h, v5.8h, v11.8h\n" - "mov v29.16b, v13.16b\n fmla v29.8h, v1.8h, v9.8h\n" - "mov v30.16b, v13.16b\n fmla v30.8h, v0.8h, v9.8h\n" - "ld1 { v9.8h }, [x15]\n" "fmla v29.8h, v2.8h, v10.8h\n" "fmla v30.8h, v1.8h, v10.8h\n" - "ldr q10, [x15, x17]\n" + "fmla v31.8h, v0.8h, v10.8h\n" + "ldr q10, [x14, x16]\n" "fmla v20.8h, v0.8h, v9.8h\n" + "fmla v24.8h, v6.8h, v11.8h\n" + "fmla v28.8h, v3.8h, v11.8h\n" "fmla v21.8h, v1.8h, v10.8h\n" + "ldr q11, [x28, x24]\n" "fmla v16.8h, v3.8h, v9.8h\n" - "ldr q11, [x26, x4]\n" + "fmla v19.8h, v5.8h, v12.8h\n" + "fmla v23.8h, v2.8h, v12.8h\n" "fmla v17.8h, v4.8h, v10.8h\n" + "ldr q12, [x14, x10]\n" "fmla v18.8h, v3.8h, v10.8h\n" "fmla v22.8h, v0.8h, v10.8h\n" + "fmla v27.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v5.8h, v11.8h\n" + "ldr q11, [x25, x5]\n" "fmla v20.8h, v2.8h, v10.8h\n" "fmla v21.8h, v2.8h, v12.8h\n" "fmla v16.8h, v5.8h, v10.8h\n" - "ldr q10, [x14, x4]\n" "fmla v17.8h, v5.8h, v12.8h\n" + "ldr q10, [x13, x5]\n" "fmla v18.8h, v4.8h, v12.8h\n" "fmla v19.8h, v3.8h, v12.8h\n" "fmla v22.8h, v1.8h, v12.8h\n" "fmla v23.8h, v0.8h, v12.8h\n" - "ldr q12, [x14, x28]\n" + "ldr q12, [x13, x27]\n" "fmla v28.8h, v7.8h, v11.8h\n" "fmla v29.8h, v6.8h, v11.8h\n" - "ldr q11, [x26, x28]\n" + "ldr q11, [x25, x27]\n" "fmla v20.8h, v4.8h, v10.8h\n" "fmla v21.8h, v3.8h, v10.8h\n" "fmla v24.8h, v1.8h, v10.8h\n" "fmla v25.8h, v0.8h, v10.8h\n" "fmla v16.8h, v7.8h, v10.8h\n" "fmla v17.8h, v6.8h, v10.8h\n" - "ldr q10, [x7, x17]\n" + "ldr q10, [x8, x16]\n" "fmla v30.8h, v8.8h, v11.8h\n" "fmla v31.8h, v7.8h, v11.8h\n" - "ldr q11, [x12, x4]\n" + "ldr q11, [x11, x5]\n" "fmla v18.8h, v8.8h, v12.8h\n" "fmla v19.8h, v7.8h, v12.8h\n" "fmla v22.8h, v5.8h, v12.8h\n" "fmla v23.8h, v4.8h, v12.8h\n" "fmla v26.8h, v2.8h, v12.8h\n" "fmla v27.8h, v1.8h, v12.8h\n" - "ldr q12, [x7, x11]\n" - "add x7, x7, #0x10\n" + "ldr q12, [x8, x10]\n" + "add x8, x8, #0x10\n" "fmla v20.8h, v7.8h, v11.8h\n" "fmla v21.8h, v6.8h, v11.8h\n" "fmla v24.8h, v4.8h, v11.8h\n" "fmla v25.8h, v3.8h, v11.8h\n" "fmla v28.8h, v1.8h, v11.8h\n" "fmla v29.8h, v0.8h, v11.8h\n" - "ldr q11, [x12, x28]\n" + "ldr q11, [x11, x27]\n" "fmla v16.8h, v2.8h, v10.8h\n" "fmla v17.8h, v1.8h, v10.8h\n" "fmla v18.8h, v0.8h, v10.8h\n" - "ld1 { v10.8h }, [x14]\n" + "ld1 { v10.8h }, [x13]\n" "fmla v30.8h, v2.8h, v11.8h\n" "fmla v19.8h, v0.8h, v12.8h\n" "fmla v20.8h, v3.8h, v10.8h\n" @@ -276,24 +277,25 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "fmla v26.8h, v5.8h, v11.8h\n" "fmla v27.8h, v4.8h, v11.8h\n" "fmla v31.8h, v1.8h, v11.8h\n" - "ldr q11, [x9, x17]\n" + "ldr q11, [x28, x16]\n" "fmla v17.8h, v2.8h, v12.8h\n" "fmla v18.8h, v1.8h, v12.8h\n" - "ldr q12, [x14, x25]\n" - "add x14, x14, #0x10\n" + "ldr q12, [x13, x24]\n" + "add x13, x13, #0x10\n" "fmla v16.8h, v6.8h, v10.8h\n" - "ld1 { v10.8h }, [x12]\n" + "ld1 { v10.8h }, [x11]\n" "fmla v29.8h, v4.8h, v11.8h\n" + "ldr q9, [x13, x16]\n" "fmla v30.8h, v3.8h, v11.8h\n" "fmla v19.8h, v8.8h, v12.8h\n" "fmla v23.8h, v5.8h, v12.8h\n" "fmla v27.8h, v2.8h, v12.8h\n" - "ldr q12, [x12, x25]\n" - "add x12, x12, #0x10\n" + "ldr q12, [x11, x24]\n" + "add x11, x11, #0x10\n" "fmla v20.8h, v6.8h, v10.8h\n" "fmla v24.8h, v3.8h, v10.8h\n" "fmla v28.8h, v0.8h, v10.8h\n" - "ldr q10, [x26, x17]\n" + "ldr q10, [x25, x16]\n" "fmla v31.8h, v2.8h, v12.8h\n" "fmla v29.8h, v7.8h, v10.8h\n" "fmla v30.8h, v6.8h, v10.8h\n" @@ -301,110 +303,108 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "fmla v25.8h, v7.8h, v11.8h\n" "fmla v26.8h, v6.8h, v11.8h\n" "fmla v28.8h, v5.8h, v11.8h\n" - "ldr q11, [x9, x11]\n" + "ldr q11, [x28, x10]\n" "fmla v27.8h, v5.8h, v12.8h\n" "fmla v29.8h, v5.8h, v11.8h\n" "fmla v30.8h, v4.8h, v11.8h\n" "fmla v31.8h, v3.8h, v11.8h\n" "fmla v23.8h, v8.8h, v12.8h\n" - "ldr q12, [x26, x11]\n" + "ldr q12, [x25, x10]\n" "fmla v28.8h, v8.8h, v10.8h\n" - "ldr q10, [x15, x4]\n" + "ldr q10, [x14, x5]\n" "fmla v25.8h, v8.8h, v11.8h\n" "fmla v26.8h, v7.8h, v11.8h\n" - "add x26, x26, #0x10\n" + "add x25, x25, #0x10\n" "fmla v27.8h, v6.8h, v11.8h\n" - "ldr q11, [x15, x28]\n" "fmla v29.8h, v8.8h, v12.8h\n" - "add x15, x15, #0x10\n" + "ldr q11, [x14, x27]\n" + "add x14, x14, #0x10\n" "fmla v30.8h, v7.8h, v12.8h\n" "fmla v31.8h, v6.8h, v12.8h\n" - "ldr q12, [x9, x4]\n" + "ldr q12, [x28, x5]\n" "fmla v16.8h, v4.8h, v10.8h\n" "fmla v17.8h, v3.8h, v10.8h\n" "fmax v16.8h, v16.8h, v15.8h\n" "fmla v20.8h, v1.8h, v10.8h\n" "fmla v21.8h, v0.8h, v10.8h\n" - "ldr q10, [x9, x28]\n" - "ldr q9, [x14, x17]\n" + "ldr q10, [x28, x27]\n" + "fmax v17.8h, v17.8h, v15.8h\n" "fmla v18.8h, v5.8h, v11.8h\n" "fmla v19.8h, v4.8h, v11.8h\n" - "fmax v17.8h, v17.8h, v15.8h\n" - "add x9, x9, #0x10\n" + "fmax v18.8h, v18.8h, v15.8h\n" + "add x28, x28, #0x10\n" "fmla v22.8h, v2.8h, v11.8h\n" - "ldr q13, [x16, #0x0]\n" "fmla v23.8h, v1.8h, v11.8h\n" - "ldr q11, [x7, x25]\n" - "ldr q0, [x16, #0x10]\n" + "fmax v19.8h, v19.8h, v15.8h\n" + "ldr q11, [x8, x24]\n" "fmla v24.8h, v7.8h, v12.8h\n" "fmla v25.8h, v6.8h, v12.8h\n" - "ldr q1, [x16, #0x20]\n" + "fmax v20.8h, v20.8h, v15.8h\n" + "ldr q0, [x15, #0x10]\n" "fmla v28.8h, v4.8h, v12.8h\n" "fmla v29.8h, v3.8h, v12.8h\n" - "ldr q12, [x14, x11]\n" - "ldr q2, [x16, #0x30]\n" + "fmax v21.8h, v21.8h, v15.8h\n" + "ldr q12, [x13, x10]\n" "fmla v26.8h, v8.8h, v10.8h\n" - "ldr q3, [x16, #0x40]\n" "fmla v27.8h, v7.8h, v10.8h\n" - "ldr q6, [x16, #0x70]\n" + "fmax v22.8h, v22.8h, v15.8h\n" + "ldr q1, [x15, #0x20]\n" "fmla v30.8h, v5.8h, v10.8h\n" - "ldr q5, [x16, #0x60]\n" "fmla v31.8h, v4.8h, v10.8h\n" - "ld1 { v10.8h }, [x7]\n" - "ldr q4, [x16, #0x50]\n" - "fmax v18.8h, v18.8h, v15.8h\n" - "fmax v19.8h, v19.8h, v15.8h\n" - "fmax v20.8h, v20.8h, v15.8h\n" - "fmax v21.8h, v21.8h, v15.8h\n" - "fmax v22.8h, v22.8h, v15.8h\n" "fmax v23.8h, v23.8h, v15.8h\n" + "ld1 { v10.8h }, [x8]\n" "fmax v24.8h, v24.8h, v15.8h\n" "fmax v25.8h, v25.8h, v15.8h\n" + "ldr q2, [x15, #0x30]\n" + "ldr q3, [x15, #0x40]\n" "fmax v26.8h, v26.8h, v15.8h\n" "fmax v27.8h, v27.8h, v15.8h\n" + "ldr q4, [x15, #0x50]\n" + "ldr q5, [x15, #0x60]\n" "fmax v28.8h, v28.8h, v15.8h\n" "fmax v29.8h, v29.8h, v15.8h\n" + "ldr q6, [x15, #0x70]\n" + "ldr q7, [x15, #0x80]\n" "fmax v30.8h, v30.8h, v15.8h\n" "fmax v31.8h, v31.8h, v15.8h\n" + "ldr q8, [x15, #0x90]\n" + "add x15, x15, #0xa0\n" "fmin v16.8h, v16.8h, v14.8h\n" "fmin v17.8h, v17.8h, v14.8h\n" - "st1 { v16.8h }, [x8]\n" - "ldr q7, [x16, #0x80]\n" + "st1 { v16.8h }, [x17]\n" "fmin v18.8h, v18.8h, v14.8h\n" "fmin v19.8h, v19.8h, v14.8h\n" - "str q17, [x8, x5]\n" - "ldr q8, [x16, #0x90]\n" + "str q17, [x17, x6]\n" "fmin v20.8h, v20.8h, v14.8h\n" "fmin v21.8h, v21.8h, v14.8h\n" - "str q18, [x8, x23]\n" - "add x16, x16, #0xa0\n" + "str q18, [x17, x22]\n" "fmin v22.8h, v22.8h, v14.8h\n" "fmin v23.8h, v23.8h, v14.8h\n" - "str q19, [x8, x22]\n" - "add x8, x8, #0x10\n" + "str q19, [x17, x21]\n" + "add x17, x17, #0x10\n" "fmin v24.8h, v24.8h, v14.8h\n" "fmin v25.8h, v25.8h, v14.8h\n" - "st1 { v20.8h }, [x10]\n" + "st1 { v20.8h }, [x9]\n" "fmin v26.8h, v26.8h, v14.8h\n" "fmin v27.8h, v27.8h, v14.8h\n" - "str q21, [x10, x5]\n" + "str q21, [x9, x6]\n" "fmin v28.8h, v28.8h, v14.8h\n" "fmin v29.8h, v29.8h, v14.8h\n" - "str q22, [x10, x23]\n" + "str q22, [x9, x22]\n" "fmin v30.8h, v30.8h, v14.8h\n" "fmin v31.8h, v31.8h, v14.8h\n" - "str q23, [x10, x22]\n" - "add x10, x10, #0x10\n" - "st1 { v24.8h }, [x27]\n" - "str q25, [x27, x5]\n" - "str q26, [x27, x23]\n" - "str q27, [x27, x22]\n" - "add x27, x27, #0x10\n" - "st1 { v28.8h }, [x24]\n" - "str q29, [x24, x5]\n" - "str q30, [x24, x23]\n" - "str q31, [x24, x22]\n" - "add x24, x24, #0x10\n" + "str q23, [x9, x21]\n" + "add x9, x9, #0x10\n" + "st1 { v24.8h }, [x26]\n" + "str q25, [x26, x6]\n" + "str q26, [x26, x22]\n" + "str q27, [x26, x21]\n" + "add x26, x26, #0x10\n" + "st1 { v28.8h }, [x23]\n" + "str q29, [x23, x6]\n" + "str q30, [x23, x22]\n" + "str q31, [x23, x21]\n" + "add x23, x23, #0x10\n" "blt 2b\n" "3:" // Tile loop: Channel tail "mov v21.16b, v13.16b\n fmla v21.8h, v4.8h, v9.8h\n" @@ -417,107 +417,107 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "mov v18.16b, v13.16b\n fmla v18.8h, v6.8h, v9.8h\n" "mov v20.16b, v13.16b\n fmla v20.8h, v5.8h, v9.8h\n" "mov v24.16b, v13.16b\n fmla v24.8h, v2.8h, v9.8h\n" - "ldr q9, [x12, x17]\n" + "ldr q9, [x11, x16]\n" "fmla v16.8h, v0.8h, v10.8h\n" - "ld1 { v10.8h }, [x26]\n" "mov v19.16b, v13.16b\n fmla v19.8h, v2.8h, v11.8h\n" - "ldr q11, [x26, x25]\n" + "ld1 { v10.8h }, [x25]\n" + "ldr q11, [x25, x24]\n" "fmla v22.8h, v4.8h, v12.8h\n" "fmla v25.8h, v2.8h, v12.8h\n" "fmla v26.8h, v1.8h, v12.8h\n" "mov v28.16b, v13.16b\n fmla v28.8h, v6.8h, v10.8h\n" - "ldr q10, [x12, x11]\n" + "ldr q10, [x11, x10]\n" "fmla v21.8h, v7.8h, v9.8h\n" "fmla v17.8h, v8.8h, v12.8h\n" "fmla v18.8h, v7.8h, v12.8h\n" "fmla v19.8h, v6.8h, v12.8h\n" "mov v23.16b, v13.16b\n fmla v23.8h, v3.8h, v12.8h\n" "mov v27.16b, v13.16b\n fmla v27.8h, v0.8h, v12.8h\n" - "ldr q12, [x7, x4]\n" + "ldr q12, [x8, x5]\n" "mov v31.16b, v13.16b\n fmla v31.8h, v8.8h, v11.8h\n" - "ldr q11, [x7, x28]\n" "fmla v22.8h, v6.8h, v9.8h\n" + "ldr q11, [x8, x27]\n" "fmla v25.8h, v4.8h, v9.8h\n" "fmla v26.8h, v3.8h, v9.8h\n" + "mov v29.16b, v13.16b\n fmla v29.8h, v1.8h, v9.8h\n" + "mov v30.16b, v13.16b\n fmla v30.8h, v0.8h, v9.8h\n" "fmla v20.8h, v8.8h, v9.8h\n" "fmla v24.8h, v5.8h, v9.8h\n" "fmla v28.8h, v2.8h, v9.8h\n" "fmla v21.8h, v8.8h, v10.8h\n" + "ld1 { v9.8h }, [x14]\n" "fmla v16.8h, v1.8h, v12.8h\n" "fmla v17.8h, v0.8h, v12.8h\n" - "ldr q12, [x15, x25]\n" + "ldr q12, [x14, x24]\n" "fmla v18.8h, v2.8h, v11.8h\n" "fmla v19.8h, v1.8h, v11.8h\n" - "ld1 { v11.8h }, [x9]\n" + "ld1 { v11.8h }, [x28]\n" "fmla v22.8h, v7.8h, v10.8h\n" "fmla v23.8h, v6.8h, v10.8h\n" "fmla v25.8h, v5.8h, v10.8h\n" "fmla v26.8h, v4.8h, v10.8h\n" "fmla v27.8h, v3.8h, v10.8h\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "fmla v24.8h, v6.8h, v11.8h\n" - "fmla v28.8h, v3.8h, v11.8h\n" - "ldr q11, [x9, x25]\n" - "fmla v19.8h, v5.8h, v12.8h\n" - "fmla v23.8h, v2.8h, v12.8h\n" - "ldr q12, [x15, x11]\n" - "fmla v27.8h, v8.8h, v11.8h\n" - "fmla v31.8h, v5.8h, v11.8h\n" - "mov v29.16b, v13.16b\n fmla v29.8h, v1.8h, v9.8h\n" - "mov v30.16b, v13.16b\n fmla v30.8h, v0.8h, v9.8h\n" - "ld1 { v9.8h }, [x15]\n" "fmla v29.8h, v2.8h, v10.8h\n" "fmla v30.8h, v1.8h, v10.8h\n" - "ldr q10, [x15, x17]\n" + "fmla v31.8h, v0.8h, v10.8h\n" + "ldr q10, [x14, x16]\n" "fmla v20.8h, v0.8h, v9.8h\n" + "fmla v24.8h, v6.8h, v11.8h\n" + "fmla v28.8h, v3.8h, v11.8h\n" "fmla v21.8h, v1.8h, v10.8h\n" + "ldr q11, [x28, x24]\n" "fmla v16.8h, v3.8h, v9.8h\n" - "ldr q11, [x26, x4]\n" + "fmla v19.8h, v5.8h, v12.8h\n" + "fmla v23.8h, v2.8h, v12.8h\n" "fmla v17.8h, v4.8h, v10.8h\n" + "ldr q12, [x14, x10]\n" "fmla v18.8h, v3.8h, v10.8h\n" "fmla v22.8h, v0.8h, v10.8h\n" + "fmla v27.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v5.8h, v11.8h\n" + "ldr q11, [x25, x5]\n" "fmla v20.8h, v2.8h, v10.8h\n" "fmla v21.8h, v2.8h, v12.8h\n" "fmla v16.8h, v5.8h, v10.8h\n" - "ldr q10, [x14, x4]\n" "fmla v17.8h, v5.8h, v12.8h\n" + "ldr q10, [x13, x5]\n" "fmla v18.8h, v4.8h, v12.8h\n" "fmla v19.8h, v3.8h, v12.8h\n" "fmla v22.8h, v1.8h, v12.8h\n" "fmla v23.8h, v0.8h, v12.8h\n" - "ldr q12, [x14, x28]\n" + "ldr q12, [x13, x27]\n" "fmla v28.8h, v7.8h, v11.8h\n" "fmla v29.8h, v6.8h, v11.8h\n" - "ldr q11, [x26, x28]\n" + "ldr q11, [x25, x27]\n" "fmla v20.8h, v4.8h, v10.8h\n" "fmla v21.8h, v3.8h, v10.8h\n" "fmla v24.8h, v1.8h, v10.8h\n" "fmla v25.8h, v0.8h, v10.8h\n" "fmla v16.8h, v7.8h, v10.8h\n" "fmla v17.8h, v6.8h, v10.8h\n" - "ldr q10, [x7, x17]\n" + "ldr q10, [x8, x16]\n" "fmla v30.8h, v8.8h, v11.8h\n" "fmla v31.8h, v7.8h, v11.8h\n" - "ldr q11, [x12, x4]\n" + "ldr q11, [x11, x5]\n" "fmla v18.8h, v8.8h, v12.8h\n" "fmla v19.8h, v7.8h, v12.8h\n" "fmla v22.8h, v5.8h, v12.8h\n" "fmla v23.8h, v4.8h, v12.8h\n" "fmla v26.8h, v2.8h, v12.8h\n" "fmla v27.8h, v1.8h, v12.8h\n" - "ldr q12, [x7, x11]\n" - "add x7, x7, #0x10\n" + "ldr q12, [x8, x10]\n" + "add x8, x8, #0x10\n" "fmla v20.8h, v7.8h, v11.8h\n" "fmla v21.8h, v6.8h, v11.8h\n" "fmla v24.8h, v4.8h, v11.8h\n" "fmla v25.8h, v3.8h, v11.8h\n" "fmla v28.8h, v1.8h, v11.8h\n" "fmla v29.8h, v0.8h, v11.8h\n" - "ldr q11, [x12, x28]\n" + "ldr q11, [x11, x27]\n" "fmla v16.8h, v2.8h, v10.8h\n" "fmla v17.8h, v1.8h, v10.8h\n" "fmla v18.8h, v0.8h, v10.8h\n" - "ld1 { v10.8h }, [x14]\n" + "ld1 { v10.8h }, [x13]\n" "fmla v30.8h, v2.8h, v11.8h\n" "fmla v19.8h, v0.8h, v12.8h\n" "fmla v20.8h, v3.8h, v10.8h\n" @@ -527,24 +527,24 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "fmla v26.8h, v5.8h, v11.8h\n" "fmla v27.8h, v4.8h, v11.8h\n" "fmla v31.8h, v1.8h, v11.8h\n" - "ldr q11, [x9, x17]\n" + "ldr q11, [x28, x16]\n" "fmla v17.8h, v2.8h, v12.8h\n" "fmla v18.8h, v1.8h, v12.8h\n" - "ldr q12, [x14, x25]\n" - "add x14, x14, #0x10\n" + "ldr q12, [x13, x24]\n" + "add x13, x13, #0x10\n" "fmla v16.8h, v6.8h, v10.8h\n" - "ld1 { v10.8h }, [x12]\n" + "ld1 { v10.8h }, [x11]\n" "fmla v29.8h, v4.8h, v11.8h\n" "fmla v30.8h, v3.8h, v11.8h\n" "fmla v19.8h, v8.8h, v12.8h\n" "fmla v23.8h, v5.8h, v12.8h\n" "fmla v27.8h, v2.8h, v12.8h\n" - "ldr q12, [x12, x25]\n" - "add x12, x12, #0x10\n" + "ldr q12, [x11, x24]\n" + "add x11, x11, #0x10\n" "fmla v20.8h, v6.8h, v10.8h\n" "fmla v24.8h, v3.8h, v10.8h\n" "fmla v28.8h, v0.8h, v10.8h\n" - "ldr q10, [x26, x17]\n" + "ldr q10, [x25, x16]\n" "fmla v31.8h, v2.8h, v12.8h\n" "fmla v29.8h, v7.8h, v10.8h\n" "fmla v30.8h, v6.8h, v10.8h\n" @@ -552,36 +552,36 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "fmla v25.8h, v7.8h, v11.8h\n" "fmla v26.8h, v6.8h, v11.8h\n" "fmla v28.8h, v5.8h, v11.8h\n" - "ldr q11, [x9, x11]\n" + "ldr q11, [x28, x10]\n" "fmla v27.8h, v5.8h, v12.8h\n" "fmla v29.8h, v5.8h, v11.8h\n" "fmla v30.8h, v4.8h, v11.8h\n" "fmla v31.8h, v3.8h, v11.8h\n" "fmla v23.8h, v8.8h, v12.8h\n" - "ldr q12, [x26, x11]\n" + "ldr q12, [x25, x10]\n" "fmla v28.8h, v8.8h, v10.8h\n" - "ldr q10, [x15, x4]\n" + "ldr q10, [x14, x5]\n" "fmla v25.8h, v8.8h, v11.8h\n" "fmla v26.8h, v7.8h, v11.8h\n" - "add x26, x26, #0x10\n" + "add x25, x25, #0x10\n" "fmla v27.8h, v6.8h, v11.8h\n" - "ldr q11, [x15, x28]\n" "fmla v29.8h, v8.8h, v12.8h\n" - "add x15, x15, #0x10\n" + "ldr q11, [x14, x27]\n" + "add x14, x14, #0x10\n" "fmla v30.8h, v7.8h, v12.8h\n" "fmla v31.8h, v6.8h, v12.8h\n" - "ldr q12, [x9, x4]\n" + "ldr q12, [x28, x5]\n" "fmla v16.8h, v4.8h, v10.8h\n" "fmla v17.8h, v3.8h, v10.8h\n" "fmax v16.8h, v16.8h, v15.8h\n" "fmla v20.8h, v1.8h, v10.8h\n" "fmla v21.8h, v0.8h, v10.8h\n" - "ldr q10, [x9, x28]\n" + "ldr q10, [x28, x27]\n" "fmax v17.8h, v17.8h, v15.8h\n" "fmla v18.8h, v5.8h, v11.8h\n" "fmla v19.8h, v4.8h, v11.8h\n" "fmax v18.8h, v18.8h, v15.8h\n" - "add x9, x9, #0x10\n" + "add x28, x28, #0x10\n" "fmla v22.8h, v2.8h, v11.8h\n" "fmla v23.8h, v1.8h, v11.8h\n" "fmax v19.8h, v19.8h, v15.8h\n" @@ -607,101 +607,101 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "fmax v31.8h, v31.8h, v15.8h\n" "fmin v16.8h, v16.8h, v14.8h\n" "fmin v17.8h, v17.8h, v14.8h\n" - "st1 { v16.8h }, [x8]\n" + "st1 { v16.8h }, [x17]\n" "fmin v18.8h, v18.8h, v14.8h\n" "fmin v19.8h, v19.8h, v14.8h\n" - "str q17, [x8, x5]\n" + "str q17, [x17, x6]\n" "fmin v20.8h, v20.8h, v14.8h\n" "fmin v21.8h, v21.8h, v14.8h\n" - "str q18, [x8, x23]\n" + "str q18, [x17, x22]\n" "fmin v22.8h, v22.8h, v14.8h\n" "fmin v23.8h, v23.8h, v14.8h\n" - "str q19, [x8, x22]\n" - "add x8, x8, #0x10\n" + "str q19, [x17, x21]\n" + "add x17, x17, #0x10\n" "fmin v24.8h, v24.8h, v14.8h\n" "fmin v25.8h, v25.8h, v14.8h\n" - "st1 { v20.8h }, [x10]\n" + "st1 { v20.8h }, [x9]\n" "fmin v26.8h, v26.8h, v14.8h\n" "fmin v27.8h, v27.8h, v14.8h\n" - "str q21, [x10, x5]\n" + "str q21, [x9, x6]\n" "fmin v28.8h, v28.8h, v14.8h\n" "fmin v29.8h, v29.8h, v14.8h\n" - "str q22, [x10, x23]\n" + "str q22, [x9, x22]\n" "fmin v30.8h, v30.8h, v14.8h\n" "fmin v31.8h, v31.8h, v14.8h\n" - "str q23, [x10, x22]\n" - "add x10, x10, #0x10\n" - "st1 { v24.8h }, [x27]\n" - "str q25, [x27, x5]\n" - "str q26, [x27, x23]\n" - "str q27, [x27, x22]\n" - "add x27, x27, #0x10\n" - "st1 { v28.8h }, [x24]\n" - "str q29, [x24, x5]\n" - "str q30, [x24, x23]\n" - "str q31, [x24, x22]\n" - "add x24, x24, #0x10\n" + "str q23, [x9, x21]\n" + "add x9, x9, #0x10\n" + "st1 { v24.8h }, [x26]\n" + "str q25, [x26, x6]\n" + "str q26, [x26, x22]\n" + "str q27, [x26, x21]\n" + "add x26, x26, #0x10\n" + "st1 { v28.8h }, [x23]\n" + "str q29, [x23, x6]\n" + "str q30, [x23, x22]\n" + "str q31, [x23, x21]\n" + "add x23, x23, #0x10\n" "4:" // Tile loop: Oddments "tst %x[n_channels], #0x7\n" "beq 141f\n" - "ldr q13, [x16, #0x0]\n" - "ldr q0, [x16, #0x10]\n" - "add x23, x14, x17\n" - "add x22, x7, XZR\n" - "ldr q1, [x16, #0x20]\n" - "ldr q2, [x16, #0x30]\n" - "add x21, x7, x25\n" - "add x20, x14, x11\n" - "ldr q3, [x16, #0x40]\n" - "ldr q4, [x16, #0x50]\n" - "ldr q5, [x16, #0x60]\n" - "ldr q6, [x16, #0x70]\n" - "ldr q7, [x16, #0x80]\n" - "ldr q8, [x16, #0x90]\n" + "ldr q13, [x15, #0x0]\n" + "ldr q0, [x15, #0x10]\n" + "ldr q1, [x15, #0x20]\n" + "ldr q2, [x15, #0x30]\n" + "add x22, x13, x16\n" + "add x21, x8, XZR\n" + "ldr q3, [x15, #0x40]\n" + "ldr q4, [x15, #0x50]\n" + "add x20, x8, x24\n" + "add x19, x13, x10\n" + "ldr q5, [x15, #0x60]\n" + "ldr q6, [x15, #0x70]\n" + "ldr q7, [x15, #0x80]\n" + "ldr q8, [x15, #0x90]\n" "tbz %x[n_channels], #2, 6f\n" - "ldr d9, [x23], #0x8\n" - "ldr d10, [x22], #0x8\n" - "ldr d11, [x21], #0x8\n" - "ldr d12, [x20], #0x8\n" + "ldr d9, [x22], #0x8\n" + "ldr d10, [x21], #0x8\n" + "ldr d11, [x20], #0x8\n" + "ldr d12, [x19], #0x8\n" "tbz %x[n_channels], #1, 5f\n" - "ld1 { v9.s }[2], [x23], #0x4\n" - "ld1 { v10.s }[2], [x22], #0x4\n" - "ld1 { v11.s }[2], [x21], #0x4\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v9.s }[2], [x22], #0x4\n" + "ld1 { v10.s }[2], [x21], #0x4\n" + "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 8f\n" - "ld1 { v9.h }[6], [x23]\n" - "ld1 { v10.h }[6], [x22]\n" - "ld1 { v11.h }[6], [x21]\n" - "ld1 { v12.h }[6], [x20]\n" + "ld1 { v9.h }[6], [x22]\n" + "ld1 { v10.h }[6], [x21]\n" + "ld1 { v11.h }[6], [x20]\n" + "ld1 { v12.h }[6], [x19]\n" "b 8f\n" "5:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 5), (2, 3): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 8f\n" - "ld1 { v9.h }[4], [x23]\n" - "ld1 { v10.h }[4], [x22]\n" - "ld1 { v11.h }[4], [x21]\n" - "ld1 { v12.h }[4], [x20]\n" + "ld1 { v9.h }[4], [x22]\n" + "ld1 { v10.h }[4], [x21]\n" + "ld1 { v11.h }[4], [x20]\n" + "ld1 { v12.h }[4], [x19]\n" "b 8f\n" "6:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 5), (2, 3): Bit 2: Unset "tbz %x[n_channels], #1, 7f\n" - "ldr s9, [x23], #0x4\n" - "ldr s10, [x22], #0x4\n" - "ldr s11, [x21], #0x4\n" - "ldr s12, [x20], #0x4\n" + "ldr s9, [x22], #0x4\n" + "ldr s10, [x21], #0x4\n" + "ldr s11, [x20], #0x4\n" + "ldr s12, [x19], #0x4\n" "tbz %x[n_channels], #0, 8f\n" - "ld1 { v9.h }[2], [x23]\n" - "ld1 { v10.h }[2], [x22]\n" - "ld1 { v11.h }[2], [x21]\n" - "ld1 { v12.h }[2], [x20]\n" + "ld1 { v9.h }[2], [x22]\n" + "ld1 { v10.h }[2], [x21]\n" + "ld1 { v11.h }[2], [x20]\n" + "ld1 { v12.h }[2], [x19]\n" "b 8f\n" "7:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 5), (2, 3): Bit 2: Unset: Bit 1: Unset - "ldr h9, [x23, #0x0]\n" - "ldr h10, [x22, #0x0]\n" - "ldr h11, [x21, #0x0]\n" - "ldr h12, [x20, #0x0]\n" + "ldr h9, [x22, #0x0]\n" + "ldr h10, [x21, #0x0]\n" + "ldr h11, [x20, #0x0]\n" + "ldr h12, [x19, #0x0]\n" "8:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 5), (2, 3): Bit 2: End "mov v16.16b, v13.16b\n fmla v16.8h, v8.8h, v9.8h\n" "mov v17.16b, v13.16b\n fmla v17.8h, v7.8h, v9.8h\n" - "add x20, x26, XZR\n" + "add x19, x25, XZR\n" "mov v18.16b, v13.16b\n fmla v18.8h, v6.8h, v9.8h\n" "mov v21.16b, v13.16b\n fmla v21.8h, v4.8h, v9.8h\n" "mov v22.16b, v13.16b\n fmla v22.8h, v3.8h, v9.8h\n" @@ -721,72 +721,72 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "fmla v26.8h, v1.8h, v12.8h\n" "mov v27.16b, v13.16b\n fmla v27.8h, v0.8h, v12.8h\n" "tbz %x[n_channels], #2, 10f\n" - "ldr d10, [x20], #0x8\n" + "ldr d10, [x19], #0x8\n" "tbz %x[n_channels], #1, 9f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 12f\n" - "ld1 { v10.h }[6], [x20]\n" + "ld1 { v10.h }[6], [x19]\n" "b 12f\n" "9:" // Tile loop: Oddments: Load inputs: (5, 0): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 12f\n" - "ld1 { v10.h }[4], [x20]\n" + "ld1 { v10.h }[4], [x19]\n" "b 12f\n" "10:" // Tile loop: Oddments: Load inputs: (5, 0): Bit 2: Unset "tbz %x[n_channels], #1, 11f\n" - "ldr s10, [x20], #0x4\n" + "ldr s10, [x19], #0x4\n" "tbz %x[n_channels], #0, 12f\n" - "ld1 { v10.h }[2], [x20]\n" + "ld1 { v10.h }[2], [x19]\n" "b 12f\n" "11:" // Tile loop: Oddments: Load inputs: (5, 0): Bit 2: Unset: Bit 1: Unset - "ldr h10, [x20, #0x0]\n" + "ldr h10, [x19, #0x0]\n" "12:" // Tile loop: Oddments: Load inputs: (5, 0): Bit 2: End "mov v28.16b, v13.16b\n fmla v28.8h, v6.8h, v10.8h\n" - "add x20, x26, x25\n" + "add x19, x25, x24\n" "tbz %x[n_channels], #2, 14f\n" - "ldr d11, [x20], #0x8\n" + "ldr d11, [x19], #0x8\n" "tbz %x[n_channels], #1, 13f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 16f\n" - "ld1 { v11.h }[6], [x20]\n" + "ld1 { v11.h }[6], [x19]\n" "b 16f\n" "13:" // Tile loop: Oddments: Load inputs: (5, 5): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 16f\n" - "ld1 { v11.h }[4], [x20]\n" + "ld1 { v11.h }[4], [x19]\n" "b 16f\n" "14:" // Tile loop: Oddments: Load inputs: (5, 5): Bit 2: Unset "tbz %x[n_channels], #1, 15f\n" - "ldr s11, [x20], #0x4\n" + "ldr s11, [x19], #0x4\n" "tbz %x[n_channels], #0, 16f\n" - "ld1 { v11.h }[2], [x20]\n" + "ld1 { v11.h }[2], [x19]\n" "b 16f\n" "15:" // Tile loop: Oddments: Load inputs: (5, 5): Bit 2: Unset: Bit 1: Unset - "ldr h11, [x20, #0x0]\n" + "ldr h11, [x19, #0x0]\n" "16:" // Tile loop: Oddments: Load inputs: (5, 5): Bit 2: End "mov v31.16b, v13.16b\n fmla v31.8h, v8.8h, v11.8h\n" - "add x20, x12, x17\n" + "add x19, x11, x16\n" "tbz %x[n_channels], #2, 18f\n" - "ldr d9, [x20], #0x8\n" + "ldr d9, [x19], #0x8\n" "tbz %x[n_channels], #1, 17f\n" - "ld1 { v9.s }[2], [x20], #0x4\n" + "ld1 { v9.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 20f\n" - "ld1 { v9.h }[6], [x20]\n" + "ld1 { v9.h }[6], [x19]\n" "b 20f\n" "17:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 20f\n" - "ld1 { v9.h }[4], [x20]\n" + "ld1 { v9.h }[4], [x19]\n" "b 20f\n" "18:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: Unset "tbz %x[n_channels], #1, 19f\n" - "ldr s9, [x20], #0x4\n" + "ldr s9, [x19], #0x4\n" "tbz %x[n_channels], #0, 20f\n" - "ld1 { v9.h }[2], [x20]\n" + "ld1 { v9.h }[2], [x19]\n" "b 20f\n" "19:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: Unset: Bit 1: Unset - "ldr h9, [x20, #0x0]\n" + "ldr h9, [x19, #0x0]\n" "20:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: End "fmla v20.8h, v8.8h, v9.8h\n" "fmla v21.8h, v7.8h, v9.8h\n" - "add x20, x7, x4\n" + "add x19, x8, x5\n" "fmla v22.8h, v6.8h, v9.8h\n" "fmla v24.8h, v5.8h, v9.8h\n" "fmla v25.8h, v4.8h, v9.8h\n" @@ -795,74 +795,74 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "mov v29.16b, v13.16b\n fmla v29.8h, v1.8h, v9.8h\n" "mov v30.16b, v13.16b\n fmla v30.8h, v0.8h, v9.8h\n" "tbz %x[n_channels], #2, 22f\n" - "ldr d12, [x20], #0x8\n" + "ldr d12, [x19], #0x8\n" "tbz %x[n_channels], #1, 21f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 24f\n" - "ld1 { v12.h }[6], [x20]\n" + "ld1 { v12.h }[6], [x19]\n" "b 24f\n" "21:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 24f\n" - "ld1 { v12.h }[4], [x20]\n" + "ld1 { v12.h }[4], [x19]\n" "b 24f\n" "22:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 2: Unset "tbz %x[n_channels], #1, 23f\n" - "ldr s12, [x20], #0x4\n" + "ldr s12, [x19], #0x4\n" "tbz %x[n_channels], #0, 24f\n" - "ld1 { v12.h }[2], [x20]\n" + "ld1 { v12.h }[2], [x19]\n" "b 24f\n" "23:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 2: Unset: Bit 1: Unset - "ldr h12, [x20, #0x0]\n" + "ldr h12, [x19, #0x0]\n" "24:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 2: End "fmla v16.8h, v1.8h, v12.8h\n" "fmla v17.8h, v0.8h, v12.8h\n" - "add x20, x7, x28\n" + "add x19, x8, x27\n" "tbz %x[n_channels], #2, 26f\n" - "ldr d11, [x20], #0x8\n" + "ldr d11, [x19], #0x8\n" "tbz %x[n_channels], #1, 25f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 28f\n" - "ld1 { v11.h }[6], [x20]\n" + "ld1 { v11.h }[6], [x19]\n" "b 28f\n" "25:" // Tile loop: Oddments: Load inputs: (0, 4): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 28f\n" - "ld1 { v11.h }[4], [x20]\n" + "ld1 { v11.h }[4], [x19]\n" "b 28f\n" "26:" // Tile loop: Oddments: Load inputs: (0, 4): Bit 2: Unset "tbz %x[n_channels], #1, 27f\n" - "ldr s11, [x20], #0x4\n" + "ldr s11, [x19], #0x4\n" "tbz %x[n_channels], #0, 28f\n" - "ld1 { v11.h }[2], [x20]\n" + "ld1 { v11.h }[2], [x19]\n" "b 28f\n" "27:" // Tile loop: Oddments: Load inputs: (0, 4): Bit 2: Unset: Bit 1: Unset - "ldr h11, [x20, #0x0]\n" + "ldr h11, [x19, #0x0]\n" "28:" // Tile loop: Oddments: Load inputs: (0, 4): Bit 2: End "fmla v18.8h, v2.8h, v11.8h\n" "fmla v19.8h, v1.8h, v11.8h\n" - "add x20, x12, x11\n" + "add x19, x11, x10\n" "tbz %x[n_channels], #2, 30f\n" - "ldr d10, [x20], #0x8\n" + "ldr d10, [x19], #0x8\n" "tbz %x[n_channels], #1, 29f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 32f\n" - "ld1 { v10.h }[6], [x20]\n" + "ld1 { v10.h }[6], [x19]\n" "b 32f\n" "29:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 32f\n" - "ld1 { v10.h }[4], [x20]\n" + "ld1 { v10.h }[4], [x19]\n" "b 32f\n" "30:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: Unset "tbz %x[n_channels], #1, 31f\n" - "ldr s10, [x20], #0x4\n" + "ldr s10, [x19], #0x4\n" "tbz %x[n_channels], #0, 32f\n" - "ld1 { v10.h }[2], [x20]\n" + "ld1 { v10.h }[2], [x19]\n" "b 32f\n" "31:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: Unset: Bit 1: Unset - "ldr h10, [x20, #0x0]\n" + "ldr h10, [x19, #0x0]\n" "32:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: End "fmla v21.8h, v8.8h, v10.8h\n" "fmla v22.8h, v7.8h, v10.8h\n" - "add x20, x15, XZR\n" + "add x19, x14, XZR\n" "fmla v23.8h, v6.8h, v10.8h\n" "fmla v25.8h, v5.8h, v10.8h\n" "fmla v26.8h, v4.8h, v10.8h\n" @@ -871,645 +871,645 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "fmla v30.8h, v1.8h, v10.8h\n" "fmla v31.8h, v0.8h, v10.8h\n" "tbz %x[n_channels], #2, 34f\n" - "ldr d9, [x20], #0x8\n" + "ldr d9, [x19], #0x8\n" "tbz %x[n_channels], #1, 33f\n" - "ld1 { v9.s }[2], [x20], #0x4\n" + "ld1 { v9.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 36f\n" - "ld1 { v9.h }[6], [x20]\n" + "ld1 { v9.h }[6], [x19]\n" "b 36f\n" "33:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 36f\n" - "ld1 { v9.h }[4], [x20]\n" + "ld1 { v9.h }[4], [x19]\n" "b 36f\n" "34:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 2: Unset "tbz %x[n_channels], #1, 35f\n" - "ldr s9, [x20], #0x4\n" + "ldr s9, [x19], #0x4\n" "tbz %x[n_channels], #0, 36f\n" - "ld1 { v9.h }[2], [x20]\n" + "ld1 { v9.h }[2], [x19]\n" "b 36f\n" "35:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 2: Unset: Bit 1: Unset - "ldr h9, [x20, #0x0]\n" + "ldr h9, [x19, #0x0]\n" "36:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 2: End "fmla v16.8h, v3.8h, v9.8h\n" "fmla v20.8h, v0.8h, v9.8h\n" - "add x20, x15, x25\n" + "add x19, x14, x24\n" "tbz %x[n_channels], #2, 38f\n" - "ldr d12, [x20], #0x8\n" + "ldr d12, [x19], #0x8\n" "tbz %x[n_channels], #1, 37f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 40f\n" - "ld1 { v12.h }[6], [x20]\n" + "ld1 { v12.h }[6], [x19]\n" "b 40f\n" "37:" // Tile loop: Oddments: Load inputs: (1, 5): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 40f\n" - "ld1 { v12.h }[4], [x20]\n" + "ld1 { v12.h }[4], [x19]\n" "b 40f\n" "38:" // Tile loop: Oddments: Load inputs: (1, 5): Bit 2: Unset "tbz %x[n_channels], #1, 39f\n" - "ldr s12, [x20], #0x4\n" + "ldr s12, [x19], #0x4\n" "tbz %x[n_channels], #0, 40f\n" - "ld1 { v12.h }[2], [x20]\n" + "ld1 { v12.h }[2], [x19]\n" "b 40f\n" "39:" // Tile loop: Oddments: Load inputs: (1, 5): Bit 2: Unset: Bit 1: Unset - "ldr h12, [x20, #0x0]\n" + "ldr h12, [x19, #0x0]\n" "40:" // Tile loop: Oddments: Load inputs: (1, 5): Bit 2: End "fmla v19.8h, v5.8h, v12.8h\n" "fmla v23.8h, v2.8h, v12.8h\n" - "add x20, x9, XZR\n" + "add x19, x28, XZR\n" "tbz %x[n_channels], #2, 42f\n" - "ldr d11, [x20], #0x8\n" + "ldr d11, [x19], #0x8\n" "tbz %x[n_channels], #1, 41f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 44f\n" - "ld1 { v11.h }[6], [x20]\n" + "ld1 { v11.h }[6], [x19]\n" "b 44f\n" "41:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 44f\n" - "ld1 { v11.h }[4], [x20]\n" + "ld1 { v11.h }[4], [x19]\n" "b 44f\n" "42:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 2: Unset "tbz %x[n_channels], #1, 43f\n" - "ldr s11, [x20], #0x4\n" + "ldr s11, [x19], #0x4\n" "tbz %x[n_channels], #0, 44f\n" - "ld1 { v11.h }[2], [x20]\n" + "ld1 { v11.h }[2], [x19]\n" "b 44f\n" "43:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 2: Unset: Bit 1: Unset - "ldr h11, [x20, #0x0]\n" + "ldr h11, [x19, #0x0]\n" "44:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 2: End "fmla v24.8h, v6.8h, v11.8h\n" "fmla v28.8h, v3.8h, v11.8h\n" - "add x20, x15, x17\n" + "add x19, x14, x16\n" "tbz %x[n_channels], #2, 46f\n" - "ldr d10, [x20], #0x8\n" + "ldr d10, [x19], #0x8\n" "tbz %x[n_channels], #1, 45f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 48f\n" - "ld1 { v10.h }[6], [x20]\n" + "ld1 { v10.h }[6], [x19]\n" "b 48f\n" "45:" // Tile loop: Oddments: Load inputs: (1, 2): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 48f\n" - "ld1 { v10.h }[4], [x20]\n" + "ld1 { v10.h }[4], [x19]\n" "b 48f\n" "46:" // Tile loop: Oddments: Load inputs: (1, 2): Bit 2: Unset "tbz %x[n_channels], #1, 47f\n" - "ldr s10, [x20], #0x4\n" + "ldr s10, [x19], #0x4\n" "tbz %x[n_channels], #0, 48f\n" - "ld1 { v10.h }[2], [x20]\n" + "ld1 { v10.h }[2], [x19]\n" "b 48f\n" "47:" // Tile loop: Oddments: Load inputs: (1, 2): Bit 2: Unset: Bit 1: Unset - "ldr h10, [x20, #0x0]\n" + "ldr h10, [x19, #0x0]\n" "48:" // Tile loop: Oddments: Load inputs: (1, 2): Bit 2: End "fmla v16.8h, v5.8h, v10.8h\n" "fmla v17.8h, v4.8h, v10.8h\n" - "add x20, x9, x25\n" + "add x19, x28, x24\n" "fmla v18.8h, v3.8h, v10.8h\n" "fmla v20.8h, v2.8h, v10.8h\n" "fmla v21.8h, v1.8h, v10.8h\n" "fmla v22.8h, v0.8h, v10.8h\n" "tbz %x[n_channels], #2, 50f\n" - "ldr d11, [x20], #0x8\n" + "ldr d11, [x19], #0x8\n" "tbz %x[n_channels], #1, 49f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 52f\n" - "ld1 { v11.h }[6], [x20]\n" + "ld1 { v11.h }[6], [x19]\n" "b 52f\n" "49:" // Tile loop: Oddments: Load inputs: (4, 5): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 52f\n" - "ld1 { v11.h }[4], [x20]\n" + "ld1 { v11.h }[4], [x19]\n" "b 52f\n" "50:" // Tile loop: Oddments: Load inputs: (4, 5): Bit 2: Unset "tbz %x[n_channels], #1, 51f\n" - "ldr s11, [x20], #0x4\n" + "ldr s11, [x19], #0x4\n" "tbz %x[n_channels], #0, 52f\n" - "ld1 { v11.h }[2], [x20]\n" + "ld1 { v11.h }[2], [x19]\n" "b 52f\n" "51:" // Tile loop: Oddments: Load inputs: (4, 5): Bit 2: Unset: Bit 1: Unset - "ldr h11, [x20, #0x0]\n" + "ldr h11, [x19, #0x0]\n" "52:" // Tile loop: Oddments: Load inputs: (4, 5): Bit 2: End "fmla v27.8h, v8.8h, v11.8h\n" "fmla v31.8h, v5.8h, v11.8h\n" - "add x20, x15, x11\n" + "add x19, x14, x10\n" "tbz %x[n_channels], #2, 54f\n" - "ldr d12, [x20], #0x8\n" + "ldr d12, [x19], #0x8\n" "tbz %x[n_channels], #1, 53f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 56f\n" - "ld1 { v12.h }[6], [x20]\n" + "ld1 { v12.h }[6], [x19]\n" "b 56f\n" "53:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 56f\n" - "ld1 { v12.h }[4], [x20]\n" + "ld1 { v12.h }[4], [x19]\n" "b 56f\n" "54:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: Unset "tbz %x[n_channels], #1, 55f\n" - "ldr s12, [x20], #0x4\n" + "ldr s12, [x19], #0x4\n" "tbz %x[n_channels], #0, 56f\n" - "ld1 { v12.h }[2], [x20]\n" + "ld1 { v12.h }[2], [x19]\n" "b 56f\n" "55:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: Unset: Bit 1: Unset - "ldr h12, [x20, #0x0]\n" + "ldr h12, [x19, #0x0]\n" "56:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: End "fmla v17.8h, v5.8h, v12.8h\n" "fmla v18.8h, v4.8h, v12.8h\n" - "add x20, x26, x4\n" + "add x19, x25, x5\n" "fmla v19.8h, v3.8h, v12.8h\n" "fmla v21.8h, v2.8h, v12.8h\n" "fmla v22.8h, v1.8h, v12.8h\n" "fmla v23.8h, v0.8h, v12.8h\n" "tbz %x[n_channels], #2, 58f\n" - "ldr d11, [x20], #0x8\n" + "ldr d11, [x19], #0x8\n" "tbz %x[n_channels], #1, 57f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 60f\n" - "ld1 { v11.h }[6], [x20]\n" + "ld1 { v11.h }[6], [x19]\n" "b 60f\n" "57:" // Tile loop: Oddments: Load inputs: (5, 1): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 60f\n" - "ld1 { v11.h }[4], [x20]\n" + "ld1 { v11.h }[4], [x19]\n" "b 60f\n" "58:" // Tile loop: Oddments: Load inputs: (5, 1): Bit 2: Unset "tbz %x[n_channels], #1, 59f\n" - "ldr s11, [x20], #0x4\n" + "ldr s11, [x19], #0x4\n" "tbz %x[n_channels], #0, 60f\n" - "ld1 { v11.h }[2], [x20]\n" + "ld1 { v11.h }[2], [x19]\n" "b 60f\n" "59:" // Tile loop: Oddments: Load inputs: (5, 1): Bit 2: Unset: Bit 1: Unset - "ldr h11, [x20, #0x0]\n" + "ldr h11, [x19, #0x0]\n" "60:" // Tile loop: Oddments: Load inputs: (5, 1): Bit 2: End "fmla v28.8h, v7.8h, v11.8h\n" "fmla v29.8h, v6.8h, v11.8h\n" - "add x20, x14, x4\n" + "add x19, x13, x5\n" "tbz %x[n_channels], #2, 62f\n" - "ldr d10, [x20], #0x8\n" + "ldr d10, [x19], #0x8\n" "tbz %x[n_channels], #1, 61f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 64f\n" - "ld1 { v10.h }[6], [x20]\n" + "ld1 { v10.h }[6], [x19]\n" "b 64f\n" "61:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 64f\n" - "ld1 { v10.h }[4], [x20]\n" + "ld1 { v10.h }[4], [x19]\n" "b 64f\n" "62:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: Unset "tbz %x[n_channels], #1, 63f\n" - "ldr s10, [x20], #0x4\n" + "ldr s10, [x19], #0x4\n" "tbz %x[n_channels], #0, 64f\n" - "ld1 { v10.h }[2], [x20]\n" + "ld1 { v10.h }[2], [x19]\n" "b 64f\n" "63:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: Unset: Bit 1: Unset - "ldr h10, [x20, #0x0]\n" + "ldr h10, [x19, #0x0]\n" "64:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: End "fmla v16.8h, v7.8h, v10.8h\n" "fmla v17.8h, v6.8h, v10.8h\n" - "add x20, x26, x28\n" + "add x19, x25, x27\n" "fmla v20.8h, v4.8h, v10.8h\n" "fmla v21.8h, v3.8h, v10.8h\n" "fmla v24.8h, v1.8h, v10.8h\n" "fmla v25.8h, v0.8h, v10.8h\n" "tbz %x[n_channels], #2, 66f\n" - "ldr d11, [x20], #0x8\n" + "ldr d11, [x19], #0x8\n" "tbz %x[n_channels], #1, 65f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 68f\n" - "ld1 { v11.h }[6], [x20]\n" + "ld1 { v11.h }[6], [x19]\n" "b 68f\n" "65:" // Tile loop: Oddments: Load inputs: (5, 4): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 68f\n" - "ld1 { v11.h }[4], [x20]\n" + "ld1 { v11.h }[4], [x19]\n" "b 68f\n" "66:" // Tile loop: Oddments: Load inputs: (5, 4): Bit 2: Unset "tbz %x[n_channels], #1, 67f\n" - "ldr s11, [x20], #0x4\n" + "ldr s11, [x19], #0x4\n" "tbz %x[n_channels], #0, 68f\n" - "ld1 { v11.h }[2], [x20]\n" + "ld1 { v11.h }[2], [x19]\n" "b 68f\n" "67:" // Tile loop: Oddments: Load inputs: (5, 4): Bit 2: Unset: Bit 1: Unset - "ldr h11, [x20, #0x0]\n" + "ldr h11, [x19, #0x0]\n" "68:" // Tile loop: Oddments: Load inputs: (5, 4): Bit 2: End "fmla v30.8h, v8.8h, v11.8h\n" "fmla v31.8h, v7.8h, v11.8h\n" - "add x20, x14, x28\n" + "add x19, x13, x27\n" "tbz %x[n_channels], #2, 70f\n" - "ldr d12, [x20], #0x8\n" + "ldr d12, [x19], #0x8\n" "tbz %x[n_channels], #1, 69f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 72f\n" - "ld1 { v12.h }[6], [x20]\n" + "ld1 { v12.h }[6], [x19]\n" "b 72f\n" "69:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 72f\n" - "ld1 { v12.h }[4], [x20]\n" + "ld1 { v12.h }[4], [x19]\n" "b 72f\n" "70:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: Unset "tbz %x[n_channels], #1, 71f\n" - "ldr s12, [x20], #0x4\n" + "ldr s12, [x19], #0x4\n" "tbz %x[n_channels], #0, 72f\n" - "ld1 { v12.h }[2], [x20]\n" + "ld1 { v12.h }[2], [x19]\n" "b 72f\n" "71:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: Unset: Bit 1: Unset - "ldr h12, [x20, #0x0]\n" + "ldr h12, [x19, #0x0]\n" "72:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: End "fmla v18.8h, v8.8h, v12.8h\n" "fmla v19.8h, v7.8h, v12.8h\n" - "add x20, x7, x17\n" + "add x19, x8, x16\n" "fmla v22.8h, v5.8h, v12.8h\n" "fmla v23.8h, v4.8h, v12.8h\n" "fmla v26.8h, v2.8h, v12.8h\n" "fmla v27.8h, v1.8h, v12.8h\n" "tbz %x[n_channels], #2, 74f\n" - "ldr d10, [x20], #0x8\n" + "ldr d10, [x19], #0x8\n" "tbz %x[n_channels], #1, 73f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 76f\n" - "ld1 { v10.h }[6], [x20]\n" + "ld1 { v10.h }[6], [x19]\n" "b 76f\n" "73:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 76f\n" - "ld1 { v10.h }[4], [x20]\n" + "ld1 { v10.h }[4], [x19]\n" "b 76f\n" "74:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 2: Unset "tbz %x[n_channels], #1, 75f\n" - "ldr s10, [x20], #0x4\n" + "ldr s10, [x19], #0x4\n" "tbz %x[n_channels], #0, 76f\n" - "ld1 { v10.h }[2], [x20]\n" + "ld1 { v10.h }[2], [x19]\n" "b 76f\n" "75:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 2: Unset: Bit 1: Unset - "ldr h10, [x20, #0x0]\n" + "ldr h10, [x19, #0x0]\n" "76:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 2: End "fmla v16.8h, v2.8h, v10.8h\n" "fmla v17.8h, v1.8h, v10.8h\n" - "add x20, x12, x4\n" + "add x19, x11, x5\n" "fmla v18.8h, v0.8h, v10.8h\n" "tbz %x[n_channels], #2, 78f\n" - "ldr d11, [x20], #0x8\n" + "ldr d11, [x19], #0x8\n" "tbz %x[n_channels], #1, 77f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 80f\n" - "ld1 { v11.h }[6], [x20]\n" + "ld1 { v11.h }[6], [x19]\n" "b 80f\n" "77:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 80f\n" - "ld1 { v11.h }[4], [x20]\n" + "ld1 { v11.h }[4], [x19]\n" "b 80f\n" "78:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: Unset "tbz %x[n_channels], #1, 79f\n" - "ldr s11, [x20], #0x4\n" + "ldr s11, [x19], #0x4\n" "tbz %x[n_channels], #0, 80f\n" - "ld1 { v11.h }[2], [x20]\n" + "ld1 { v11.h }[2], [x19]\n" "b 80f\n" "79:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: Unset: Bit 1: Unset - "ldr h11, [x20, #0x0]\n" + "ldr h11, [x19, #0x0]\n" "80:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: End "fmla v20.8h, v7.8h, v11.8h\n" "fmla v21.8h, v6.8h, v11.8h\n" - "add x20, x7, x11\n" + "add x19, x8, x10\n" "fmla v24.8h, v4.8h, v11.8h\n" "fmla v25.8h, v3.8h, v11.8h\n" "fmla v28.8h, v1.8h, v11.8h\n" "fmla v29.8h, v0.8h, v11.8h\n" "tbz %x[n_channels], #2, 82f\n" - "ldr d12, [x20], #0x8\n" + "ldr d12, [x19], #0x8\n" "tbz %x[n_channels], #1, 81f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 84f\n" - "ld1 { v12.h }[6], [x20]\n" + "ld1 { v12.h }[6], [x19]\n" "b 84f\n" "81:" // Tile loop: Oddments: Load inputs: (0, 3): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 84f\n" - "ld1 { v12.h }[4], [x20]\n" + "ld1 { v12.h }[4], [x19]\n" "b 84f\n" "82:" // Tile loop: Oddments: Load inputs: (0, 3): Bit 2: Unset "tbz %x[n_channels], #1, 83f\n" - "ldr s12, [x20], #0x4\n" + "ldr s12, [x19], #0x4\n" "tbz %x[n_channels], #0, 84f\n" - "ld1 { v12.h }[2], [x20]\n" + "ld1 { v12.h }[2], [x19]\n" "b 84f\n" "83:" // Tile loop: Oddments: Load inputs: (0, 3): Bit 2: Unset: Bit 1: Unset - "ldr h12, [x20, #0x0]\n" + "ldr h12, [x19, #0x0]\n" "84:" // Tile loop: Oddments: Load inputs: (0, 3): Bit 2: End "fmla v17.8h, v2.8h, v12.8h\n" "fmla v18.8h, v1.8h, v12.8h\n" - "add x20, x14, XZR\n" + "add x19, x13, XZR\n" "fmla v19.8h, v0.8h, v12.8h\n" "tbz %x[n_channels], #2, 86f\n" - "ldr d10, [x20], #0x8\n" + "ldr d10, [x19], #0x8\n" "tbz %x[n_channels], #1, 85f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 88f\n" - "ld1 { v10.h }[6], [x20]\n" + "ld1 { v10.h }[6], [x19]\n" "b 88f\n" "85:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 88f\n" - "ld1 { v10.h }[4], [x20]\n" + "ld1 { v10.h }[4], [x19]\n" "b 88f\n" "86:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: Unset "tbz %x[n_channels], #1, 87f\n" - "ldr s10, [x20], #0x4\n" + "ldr s10, [x19], #0x4\n" "tbz %x[n_channels], #0, 88f\n" - "ld1 { v10.h }[2], [x20]\n" + "ld1 { v10.h }[2], [x19]\n" "b 88f\n" "87:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: Unset: Bit 1: Unset - "ldr h10, [x20, #0x0]\n" + "ldr h10, [x19, #0x0]\n" "88:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: End "fmla v16.8h, v6.8h, v10.8h\n" "fmla v20.8h, v3.8h, v10.8h\n" - "add x20, x12, x28\n" + "add x19, x11, x27\n" "fmla v24.8h, v0.8h, v10.8h\n" "tbz %x[n_channels], #2, 90f\n" - "ldr d11, [x20], #0x8\n" + "ldr d11, [x19], #0x8\n" "tbz %x[n_channels], #1, 89f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 92f\n" - "ld1 { v11.h }[6], [x20]\n" + "ld1 { v11.h }[6], [x19]\n" "b 92f\n" "89:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 92f\n" - "ld1 { v11.h }[4], [x20]\n" + "ld1 { v11.h }[4], [x19]\n" "b 92f\n" "90:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: Unset "tbz %x[n_channels], #1, 91f\n" - "ldr s11, [x20], #0x4\n" + "ldr s11, [x19], #0x4\n" "tbz %x[n_channels], #0, 92f\n" - "ld1 { v11.h }[2], [x20]\n" + "ld1 { v11.h }[2], [x19]\n" "b 92f\n" "91:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: Unset: Bit 1: Unset - "ldr h11, [x20, #0x0]\n" + "ldr h11, [x19, #0x0]\n" "92:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: End "fmla v22.8h, v8.8h, v11.8h\n" "fmla v23.8h, v7.8h, v11.8h\n" - "add x20, x14, x25\n" + "add x19, x13, x24\n" "fmla v26.8h, v5.8h, v11.8h\n" "fmla v27.8h, v4.8h, v11.8h\n" "fmla v30.8h, v2.8h, v11.8h\n" "fmla v31.8h, v1.8h, v11.8h\n" "tbz %x[n_channels], #2, 94f\n" - "ldr d12, [x20], #0x8\n" + "ldr d12, [x19], #0x8\n" "tbz %x[n_channels], #1, 93f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 96f\n" - "ld1 { v12.h }[6], [x20]\n" + "ld1 { v12.h }[6], [x19]\n" "b 96f\n" "93:" // Tile loop: Oddments: Load inputs: (2, 5): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 96f\n" - "ld1 { v12.h }[4], [x20]\n" + "ld1 { v12.h }[4], [x19]\n" "b 96f\n" "94:" // Tile loop: Oddments: Load inputs: (2, 5): Bit 2: Unset "tbz %x[n_channels], #1, 95f\n" - "ldr s12, [x20], #0x4\n" + "ldr s12, [x19], #0x4\n" "tbz %x[n_channels], #0, 96f\n" - "ld1 { v12.h }[2], [x20]\n" + "ld1 { v12.h }[2], [x19]\n" "b 96f\n" "95:" // Tile loop: Oddments: Load inputs: (2, 5): Bit 2: Unset: Bit 1: Unset - "ldr h12, [x20, #0x0]\n" + "ldr h12, [x19, #0x0]\n" "96:" // Tile loop: Oddments: Load inputs: (2, 5): Bit 2: End "fmla v19.8h, v8.8h, v12.8h\n" "fmla v23.8h, v5.8h, v12.8h\n" - "add x20, x12, XZR\n" + "add x19, x11, XZR\n" "fmla v27.8h, v2.8h, v12.8h\n" "tbz %x[n_channels], #2, 98f\n" - "ldr d10, [x20], #0x8\n" + "ldr d10, [x19], #0x8\n" "tbz %x[n_channels], #1, 97f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 100f\n" - "ld1 { v10.h }[6], [x20]\n" + "ld1 { v10.h }[6], [x19]\n" "b 100f\n" "97:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 100f\n" - "ld1 { v10.h }[4], [x20]\n" + "ld1 { v10.h }[4], [x19]\n" "b 100f\n" "98:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: Unset "tbz %x[n_channels], #1, 99f\n" - "ldr s10, [x20], #0x4\n" + "ldr s10, [x19], #0x4\n" "tbz %x[n_channels], #0, 100f\n" - "ld1 { v10.h }[2], [x20]\n" + "ld1 { v10.h }[2], [x19]\n" "b 100f\n" "99:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: Unset: Bit 1: Unset - "ldr h10, [x20, #0x0]\n" + "ldr h10, [x19, #0x0]\n" "100:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: End "fmla v20.8h, v6.8h, v10.8h\n" "fmla v24.8h, v3.8h, v10.8h\n" - "add x20, x9, x17\n" + "add x19, x28, x16\n" "fmla v28.8h, v0.8h, v10.8h\n" "tbz %x[n_channels], #2, 102f\n" - "ldr d11, [x20], #0x8\n" + "ldr d11, [x19], #0x8\n" "tbz %x[n_channels], #1, 101f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 104f\n" - "ld1 { v11.h }[6], [x20]\n" + "ld1 { v11.h }[6], [x19]\n" "b 104f\n" "101:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 104f\n" - "ld1 { v11.h }[4], [x20]\n" + "ld1 { v11.h }[4], [x19]\n" "b 104f\n" "102:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: Unset "tbz %x[n_channels], #1, 103f\n" - "ldr s11, [x20], #0x4\n" + "ldr s11, [x19], #0x4\n" "tbz %x[n_channels], #0, 104f\n" - "ld1 { v11.h }[2], [x20]\n" + "ld1 { v11.h }[2], [x19]\n" "b 104f\n" "103:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: Unset: Bit 1: Unset - "ldr h11, [x20, #0x0]\n" + "ldr h11, [x19, #0x0]\n" "104:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: End "fmla v24.8h, v8.8h, v11.8h\n" "fmla v25.8h, v7.8h, v11.8h\n" - "add x20, x12, x25\n" + "add x19, x11, x24\n" "fmla v26.8h, v6.8h, v11.8h\n" "fmla v28.8h, v5.8h, v11.8h\n" "fmla v29.8h, v4.8h, v11.8h\n" "fmla v30.8h, v3.8h, v11.8h\n" "tbz %x[n_channels], #2, 106f\n" - "ldr d12, [x20], #0x8\n" + "ldr d12, [x19], #0x8\n" "tbz %x[n_channels], #1, 105f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 108f\n" - "ld1 { v12.h }[6], [x20]\n" + "ld1 { v12.h }[6], [x19]\n" "b 108f\n" "105:" // Tile loop: Oddments: Load inputs: (3, 5): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 108f\n" - "ld1 { v12.h }[4], [x20]\n" + "ld1 { v12.h }[4], [x19]\n" "b 108f\n" "106:" // Tile loop: Oddments: Load inputs: (3, 5): Bit 2: Unset "tbz %x[n_channels], #1, 107f\n" - "ldr s12, [x20], #0x4\n" + "ldr s12, [x19], #0x4\n" "tbz %x[n_channels], #0, 108f\n" - "ld1 { v12.h }[2], [x20]\n" + "ld1 { v12.h }[2], [x19]\n" "b 108f\n" "107:" // Tile loop: Oddments: Load inputs: (3, 5): Bit 2: Unset: Bit 1: Unset - "ldr h12, [x20, #0x0]\n" + "ldr h12, [x19, #0x0]\n" "108:" // Tile loop: Oddments: Load inputs: (3, 5): Bit 2: End "fmla v23.8h, v8.8h, v12.8h\n" "fmla v27.8h, v5.8h, v12.8h\n" - "add x20, x26, x17\n" + "add x19, x25, x16\n" "fmla v31.8h, v2.8h, v12.8h\n" "tbz %x[n_channels], #2, 110f\n" - "ldr d10, [x20], #0x8\n" + "ldr d10, [x19], #0x8\n" "tbz %x[n_channels], #1, 109f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 112f\n" - "ld1 { v10.h }[6], [x20]\n" + "ld1 { v10.h }[6], [x19]\n" "b 112f\n" "109:" // Tile loop: Oddments: Load inputs: (5, 2): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 112f\n" - "ld1 { v10.h }[4], [x20]\n" + "ld1 { v10.h }[4], [x19]\n" "b 112f\n" "110:" // Tile loop: Oddments: Load inputs: (5, 2): Bit 2: Unset "tbz %x[n_channels], #1, 111f\n" - "ldr s10, [x20], #0x4\n" + "ldr s10, [x19], #0x4\n" "tbz %x[n_channels], #0, 112f\n" - "ld1 { v10.h }[2], [x20]\n" + "ld1 { v10.h }[2], [x19]\n" "b 112f\n" "111:" // Tile loop: Oddments: Load inputs: (5, 2): Bit 2: Unset: Bit 1: Unset - "ldr h10, [x20, #0x0]\n" + "ldr h10, [x19, #0x0]\n" "112:" // Tile loop: Oddments: Load inputs: (5, 2): Bit 2: End "fmla v28.8h, v8.8h, v10.8h\n" "fmla v29.8h, v7.8h, v10.8h\n" - "add x20, x9, x11\n" + "add x19, x28, x10\n" "fmla v30.8h, v6.8h, v10.8h\n" "tbz %x[n_channels], #2, 114f\n" - "ldr d11, [x20], #0x8\n" + "ldr d11, [x19], #0x8\n" "tbz %x[n_channels], #1, 113f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 116f\n" - "ld1 { v11.h }[6], [x20]\n" + "ld1 { v11.h }[6], [x19]\n" "b 116f\n" "113:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 116f\n" - "ld1 { v11.h }[4], [x20]\n" + "ld1 { v11.h }[4], [x19]\n" "b 116f\n" "114:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: Unset "tbz %x[n_channels], #1, 115f\n" - "ldr s11, [x20], #0x4\n" + "ldr s11, [x19], #0x4\n" "tbz %x[n_channels], #0, 116f\n" - "ld1 { v11.h }[2], [x20]\n" + "ld1 { v11.h }[2], [x19]\n" "b 116f\n" "115:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: Unset: Bit 1: Unset - "ldr h11, [x20, #0x0]\n" + "ldr h11, [x19, #0x0]\n" "116:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: End "fmla v25.8h, v8.8h, v11.8h\n" "fmla v26.8h, v7.8h, v11.8h\n" - "add x20, x26, x11\n" + "add x19, x25, x10\n" "fmla v27.8h, v6.8h, v11.8h\n" "fmla v29.8h, v5.8h, v11.8h\n" "fmla v30.8h, v4.8h, v11.8h\n" "fmla v31.8h, v3.8h, v11.8h\n" "tbz %x[n_channels], #2, 118f\n" - "ldr d12, [x20], #0x8\n" + "ldr d12, [x19], #0x8\n" "tbz %x[n_channels], #1, 117f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 120f\n" - "ld1 { v12.h }[6], [x20]\n" + "ld1 { v12.h }[6], [x19]\n" "b 120f\n" "117:" // Tile loop: Oddments: Load inputs: (5, 3): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 120f\n" - "ld1 { v12.h }[4], [x20]\n" + "ld1 { v12.h }[4], [x19]\n" "b 120f\n" "118:" // Tile loop: Oddments: Load inputs: (5, 3): Bit 2: Unset "tbz %x[n_channels], #1, 119f\n" - "ldr s12, [x20], #0x4\n" + "ldr s12, [x19], #0x4\n" "tbz %x[n_channels], #0, 120f\n" - "ld1 { v12.h }[2], [x20]\n" + "ld1 { v12.h }[2], [x19]\n" "b 120f\n" "119:" // Tile loop: Oddments: Load inputs: (5, 3): Bit 2: Unset: Bit 1: Unset - "ldr h12, [x20, #0x0]\n" + "ldr h12, [x19, #0x0]\n" "120:" // Tile loop: Oddments: Load inputs: (5, 3): Bit 2: End "fmla v29.8h, v8.8h, v12.8h\n" "fmla v30.8h, v7.8h, v12.8h\n" - "add x20, x15, x4\n" + "add x19, x14, x5\n" "fmla v31.8h, v6.8h, v12.8h\n" "tbz %x[n_channels], #2, 122f\n" - "ldr d10, [x20], #0x8\n" + "ldr d10, [x19], #0x8\n" "tbz %x[n_channels], #1, 121f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 124f\n" - "ld1 { v10.h }[6], [x20]\n" + "ld1 { v10.h }[6], [x19]\n" "b 124f\n" "121:" // Tile loop: Oddments: Load inputs: (1, 1): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 124f\n" - "ld1 { v10.h }[4], [x20]\n" + "ld1 { v10.h }[4], [x19]\n" "b 124f\n" "122:" // Tile loop: Oddments: Load inputs: (1, 1): Bit 2: Unset "tbz %x[n_channels], #1, 123f\n" - "ldr s10, [x20], #0x4\n" + "ldr s10, [x19], #0x4\n" "tbz %x[n_channels], #0, 124f\n" - "ld1 { v10.h }[2], [x20]\n" + "ld1 { v10.h }[2], [x19]\n" "b 124f\n" "123:" // Tile loop: Oddments: Load inputs: (1, 1): Bit 2: Unset: Bit 1: Unset - "ldr h10, [x20, #0x0]\n" + "ldr h10, [x19, #0x0]\n" "124:" // Tile loop: Oddments: Load inputs: (1, 1): Bit 2: End "fmla v16.8h, v4.8h, v10.8h\n" "fmla v17.8h, v3.8h, v10.8h\n" - "add x20, x15, x28\n" + "add x19, x14, x27\n" "fmla v20.8h, v1.8h, v10.8h\n" "fmla v21.8h, v0.8h, v10.8h\n" "tbz %x[n_channels], #2, 126f\n" - "ldr d11, [x20], #0x8\n" + "ldr d11, [x19], #0x8\n" "tbz %x[n_channels], #1, 125f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 128f\n" - "ld1 { v11.h }[6], [x20]\n" + "ld1 { v11.h }[6], [x19]\n" "b 128f\n" "125:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 128f\n" - "ld1 { v11.h }[4], [x20]\n" + "ld1 { v11.h }[4], [x19]\n" "b 128f\n" "126:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: Unset "tbz %x[n_channels], #1, 127f\n" - "ldr s11, [x20], #0x4\n" + "ldr s11, [x19], #0x4\n" "tbz %x[n_channels], #0, 128f\n" - "ld1 { v11.h }[2], [x20]\n" + "ld1 { v11.h }[2], [x19]\n" "b 128f\n" "127:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: Unset: Bit 1: Unset - "ldr h11, [x20, #0x0]\n" + "ldr h11, [x19, #0x0]\n" "128:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: End "fmla v18.8h, v5.8h, v11.8h\n" "fmla v19.8h, v4.8h, v11.8h\n" - "add x20, x9, x4\n" + "add x19, x28, x5\n" "fmla v22.8h, v2.8h, v11.8h\n" "fmla v23.8h, v1.8h, v11.8h\n" "tbz %x[n_channels], #2, 130f\n" - "ldr d12, [x20], #0x8\n" + "ldr d12, [x19], #0x8\n" "tbz %x[n_channels], #1, 129f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 132f\n" - "ld1 { v12.h }[6], [x20]\n" + "ld1 { v12.h }[6], [x19]\n" "b 132f\n" "129:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 132f\n" - "ld1 { v12.h }[4], [x20]\n" + "ld1 { v12.h }[4], [x19]\n" "b 132f\n" "130:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: Unset "tbz %x[n_channels], #1, 131f\n" - "ldr s12, [x20], #0x4\n" + "ldr s12, [x19], #0x4\n" "tbz %x[n_channels], #0, 132f\n" - "ld1 { v12.h }[2], [x20]\n" + "ld1 { v12.h }[2], [x19]\n" "b 132f\n" "131:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: Unset: Bit 1: Unset - "ldr h12, [x20, #0x0]\n" + "ldr h12, [x19, #0x0]\n" "132:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: End "fmla v24.8h, v7.8h, v12.8h\n" "fmla v25.8h, v6.8h, v12.8h\n" - "add x20, x9, x28\n" + "add x19, x28, x27\n" "fmla v28.8h, v4.8h, v12.8h\n" "fmla v29.8h, v3.8h, v12.8h\n" "tbz %x[n_channels], #2, 134f\n" - "ldr d10, [x20], #0x8\n" + "ldr d10, [x19], #0x8\n" "tbz %x[n_channels], #1, 133f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x19], #0x4\n" "tbz %x[n_channels], #0, 136f\n" - "ld1 { v10.h }[6], [x20]\n" + "ld1 { v10.h }[6], [x19]\n" "b 136f\n" "133:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 136f\n" - "ld1 { v10.h }[4], [x20]\n" + "ld1 { v10.h }[4], [x19]\n" "b 136f\n" "134:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: Unset "tbz %x[n_channels], #1, 135f\n" - "ldr s10, [x20], #0x4\n" + "ldr s10, [x19], #0x4\n" "tbz %x[n_channels], #0, 136f\n" - "ld1 { v10.h }[2], [x20]\n" + "ld1 { v10.h }[2], [x19]\n" "b 136f\n" "135:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: Unset: Bit 1: Unset - "ldr h10, [x20, #0x0]\n" + "ldr h10, [x19, #0x0]\n" "136:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: End "fmla v26.8h, v8.8h, v10.8h\n" "fmla v27.8h, v7.8h, v10.8h\n" @@ -1548,186 +1548,186 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "fmin v30.8h, v30.8h, v14.8h\n" "fmin v31.8h, v31.8h, v14.8h\n" "tbz %x[n_channels], #2, 138f\n" - "mov x23, x8\n" - "mov x22, x10\n" - "st1 { v16.d }[0], [x23], x5\n" - "mov x21, x27\n" - "mov x20, x24\n" - "st1 { v20.d }[0], [x22], x5\n" - "st1 { v24.d }[0], [x21], x5\n" - "add x8, x8, #0x8\n" - "add x10, x10, #0x8\n" - "st1 { v28.d }[0], [x20], x5\n" - "add x27, x27, #0x8\n" - "add x24, x24, #0x8\n" - "st1 { v17.d }[0], [x23], x5\n" - "st1 { v21.d }[0], [x22], x5\n" - "st1 { v25.d }[0], [x21], x5\n" - "st1 { v29.d }[0], [x20], x5\n" - "st1 { v18.d }[0], [x23], x5\n" - "st1 { v22.d }[0], [x22], x5\n" - "st1 { v26.d }[0], [x21], x5\n" - "st1 { v30.d }[0], [x20], x5\n" - "st1 { v19.d }[0], [x23]\n" - "st1 { v23.d }[0], [x22]\n" - "st1 { v27.d }[0], [x21]\n" - "st1 { v31.d }[0], [x20]\n" + "mov x22, x17\n" + "mov x21, x9\n" + "mov x20, x26\n" + "st1 { v16.d }[0], [x22], x6\n" + "mov x19, x23\n" + "st1 { v20.d }[0], [x21], x6\n" + "add x17, x17, #0x8\n" + "st1 { v24.d }[0], [x20], x6\n" + "add x9, x9, #0x8\n" + "add x26, x26, #0x8\n" + "st1 { v28.d }[0], [x19], x6\n" + "add x23, x23, #0x8\n" + "st1 { v17.d }[0], [x22], x6\n" + "st1 { v21.d }[0], [x21], x6\n" + "st1 { v25.d }[0], [x20], x6\n" + "st1 { v29.d }[0], [x19], x6\n" + "st1 { v18.d }[0], [x22], x6\n" + "st1 { v22.d }[0], [x21], x6\n" + "st1 { v26.d }[0], [x20], x6\n" + "st1 { v30.d }[0], [x19], x6\n" + "st1 { v19.d }[0], [x22]\n" + "st1 { v23.d }[0], [x21]\n" + "st1 { v27.d }[0], [x20]\n" + "st1 { v31.d }[0], [x19]\n" "tbz %x[n_channels], #1, 137f\n" - "mov x23, x8\n" - "mov x22, x10\n" - "st1 { v16.s }[2], [x23], x5\n" - "mov x21, x27\n" - "mov x20, x24\n" - "st1 { v20.s }[2], [x22], x5\n" - "st1 { v24.s }[2], [x21], x5\n" - "add x8, x8, #0x4\n" - "add x10, x10, #0x4\n" - "st1 { v28.s }[2], [x20], x5\n" - "add x27, x27, #0x4\n" - "add x24, x24, #0x4\n" - "st1 { v17.s }[2], [x23], x5\n" - "st1 { v21.s }[2], [x22], x5\n" - "st1 { v25.s }[2], [x21], x5\n" - "st1 { v29.s }[2], [x20], x5\n" - "st1 { v18.s }[2], [x23], x5\n" - "st1 { v22.s }[2], [x22], x5\n" - "st1 { v26.s }[2], [x21], x5\n" - "st1 { v30.s }[2], [x20], x5\n" - "st1 { v19.s }[2], [x23]\n" - "st1 { v23.s }[2], [x22]\n" - "st1 { v27.s }[2], [x21]\n" - "st1 { v31.s }[2], [x20]\n" + "mov x22, x17\n" + "mov x21, x9\n" + "mov x20, x26\n" + "mov x19, x23\n" + "st1 { v16.s }[2], [x22], x6\n" + "st1 { v20.s }[2], [x21], x6\n" + "add x17, x17, #0x4\n" + "add x9, x9, #0x4\n" + "st1 { v24.s }[2], [x20], x6\n" + "add x26, x26, #0x4\n" + "add x23, x23, #0x4\n" + "st1 { v28.s }[2], [x19], x6\n" + "st1 { v17.s }[2], [x22], x6\n" + "st1 { v21.s }[2], [x21], x6\n" + "st1 { v25.s }[2], [x20], x6\n" + "st1 { v29.s }[2], [x19], x6\n" + "st1 { v18.s }[2], [x22], x6\n" + "st1 { v22.s }[2], [x21], x6\n" + "st1 { v26.s }[2], [x20], x6\n" + "st1 { v30.s }[2], [x19], x6\n" + "st1 { v19.s }[2], [x22]\n" + "st1 { v23.s }[2], [x21]\n" + "st1 { v27.s }[2], [x20]\n" + "st1 { v31.s }[2], [x19]\n" "tbz %x[n_channels], #0, 140f\n" - "mov x23, x8\n" - "mov x22, x10\n" - "st1 { v16.h }[6], [x23], x5\n" - "mov x21, x27\n" - "mov x20, x24\n" - "st1 { v20.h }[6], [x22], x5\n" - "st1 { v24.h }[6], [x21], x5\n" - "st1 { v28.h }[6], [x20], x5\n" - "st1 { v17.h }[6], [x23], x5\n" - "st1 { v21.h }[6], [x22], x5\n" - "st1 { v25.h }[6], [x21], x5\n" - "st1 { v29.h }[6], [x20], x5\n" - "st1 { v18.h }[6], [x23], x5\n" - "st1 { v22.h }[6], [x22], x5\n" - "st1 { v26.h }[6], [x21], x5\n" - "st1 { v30.h }[6], [x20], x5\n" - "st1 { v19.h }[6], [x23]\n" - "st1 { v23.h }[6], [x22]\n" - "st1 { v27.h }[6], [x21]\n" - "st1 { v31.h }[6], [x20]\n" + "mov x22, x17\n" + "mov x21, x9\n" + "mov x20, x26\n" + "mov x19, x23\n" + "st1 { v16.h }[6], [x22], x6\n" + "st1 { v20.h }[6], [x21], x6\n" + "st1 { v24.h }[6], [x20], x6\n" + "st1 { v28.h }[6], [x19], x6\n" + "st1 { v17.h }[6], [x22], x6\n" + "st1 { v21.h }[6], [x21], x6\n" + "st1 { v25.h }[6], [x20], x6\n" + "st1 { v29.h }[6], [x19], x6\n" + "st1 { v18.h }[6], [x22], x6\n" + "st1 { v22.h }[6], [x21], x6\n" + "st1 { v26.h }[6], [x20], x6\n" + "st1 { v30.h }[6], [x19], x6\n" + "st1 { v19.h }[6], [x22]\n" + "st1 { v23.h }[6], [x21]\n" + "st1 { v27.h }[6], [x20]\n" + "st1 { v31.h }[6], [x19]\n" "b 140f\n" "137:" // Tile loop: Oddments: Store: Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 140f\n" - "mov x23, x8\n" - "mov x22, x10\n" - "st1 { v16.h }[4], [x23], x5\n" - "mov x21, x27\n" - "mov x20, x24\n" - "st1 { v20.h }[4], [x22], x5\n" - "st1 { v24.h }[4], [x21], x5\n" - "st1 { v28.h }[4], [x20], x5\n" - "st1 { v17.h }[4], [x23], x5\n" - "st1 { v21.h }[4], [x22], x5\n" - "st1 { v25.h }[4], [x21], x5\n" - "st1 { v29.h }[4], [x20], x5\n" - "st1 { v18.h }[4], [x23], x5\n" - "st1 { v22.h }[4], [x22], x5\n" - "st1 { v26.h }[4], [x21], x5\n" - "st1 { v30.h }[4], [x20], x5\n" - "st1 { v19.h }[4], [x23]\n" - "st1 { v23.h }[4], [x22]\n" - "st1 { v27.h }[4], [x21]\n" - "st1 { v31.h }[4], [x20]\n" + "mov x22, x17\n" + "mov x21, x9\n" + "st1 { v16.h }[4], [x22], x6\n" + "mov x20, x26\n" + "mov x19, x23\n" + "st1 { v20.h }[4], [x21], x6\n" + "st1 { v24.h }[4], [x20], x6\n" + "st1 { v28.h }[4], [x19], x6\n" + "st1 { v17.h }[4], [x22], x6\n" + "st1 { v21.h }[4], [x21], x6\n" + "st1 { v25.h }[4], [x20], x6\n" + "st1 { v29.h }[4], [x19], x6\n" + "st1 { v18.h }[4], [x22], x6\n" + "st1 { v22.h }[4], [x21], x6\n" + "st1 { v26.h }[4], [x20], x6\n" + "st1 { v30.h }[4], [x19], x6\n" + "st1 { v19.h }[4], [x22]\n" + "st1 { v23.h }[4], [x21]\n" + "st1 { v27.h }[4], [x20]\n" + "st1 { v31.h }[4], [x19]\n" "b 140f\n" "138:" // Tile loop: Oddments: Store: Bit 2: Unset "tbz %x[n_channels], #1, 139f\n" - "mov x23, x8\n" - "mov x22, x10\n" - "st1 { v16.s }[0], [x23], x5\n" - "mov x21, x27\n" - "mov x20, x24\n" - "st1 { v20.s }[0], [x22], x5\n" - "st1 { v24.s }[0], [x21], x5\n" - "add x8, x8, #0x4\n" - "add x10, x10, #0x4\n" - "st1 { v28.s }[0], [x20], x5\n" - "add x27, x27, #0x4\n" - "add x24, x24, #0x4\n" - "st1 { v17.s }[0], [x23], x5\n" - "st1 { v21.s }[0], [x22], x5\n" - "st1 { v25.s }[0], [x21], x5\n" - "st1 { v29.s }[0], [x20], x5\n" - "st1 { v18.s }[0], [x23], x5\n" - "st1 { v22.s }[0], [x22], x5\n" - "st1 { v26.s }[0], [x21], x5\n" - "st1 { v30.s }[0], [x20], x5\n" - "st1 { v19.s }[0], [x23]\n" - "st1 { v23.s }[0], [x22]\n" - "st1 { v27.s }[0], [x21]\n" - "st1 { v31.s }[0], [x20]\n" + "mov x22, x17\n" + "mov x21, x9\n" + "st1 { v16.s }[0], [x22], x6\n" + "mov x20, x26\n" + "mov x19, x23\n" + "st1 { v20.s }[0], [x21], x6\n" + "st1 { v24.s }[0], [x20], x6\n" + "add x17, x17, #0x4\n" + "add x9, x9, #0x4\n" + "st1 { v28.s }[0], [x19], x6\n" + "add x26, x26, #0x4\n" + "add x23, x23, #0x4\n" + "st1 { v17.s }[0], [x22], x6\n" + "st1 { v21.s }[0], [x21], x6\n" + "st1 { v25.s }[0], [x20], x6\n" + "st1 { v29.s }[0], [x19], x6\n" + "st1 { v18.s }[0], [x22], x6\n" + "st1 { v22.s }[0], [x21], x6\n" + "st1 { v26.s }[0], [x20], x6\n" + "st1 { v30.s }[0], [x19], x6\n" + "st1 { v19.s }[0], [x22]\n" + "st1 { v23.s }[0], [x21]\n" + "st1 { v27.s }[0], [x20]\n" + "st1 { v31.s }[0], [x19]\n" "tbz %x[n_channels], #0, 140f\n" - "mov x23, x8\n" - "mov x22, x10\n" - "st1 { v16.h }[2], [x23], x5\n" - "mov x21, x27\n" - "mov x20, x24\n" - "st1 { v20.h }[2], [x22], x5\n" - "st1 { v24.h }[2], [x21], x5\n" - "st1 { v28.h }[2], [x20], x5\n" - "st1 { v17.h }[2], [x23], x5\n" - "st1 { v21.h }[2], [x22], x5\n" - "st1 { v25.h }[2], [x21], x5\n" - "st1 { v29.h }[2], [x20], x5\n" - "st1 { v18.h }[2], [x23], x5\n" - "st1 { v22.h }[2], [x22], x5\n" - "st1 { v26.h }[2], [x21], x5\n" - "st1 { v30.h }[2], [x20], x5\n" - "st1 { v19.h }[2], [x23]\n" - "st1 { v23.h }[2], [x22]\n" - "st1 { v27.h }[2], [x21]\n" - "st1 { v31.h }[2], [x20]\n" + "mov x22, x17\n" + "mov x21, x9\n" + "mov x20, x26\n" + "mov x19, x23\n" + "st1 { v16.h }[2], [x22], x6\n" + "st1 { v20.h }[2], [x21], x6\n" + "st1 { v24.h }[2], [x20], x6\n" + "st1 { v28.h }[2], [x19], x6\n" + "st1 { v17.h }[2], [x22], x6\n" + "st1 { v21.h }[2], [x21], x6\n" + "st1 { v25.h }[2], [x20], x6\n" + "st1 { v29.h }[2], [x19], x6\n" + "st1 { v18.h }[2], [x22], x6\n" + "st1 { v22.h }[2], [x21], x6\n" + "st1 { v26.h }[2], [x20], x6\n" + "st1 { v30.h }[2], [x19], x6\n" + "st1 { v19.h }[2], [x22]\n" + "st1 { v23.h }[2], [x21]\n" + "st1 { v27.h }[2], [x20]\n" + "st1 { v31.h }[2], [x19]\n" "b 140f\n" "139:" // Tile loop: Oddments: Store: Bit 2: Unset: Bit 1: Unset - "mov x23, x8\n" - "mov x22, x10\n" - "st1 { v16.h }[0], [x23], x5\n" - "mov x21, x27\n" - "mov x20, x24\n" - "st1 { v20.h }[0], [x22], x5\n" - "st1 { v24.h }[0], [x21], x5\n" - "st1 { v28.h }[0], [x20], x5\n" - "st1 { v17.h }[0], [x23], x5\n" - "st1 { v21.h }[0], [x22], x5\n" - "st1 { v25.h }[0], [x21], x5\n" - "st1 { v29.h }[0], [x20], x5\n" - "st1 { v18.h }[0], [x23], x5\n" - "st1 { v22.h }[0], [x22], x5\n" - "st1 { v26.h }[0], [x21], x5\n" - "st1 { v30.h }[0], [x20], x5\n" - "st1 { v19.h }[0], [x23]\n" - "st1 { v23.h }[0], [x22]\n" - "st1 { v27.h }[0], [x21]\n" - "st1 { v31.h }[0], [x20]\n" + "mov x22, x17\n" + "mov x21, x9\n" + "st1 { v16.h }[0], [x22], x6\n" + "mov x20, x26\n" + "mov x19, x23\n" + "st1 { v20.h }[0], [x21], x6\n" + "st1 { v24.h }[0], [x20], x6\n" + "st1 { v28.h }[0], [x19], x6\n" + "st1 { v17.h }[0], [x22], x6\n" + "st1 { v21.h }[0], [x21], x6\n" + "st1 { v25.h }[0], [x20], x6\n" + "st1 { v29.h }[0], [x19], x6\n" + "st1 { v18.h }[0], [x22], x6\n" + "st1 { v22.h }[0], [x21], x6\n" + "st1 { v26.h }[0], [x20], x6\n" + "st1 { v30.h }[0], [x19], x6\n" + "st1 { v19.h }[0], [x22]\n" + "st1 { v23.h }[0], [x21]\n" + "st1 { v27.h }[0], [x20]\n" + "st1 { v31.h }[0], [x19]\n" "140:" // Tile loop: Oddments: Store: Bit 2: End "141:" // Tile loop: End - "ldr x26, [%x[params_struct], %[offsetof_args_tile_j]]\n" - "ldr x27, [%x[params_struct], %[offsetof_args_tile_i]]\n" - "add x26, x26, #0x1\n" - "add x21, x27, #0x1\n" - "ldr x20, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n" - "cmp x26, x20\n" - "ldr x20, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n" - "csel x27, x27, x21, LT\n" - "csel x26, x26, XZR, LT\n" - "cmp x27, x20\n" + "ldr x25, [%x[params_struct], %[offsetof_args_tile_j]]\n" + "ldr x26, [%x[params_struct], %[offsetof_args_tile_i]]\n" + "add x25, x25, #0x1\n" + "add x20, x26, #0x1\n" + "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n" + "cmp x25, x19\n" + "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n" + "csel x26, x26, x20, LT\n" + "csel x25, x25, XZR, LT\n" + "cmp x26, x19\n" "blt 1b\n" : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_args_inptr] "I" (offsetof(Args, inptr)), [offsetof_args_ld_input_col] "I" (offsetof(Args, ld_input_col)), [offsetof_args_ld_input_row] "I" (offsetof(Args, ld_input_row)), [offsetof_args_ld_output_col] "I" (offsetof(Args, ld_output_col)), [offsetof_args_ld_output_row] "I" (offsetof(Args, ld_output_row)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_n_tile_cols] "I" (offsetof(Args, n_tile_cols)), [offsetof_args_n_tile_rows] "I" (offsetof(Args, n_tile_rows)), [offsetof_args_outptr] "I" (offsetof(Args, outptr)), [offsetof_args_params] "I" (offsetof(Args, params)), [offsetof_args_tile_i] "I" (offsetof(Args, tile_i)), [offsetof_args_tile_j] "I" (offsetof(Args, tile_j)), [params_struct] "r" (¶ms_struct) - : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" + : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" ); } diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_indirect.cpp index 16326150fd..e493104c03 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_indirect.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, 2023 Arm Limited. + * Copyright (c) 2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -98,210 +98,211 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_indirect_impl( activation_min, activation_max); __asm__ __volatile__( - "mov x8, #0x10\n" // cntb _, ALL, #1 - "lsr x17, %x[n_channels], #0x3\n" - "ldr x16, [%x[params_struct], %[offsetof_args_outptrs]]\n" - "ldr x15, [%x[params_struct], %[offsetof_args_params]]\n" + "mov x17, #0x10\n" // cntb _, ALL, #1 + "lsr x16, %x[n_channels], #0x3\n" + "ldr x15, [%x[params_struct], %[offsetof_args_outptrs]]\n" + "ldr x14, [%x[params_struct], %[offsetof_args_params]]\n" "add x20, %x[params_struct], %[offsetof_args_min]\n" + "add x19, %x[params_struct], %[offsetof_args_max]\n" "ld1r { v15.8h }, [x20]\n" - "add x20, %x[params_struct], %[offsetof_args_max]\n" - "ld1r { v14.8h }, [x20]\n" - "add x14, %x[params_struct], %[offsetof_Args_inptrs]\n" - "mov x13, #0x0\n" - "sub x12, XZR, x8\n" - "cbz x17, 3f\n" - "ldr q13, [x15, #0x0]\n" - "ldr q0, [x15, #0x10]\n" - "cmp x8, x17, LSL #4\n" - "ldr q1, [x15, #0x20]\n" - "ldr q2, [x15, #0x30]\n" - "ldr q3, [x15, #0x40]\n" - "ldr q4, [x15, #0x50]\n" - "ldr q5, [x15, #0x60]\n" - "ldr q6, [x15, #0x70]\n" - "ldr q7, [x15, #0x80]\n" - "ldr q8, [x15, #0x90]\n" - "add x15, x15, #0xa0\n" - "ldp x11, x10, [x14, #0x0]\n" - "ldr q9, [x11, x13]\n" - "ldr q10, [x10, x13]\n" - "ldp x9, x28, [x14, #0x10]\n" - "ldr q11, [x9, x13]\n" - "ldr q12, [x28, x13]\n" + "ld1r { v14.8h }, [x19]\n" + "add x13, %x[params_struct], %[offsetof_Args_inptrs]\n" + "mov x12, #0x0\n" + "sub x11, XZR, x17\n" + "cbz x16, 3f\n" + "ldp x10, x9, [x13, #0x0]\n" + "ldp x28, x27, [x13, #0x10]\n" + "cmp x17, x16, LSL #4\n" + "ldr q13, [x14, #0x0]\n" + "ldr q0, [x14, #0x10]\n" + "ldr q1, [x14, #0x20]\n" + "ldr q2, [x14, #0x30]\n" + "ldr q3, [x14, #0x40]\n" + "ldr q4, [x14, #0x50]\n" + "ldr q5, [x14, #0x60]\n" + "ldr q6, [x14, #0x70]\n" + "ldr q7, [x14, #0x80]\n" + "ldr q8, [x14, #0x90]\n" + "add x14, x14, #0xa0\n" + "ldr q9, [x10, x12]\n" + "ldr q10, [x9, x12]\n" + "ldr q11, [x28, x12]\n" + "ldr q12, [x27, x12]\n" "bge 2f\n" "1:" // Channel loop "mov v21.16b, v13.16b\n fmla v21.8h, v4.8h, v9.8h\n" "mov v16.16b, v13.16b\n fmla v16.8h, v8.8h, v9.8h\n" - "ldr x27, [x14, #0x20]\n" - "ldr x26, [x14, #0x30]\n" + "ldr x26, [x13, #0x20]\n" + "ldr x25, [x13, #0x30]\n" "mov v22.16b, v13.16b\n fmla v22.8h, v3.8h, v9.8h\n" "mov v25.16b, v13.16b\n fmla v25.8h, v1.8h, v9.8h\n" - "ldr x25, [x14, #0x28]\n" - "ldr x24, [x14, #0x38]\n" + "ldr x24, [x13, #0x28]\n" + "ldr x23, [x13, #0x38]\n" "mov v26.16b, v13.16b\n fmla v26.8h, v0.8h, v9.8h\n" "mov v17.16b, v13.16b\n fmla v17.8h, v7.8h, v9.8h\n" - "ldr x11, [x14, #0x40]\n" - "ldr x10, [x14, #0x48]\n" + "ldr x10, [x13, #0x40]\n" + "ldr x9, [x13, #0x48]\n" "mov v18.16b, v13.16b\n fmla v18.8h, v6.8h, v9.8h\n" "fmla v21.8h, v5.8h, v12.8h\n" - "ldr x9, [x14, #0x50]\n" - "ldr x28, [x14, #0x58]\n" + "ldr x28, [x13, #0x50]\n" + "ldr x27, [x13, #0x58]\n" "mov v20.16b, v13.16b\n fmla v20.8h, v5.8h, v9.8h\n" "mov v24.16b, v13.16b\n fmla v24.8h, v2.8h, v9.8h\n" - "ldr q9, [x26, x13]\n" - "ldr x26, [x14, #0x70]\n" + "ldr q9, [x25, x12]\n" + "ldr x25, [x13, #0x70]\n" "fmla v16.8h, v0.8h, v10.8h\n" - "ldr q10, [x27, x13]\n" "mov v19.16b, v13.16b\n fmla v19.8h, v2.8h, v11.8h\n" - "ldr q11, [x25, x13]\n" + "ldr q10, [x26, x12]\n" + "ldr q11, [x24, x12]\n" "fmla v22.8h, v4.8h, v12.8h\n" "fmla v25.8h, v2.8h, v12.8h\n" - "ldr x27, [x14, #0x60]\n" - "ldr x25, [x14, #0x68]\n" + "ldr x26, [x13, #0x60]\n" + "ldr x24, [x13, #0x68]\n" "fmla v26.8h, v1.8h, v12.8h\n" "fmla v17.8h, v8.8h, v12.8h\n" - "ldr x23, [x16, #0x0]\n" - "ldr x22, [x16, #0x8]\n" + "ldr x22, [x15, #0x0]\n" + "ldr x21, [x15, #0x8]\n" "fmla v18.8h, v7.8h, v12.8h\n" "mov v28.16b, v13.16b\n fmla v28.8h, v6.8h, v10.8h\n" - "ldr q10, [x10, x13]\n" - "ldr x10, [x14, #0x88]\n" + "ldr q10, [x9, x12]\n" + "ldr x9, [x13, #0x88]\n" "fmla v21.8h, v7.8h, v9.8h\n" "fmla v19.8h, v6.8h, v12.8h\n" - "ldr x21, [x16, #0x10]\n" - "ldr x20, [x16, #0x18]\n" + "ldr x20, [x15, #0x10]\n" + "ldr x19, [x15, #0x18]\n" "mov v23.16b, v13.16b\n fmla v23.8h, v3.8h, v12.8h\n" "mov v27.16b, v13.16b\n fmla v27.8h, v0.8h, v12.8h\n" - "ldr q12, [x24, x13]\n" - "ldr x24, [x14, #0x78]\n" + "ldr q12, [x23, x12]\n" + "ldr x23, [x13, #0x78]\n" "mov v31.16b, v13.16b\n fmla v31.8h, v8.8h, v11.8h\n" - "ldr q11, [x11, x13]\n" "fmla v22.8h, v6.8h, v9.8h\n" - "ldr x11, [x14, #0x80]\n" + "ldr q11, [x10, x12]\n" + "ldr x10, [x13, #0x80]\n" "fmla v25.8h, v4.8h, v9.8h\n" "fmla v26.8h, v3.8h, v9.8h\n" - "add x12, x12, #0x10\n" + "add x11, x11, #0x10\n" + "mov v29.16b, v13.16b\n fmla v29.8h, v1.8h, v9.8h\n" + "mov v30.16b, v13.16b\n fmla v30.8h, v0.8h, v9.8h\n" + "ldr q13, [x14, #0x0]\n" "fmla v20.8h, v8.8h, v9.8h\n" "fmla v24.8h, v5.8h, v9.8h\n" "fmla v28.8h, v2.8h, v9.8h\n" "fmla v16.8h, v1.8h, v12.8h\n" + "ldr q9, [x28, x12]\n" + "ldr x28, [x13, #0x90]\n" "fmla v17.8h, v0.8h, v12.8h\n" - "ldr q12, [x28, x13]\n" "fmla v18.8h, v2.8h, v11.8h\n" - "ldr x28, [x14, #0x98]\n" + "ldr q12, [x27, x12]\n" + "ldr x27, [x13, #0x98]\n" "fmla v21.8h, v8.8h, v10.8h\n" "fmla v19.8h, v1.8h, v11.8h\n" - "ldr q11, [x27, x13]\n" - "ldr x27, [x14, #0xa0]\n" + "ldr q11, [x26, x12]\n" + "ldr x26, [x13, #0xa0]\n" "fmla v22.8h, v7.8h, v10.8h\n" "fmla v23.8h, v6.8h, v10.8h\n" "fmla v25.8h, v5.8h, v10.8h\n" "fmla v26.8h, v4.8h, v10.8h\n" "fmla v27.8h, v3.8h, v10.8h\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "fmla v24.8h, v6.8h, v11.8h\n" - "fmla v28.8h, v3.8h, v11.8h\n" - "ldr q11, [x26, x13]\n" - "ldr x26, [x14, #0xb0]\n" - "fmla v19.8h, v5.8h, v12.8h\n" - "fmla v23.8h, v2.8h, v12.8h\n" - "ldr q12, [x24, x13]\n" - "ldr x24, [x14, #0xb8]\n" - "fmla v27.8h, v8.8h, v11.8h\n" - "fmla v31.8h, v5.8h, v11.8h\n" - "mov v29.16b, v13.16b\n fmla v29.8h, v1.8h, v9.8h\n" - "mov v30.16b, v13.16b\n fmla v30.8h, v0.8h, v9.8h\n" - "ldr q9, [x9, x13]\n" - "ldr x9, [x14, #0x90]\n" "fmla v29.8h, v2.8h, v10.8h\n" "fmla v30.8h, v1.8h, v10.8h\n" - "ldr q10, [x25, x13]\n" - "ldr x25, [x14, #0xa8]\n" + "fmla v31.8h, v0.8h, v10.8h\n" + "ldr q10, [x24, x12]\n" + "ldr x24, [x13, #0xa8]\n" "fmla v16.8h, v3.8h, v9.8h\n" "fmla v20.8h, v0.8h, v9.8h\n" - "ldr q11, [x11, x13]\n" - "ldr x11, [x14, #0xc0]\n" + "fmla v24.8h, v6.8h, v11.8h\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "ldr q11, [x25, x12]\n" + "ldr x25, [x13, #0xb0]\n" "fmla v17.8h, v4.8h, v10.8h\n" "fmla v18.8h, v3.8h, v10.8h\n" "fmla v21.8h, v1.8h, v10.8h\n" + "fmla v19.8h, v5.8h, v12.8h\n" + "fmla v23.8h, v2.8h, v12.8h\n" "fmla v22.8h, v0.8h, v10.8h\n" + "ldr q12, [x23, x12]\n" + "ldr x23, [x13, #0xb8]\n" + "fmla v27.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v5.8h, v11.8h\n" + "ldr q11, [x10, x12]\n" + "ldr x10, [x13, #0xc0]\n" "fmla v16.8h, v5.8h, v10.8h\n" "fmla v20.8h, v2.8h, v10.8h\n" - "ldr q10, [x10, x13]\n" - "ldr x10, [x14, #0xc8]\n" + "ldr q10, [x9, x12]\n" + "ldr x9, [x13, #0xc8]\n" "fmla v17.8h, v5.8h, v12.8h\n" "fmla v18.8h, v4.8h, v12.8h\n" "fmla v21.8h, v2.8h, v12.8h\n" "fmla v19.8h, v3.8h, v12.8h\n" "fmla v22.8h, v1.8h, v12.8h\n" "fmla v23.8h, v0.8h, v12.8h\n" - "ldr q12, [x28, x13]\n" - "ldr x28, [x14, #0xd8]\n" + "ldr q12, [x27, x12]\n" + "ldr x27, [x13, #0xd8]\n" "fmla v28.8h, v7.8h, v11.8h\n" "fmla v29.8h, v6.8h, v11.8h\n" - "ldr q11, [x9, x13]\n" - "ldr x9, [x14, #0xd0]\n" + "ldr q11, [x28, x12]\n" + "ldr x28, [x13, #0xd0]\n" "fmla v16.8h, v7.8h, v10.8h\n" "fmla v17.8h, v6.8h, v10.8h\n" "fmla v20.8h, v4.8h, v10.8h\n" "fmla v21.8h, v3.8h, v10.8h\n" "fmla v24.8h, v1.8h, v10.8h\n" "fmla v25.8h, v0.8h, v10.8h\n" - "ldr q10, [x27, x13]\n" - "ldr x27, [x14, #0xe0]\n" + "ldr q10, [x26, x12]\n" + "ldr x26, [x13, #0xe0]\n" "fmla v18.8h, v8.8h, v12.8h\n" "fmla v30.8h, v8.8h, v11.8h\n" "fmla v31.8h, v7.8h, v11.8h\n" - "ldr q11, [x25, x13]\n" + "ldr q11, [x24, x12]\n" "fmla v27.8h, v1.8h, v12.8h\n" - "ldr x25, [x14, #0xe8]\n" + "ldr x24, [x13, #0xe8]\n" "fmla v19.8h, v7.8h, v12.8h\n" "fmla v22.8h, v5.8h, v12.8h\n" "fmla v23.8h, v4.8h, v12.8h\n" "fmla v26.8h, v2.8h, v12.8h\n" - "ldr q12, [x26, x13]\n" - "ldr x26, [x14, #0xf0]\n" + "ldr q12, [x25, x12]\n" + "ldr x25, [x13, #0xf0]\n" "fmla v16.8h, v2.8h, v10.8h\n" "fmla v17.8h, v1.8h, v10.8h\n" "fmla v18.8h, v0.8h, v10.8h\n" - "ldr q10, [x24, x13]\n" "fmla v20.8h, v7.8h, v11.8h\n" - "ldr x24, [x14, #0xf8]\n" + "ldr q10, [x23, x12]\n" + "ldr x23, [x13, #0xf8]\n" "fmla v21.8h, v6.8h, v11.8h\n" "fmla v24.8h, v4.8h, v11.8h\n" "fmla v25.8h, v3.8h, v11.8h\n" "fmla v28.8h, v1.8h, v11.8h\n" "fmla v29.8h, v0.8h, v11.8h\n" - "ldr q11, [x11, x13]\n" + "ldr q11, [x10, x12]\n" "fmla v27.8h, v4.8h, v11.8h\n" - "ldr x11, [x14, #0x100]\n" + "ldr x10, [x13, #0x100]\n" "fmla v30.8h, v2.8h, v11.8h\n" "fmla v17.8h, v2.8h, v12.8h\n" "fmla v18.8h, v1.8h, v12.8h\n" "fmla v19.8h, v0.8h, v12.8h\n" - "ldr q12, [x10, x13]\n" - "ldr x10, [x14, #0x108]\n" + "ldr q12, [x9, x12]\n" + "ldr x9, [x13, #0x108]\n" "fmla v16.8h, v6.8h, v10.8h\n" "fmla v20.8h, v3.8h, v10.8h\n" "fmla v24.8h, v0.8h, v10.8h\n" - "ldr q10, [x9, x13]\n" "fmla v22.8h, v8.8h, v11.8h\n" - "ldr x9, [x14, #0x110]\n" + "ldr q10, [x28, x12]\n" + "ldr x28, [x13, #0x110]\n" "fmla v23.8h, v7.8h, v11.8h\n" "fmla v26.8h, v5.8h, v11.8h\n" "fmla v31.8h, v1.8h, v11.8h\n" - "ldr q11, [x28, x13]\n" + "ldr q11, [x27, x12]\n" "fmla v27.8h, v2.8h, v12.8h\n" - "ldr x28, [x14, #0x118]\n" + "ldr x27, [x13, #0x118]\n" "fmla v28.8h, v0.8h, v10.8h\n" "fmla v29.8h, v4.8h, v11.8h\n" "fmla v30.8h, v3.8h, v11.8h\n" "fmla v19.8h, v8.8h, v12.8h\n" "fmla v23.8h, v5.8h, v12.8h\n" - "ldr q12, [x27, x13]\n" "fmla v20.8h, v6.8h, v10.8h\n" + "ldr q12, [x26, x12]\n" "fmla v24.8h, v3.8h, v10.8h\n" - "ldr q10, [x25, x13]\n" + "ldr q10, [x24, x12]\n" "fmla v25.8h, v7.8h, v11.8h\n" "fmla v26.8h, v6.8h, v11.8h\n" "fmla v28.8h, v5.8h, v11.8h\n" @@ -310,293 +311,292 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_indirect_impl( "fmla v29.8h, v7.8h, v10.8h\n" "fmla v30.8h, v6.8h, v10.8h\n" "fmla v24.8h, v8.8h, v11.8h\n" - "ldr q11, [x26, x13]\n" + "ldr q11, [x25, x12]\n" "fmla v28.8h, v8.8h, v10.8h\n" - "ldr q10, [x11, x13]\n" + "ldr q10, [x10, x12]\n" "fmla v25.8h, v8.8h, v11.8h\n" "fmla v26.8h, v7.8h, v11.8h\n" "fmla v27.8h, v6.8h, v11.8h\n" "fmla v29.8h, v5.8h, v11.8h\n" "fmla v30.8h, v4.8h, v11.8h\n" "fmla v31.8h, v3.8h, v11.8h\n" - "ldr q11, [x10, x13]\n" - "ldp x11, x10, [x14, #0x0]\n" + "ldr q11, [x9, x12]\n" + "ldp x10, x9, [x13, #0x0]\n" "fmla v23.8h, v8.8h, v12.8h\n" - "ldr q12, [x24, x13]\n" + "ldr q12, [x23, x12]\n" "fmla v16.8h, v4.8h, v10.8h\n" "fmax v16.8h, v16.8h, v15.8h\n" "fmla v17.8h, v3.8h, v10.8h\n" "fmla v18.8h, v5.8h, v11.8h\n" "fmax v17.8h, v17.8h, v15.8h\n" + "ldr q9, [x10, x17]\n" "fmla v19.8h, v4.8h, v11.8h\n" "fmla v29.8h, v8.8h, v12.8h\n" "fmax v18.8h, v18.8h, v15.8h\n" "fmla v30.8h, v7.8h, v12.8h\n" "fmla v31.8h, v6.8h, v12.8h\n" - "ldr q12, [x9, x13]\n" + "ldr q12, [x28, x12]\n" "fmax v19.8h, v19.8h, v15.8h\n" "fmla v20.8h, v1.8h, v10.8h\n" "fmla v21.8h, v0.8h, v10.8h\n" - "ldr q10, [x28, x13]\n" - "ldr q9, [x11, x8]\n" + "ldr q10, [x27, x12]\n" + "fmin v16.8h, v16.8h, v14.8h\n" "fmla v22.8h, v2.8h, v11.8h\n" - "ldr q13, [x15, #0x0]\n" "fmla v23.8h, v1.8h, v11.8h\n" - "ldr q0, [x15, #0x10]\n" - "ldr q1, [x15, #0x20]\n" + "fmin v17.8h, v17.8h, v14.8h\n" + "str q16, [x22, x11]\n" "fmla v24.8h, v7.8h, v12.8h\n" "fmla v25.8h, v6.8h, v12.8h\n" - "ldr q2, [x15, #0x30]\n" + "fmin v18.8h, v18.8h, v14.8h\n" + "str q17, [x21, x11]\n" "fmla v26.8h, v8.8h, v10.8h\n" - "ldr q6, [x15, #0x70]\n" "fmla v27.8h, v7.8h, v10.8h\n" - "ldr q7, [x15, #0x80]\n" - "fmin v16.8h, v16.8h, v14.8h\n" - "fmin v17.8h, v17.8h, v14.8h\n" - "str q16, [x23, x12]\n" - "ldr q8, [x15, #0x90]\n" - "fmin v18.8h, v18.8h, v14.8h\n" "fmin v19.8h, v19.8h, v14.8h\n" - "str q17, [x22, x12]\n" - "ldr x23, [x16, #0x20]\n" + "str q18, [x20, x11]\n" "fmax v20.8h, v20.8h, v15.8h\n" "fmax v21.8h, v21.8h, v15.8h\n" - "str q18, [x21, x12]\n" - "ldr x22, [x16, #0x28]\n" + "str q19, [x19, x11]\n" + "ldr x22, [x15, #0x20]\n" "fmax v22.8h, v22.8h, v15.8h\n" "fmax v23.8h, v23.8h, v15.8h\n" - "str q19, [x20, x12]\n" - "ldr x21, [x16, #0x30]\n" - "ldr x20, [x16, #0x38]\n" + "ldr x21, [x15, #0x28]\n" + "ldr x20, [x15, #0x30]\n" + "ldr x19, [x15, #0x38]\n" "fmla v28.8h, v4.8h, v12.8h\n" "fmla v29.8h, v3.8h, v12.8h\n" - "ldr q3, [x15, #0x40]\n" + "fmin v20.8h, v20.8h, v14.8h\n" "fmla v30.8h, v5.8h, v10.8h\n" - "ldr q5, [x15, #0x60]\n" "fmla v31.8h, v4.8h, v10.8h\n" - "ldr q10, [x10, x8]\n" - "ldr q4, [x15, #0x50]\n" - "fmin v20.8h, v20.8h, v14.8h\n" "fmin v21.8h, v21.8h, v14.8h\n" - "str q20, [x23, x12]\n" + "str q20, [x22, x11]\n" "fmin v22.8h, v22.8h, v14.8h\n" "fmin v23.8h, v23.8h, v14.8h\n" - "str q21, [x22, x12]\n" - "ldr x23, [x16, #0x40]\n" + "str q21, [x21, x11]\n" + "ldr x22, [x15, #0x40]\n" "fmax v24.8h, v24.8h, v15.8h\n" "fmax v25.8h, v25.8h, v15.8h\n" - "str q22, [x21, x12]\n" - "ldr x22, [x16, #0x48]\n" + "str q22, [x20, x11]\n" + "ldr x21, [x15, #0x48]\n" "fmax v26.8h, v26.8h, v15.8h\n" "fmax v27.8h, v27.8h, v15.8h\n" - "str q23, [x20, x12]\n" - "ldr x21, [x16, #0x50]\n" - "ldr x20, [x16, #0x58]\n" - "ldp x9, x28, [x14, #0x10]\n" + "str q23, [x19, x11]\n" + "ldr x20, [x15, #0x50]\n" + "ldr x19, [x15, #0x58]\n" + "ldp x28, x27, [x13, #0x10]\n" "fmin v24.8h, v24.8h, v14.8h\n" "fmin v25.8h, v25.8h, v14.8h\n" - "ldr q11, [x9, x8]\n" - "ldr q12, [x28, x8]\n" "fmin v26.8h, v26.8h, v14.8h\n" "fmin v27.8h, v27.8h, v14.8h\n" + "str q24, [x22, x11]\n" + "ldr x22, [x15, #0x60]\n" "fmax v28.8h, v28.8h, v15.8h\n" "fmax v29.8h, v29.8h, v15.8h\n" - "str q24, [x23, x12]\n" - "ldr x23, [x16, #0x60]\n" + "str q25, [x21, x11]\n" + "ldr x21, [x15, #0x68]\n" "fmax v30.8h, v30.8h, v15.8h\n" "fmax v31.8h, v31.8h, v15.8h\n" - "str q25, [x22, x12]\n" - "ldr x22, [x16, #0x68]\n" - "str q26, [x21, x12]\n" - "ldr x21, [x16, #0x70]\n" - "add x8, x8, #0x10\n" - "cmp x8, x17, LSL #4\n" - "str q27, [x20, x12]\n" - "ldr x20, [x16, #0x78]\n" + "str q26, [x20, x11]\n" + "ldr x20, [x15, #0x70]\n" + "str q27, [x19, x11]\n" + "ldr x19, [x15, #0x78]\n" + "ldr q10, [x9, x17]\n" "fmin v28.8h, v28.8h, v14.8h\n" + "ldr q11, [x28, x17]\n" + "ldr q12, [x27, x17]\n" + "add x17, x17, #0x10\n" + "cmp x17, x16, LSL #4\n" "fmin v29.8h, v29.8h, v14.8h\n" "fmin v30.8h, v30.8h, v14.8h\n" + "add x12, x12, #0x10\n" + "str q28, [x22, x11]\n" "fmin v31.8h, v31.8h, v14.8h\n" - "add x13, x13, #0x10\n" - "str q28, [x23, x12]\n" - "str q29, [x22, x12]\n" - "add x15, x15, #0xa0\n" - "str q30, [x21, x12]\n" - "str q31, [x20, x12]\n" + "str q29, [x21, x11]\n" + "ldr q0, [x14, #0x10]\n" + "ldr q1, [x14, #0x20]\n" + "str q30, [x20, x11]\n" + "ldr q2, [x14, #0x30]\n" + "ldr q3, [x14, #0x40]\n" + "str q31, [x19, x11]\n" + "ldr q4, [x14, #0x50]\n" + "ldr q5, [x14, #0x60]\n" + "ldr q6, [x14, #0x70]\n" + "ldr q7, [x14, #0x80]\n" + "ldr q8, [x14, #0x90]\n" + "add x14, x14, #0xa0\n" "blt 1b\n" "2:" // Channel tail "mov v21.16b, v13.16b\n fmla v21.8h, v4.8h, v9.8h\n" "mov v16.16b, v13.16b\n fmla v16.8h, v8.8h, v9.8h\n" - "ldr x27, [x14, #0x20]\n" - "ldr x26, [x14, #0x30]\n" + "ldr x26, [x13, #0x20]\n" + "ldr x25, [x13, #0x30]\n" "mov v22.16b, v13.16b\n fmla v22.8h, v3.8h, v9.8h\n" "mov v25.16b, v13.16b\n fmla v25.8h, v1.8h, v9.8h\n" - "ldr x25, [x14, #0x28]\n" - "ldr x24, [x14, #0x38]\n" + "ldr x24, [x13, #0x28]\n" + "ldr x23, [x13, #0x38]\n" "mov v26.16b, v13.16b\n fmla v26.8h, v0.8h, v9.8h\n" "mov v17.16b, v13.16b\n fmla v17.8h, v7.8h, v9.8h\n" - "ldr x11, [x14, #0x40]\n" - "ldr x10, [x14, #0x48]\n" + "ldr x10, [x13, #0x40]\n" + "ldr x9, [x13, #0x48]\n" "mov v18.16b, v13.16b\n fmla v18.8h, v6.8h, v9.8h\n" "fmla v21.8h, v5.8h, v12.8h\n" - "ldr x9, [x14, #0x50]\n" - "ldr x28, [x14, #0x58]\n" + "ldr x28, [x13, #0x50]\n" + "ldr x27, [x13, #0x58]\n" "mov v20.16b, v13.16b\n fmla v20.8h, v5.8h, v9.8h\n" "mov v24.16b, v13.16b\n fmla v24.8h, v2.8h, v9.8h\n" - "ldr q9, [x26, x13]\n" - "ldr x26, [x14, #0x70]\n" + "ldr q9, [x25, x12]\n" + "ldr x25, [x13, #0x70]\n" "fmla v16.8h, v0.8h, v10.8h\n" - "ldr q10, [x27, x13]\n" "mov v19.16b, v13.16b\n fmla v19.8h, v2.8h, v11.8h\n" - "ldr q11, [x25, x13]\n" + "ldr q10, [x26, x12]\n" + "ldr q11, [x24, x12]\n" "fmla v22.8h, v4.8h, v12.8h\n" "fmla v25.8h, v2.8h, v12.8h\n" - "ldr x27, [x14, #0x60]\n" - "ldr x25, [x14, #0x68]\n" + "ldr x26, [x13, #0x60]\n" + "ldr x24, [x13, #0x68]\n" "fmla v26.8h, v1.8h, v12.8h\n" "fmla v17.8h, v8.8h, v12.8h\n" - "ldr x23, [x16, #0x0]\n" - "ldr x22, [x16, #0x8]\n" + "ldr x22, [x15, #0x0]\n" + "ldr x21, [x15, #0x8]\n" "fmla v18.8h, v7.8h, v12.8h\n" "mov v28.16b, v13.16b\n fmla v28.8h, v6.8h, v10.8h\n" - "ldr q10, [x10, x13]\n" - "ldr x10, [x14, #0x88]\n" + "ldr q10, [x9, x12]\n" + "ldr x9, [x13, #0x88]\n" "fmla v21.8h, v7.8h, v9.8h\n" "fmla v19.8h, v6.8h, v12.8h\n" - "ldr x21, [x16, #0x10]\n" - "ldr x20, [x16, #0x18]\n" + "ldr x20, [x15, #0x10]\n" + "ldr x19, [x15, #0x18]\n" "mov v23.16b, v13.16b\n fmla v23.8h, v3.8h, v12.8h\n" "mov v27.16b, v13.16b\n fmla v27.8h, v0.8h, v12.8h\n" - "ldr q12, [x24, x13]\n" - "ldr x24, [x14, #0x78]\n" + "ldr q12, [x23, x12]\n" + "ldr x23, [x13, #0x78]\n" "mov v31.16b, v13.16b\n fmla v31.8h, v8.8h, v11.8h\n" - "ldr q11, [x11, x13]\n" "fmla v22.8h, v6.8h, v9.8h\n" - "ldr x11, [x14, #0x80]\n" + "ldr q11, [x10, x12]\n" + "ldr x10, [x13, #0x80]\n" "fmla v25.8h, v4.8h, v9.8h\n" "fmla v26.8h, v3.8h, v9.8h\n" - "add x12, x12, #0x10\n" + "add x11, x11, #0x10\n" + "mov v29.16b, v13.16b\n fmla v29.8h, v1.8h, v9.8h\n" + "mov v30.16b, v13.16b\n fmla v30.8h, v0.8h, v9.8h\n" "fmla v20.8h, v8.8h, v9.8h\n" "fmla v24.8h, v5.8h, v9.8h\n" "fmla v28.8h, v2.8h, v9.8h\n" "fmla v16.8h, v1.8h, v12.8h\n" + "ldr q9, [x28, x12]\n" + "ldr x28, [x13, #0x90]\n" "fmla v17.8h, v0.8h, v12.8h\n" - "ldr q12, [x28, x13]\n" "fmla v18.8h, v2.8h, v11.8h\n" - "ldr x28, [x14, #0x98]\n" + "ldr q12, [x27, x12]\n" + "ldr x27, [x13, #0x98]\n" "fmla v21.8h, v8.8h, v10.8h\n" "fmla v19.8h, v1.8h, v11.8h\n" - "ldr q11, [x27, x13]\n" - "ldr x27, [x14, #0xa0]\n" + "ldr q11, [x26, x12]\n" + "ldr x26, [x13, #0xa0]\n" "fmla v22.8h, v7.8h, v10.8h\n" "fmla v23.8h, v6.8h, v10.8h\n" "fmla v25.8h, v5.8h, v10.8h\n" "fmla v26.8h, v4.8h, v10.8h\n" "fmla v27.8h, v3.8h, v10.8h\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "fmla v24.8h, v6.8h, v11.8h\n" - "fmla v28.8h, v3.8h, v11.8h\n" - "ldr q11, [x26, x13]\n" - "ldr x26, [x14, #0xb0]\n" - "fmla v19.8h, v5.8h, v12.8h\n" - "fmla v23.8h, v2.8h, v12.8h\n" - "ldr q12, [x24, x13]\n" - "ldr x24, [x14, #0xb8]\n" - "fmla v27.8h, v8.8h, v11.8h\n" - "fmla v31.8h, v5.8h, v11.8h\n" - "mov v29.16b, v13.16b\n fmla v29.8h, v1.8h, v9.8h\n" - "mov v30.16b, v13.16b\n fmla v30.8h, v0.8h, v9.8h\n" - "ldr q9, [x9, x13]\n" - "ldr x9, [x14, #0x90]\n" "fmla v29.8h, v2.8h, v10.8h\n" "fmla v30.8h, v1.8h, v10.8h\n" - "ldr q10, [x25, x13]\n" - "ldr x25, [x14, #0xa8]\n" + "fmla v31.8h, v0.8h, v10.8h\n" + "ldr q10, [x24, x12]\n" + "ldr x24, [x13, #0xa8]\n" "fmla v16.8h, v3.8h, v9.8h\n" "fmla v20.8h, v0.8h, v9.8h\n" - "ldr q11, [x11, x13]\n" - "ldr x11, [x14, #0xc0]\n" + "fmla v24.8h, v6.8h, v11.8h\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "ldr q11, [x25, x12]\n" + "ldr x25, [x13, #0xb0]\n" "fmla v17.8h, v4.8h, v10.8h\n" "fmla v18.8h, v3.8h, v10.8h\n" "fmla v21.8h, v1.8h, v10.8h\n" + "fmla v19.8h, v5.8h, v12.8h\n" + "fmla v23.8h, v2.8h, v12.8h\n" "fmla v22.8h, v0.8h, v10.8h\n" + "ldr q12, [x23, x12]\n" + "ldr x23, [x13, #0xb8]\n" + "fmla v27.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v5.8h, v11.8h\n" + "ldr q11, [x10, x12]\n" + "ldr x10, [x13, #0xc0]\n" "fmla v16.8h, v5.8h, v10.8h\n" "fmla v20.8h, v2.8h, v10.8h\n" - "ldr q10, [x10, x13]\n" - "ldr x10, [x14, #0xc8]\n" + "ldr q10, [x9, x12]\n" + "ldr x9, [x13, #0xc8]\n" "fmla v17.8h, v5.8h, v12.8h\n" "fmla v18.8h, v4.8h, v12.8h\n" "fmla v21.8h, v2.8h, v12.8h\n" "fmla v19.8h, v3.8h, v12.8h\n" "fmla v22.8h, v1.8h, v12.8h\n" "fmla v23.8h, v0.8h, v12.8h\n" - "ldr q12, [x28, x13]\n" - "ldr x28, [x14, #0xd8]\n" + "ldr q12, [x27, x12]\n" + "ldr x27, [x13, #0xd8]\n" "fmla v28.8h, v7.8h, v11.8h\n" "fmla v29.8h, v6.8h, v11.8h\n" - "ldr q11, [x9, x13]\n" - "ldr x9, [x14, #0xd0]\n" + "ldr q11, [x28, x12]\n" + "ldr x28, [x13, #0xd0]\n" "fmla v16.8h, v7.8h, v10.8h\n" "fmla v17.8h, v6.8h, v10.8h\n" "fmla v20.8h, v4.8h, v10.8h\n" "fmla v21.8h, v3.8h, v10.8h\n" "fmla v24.8h, v1.8h, v10.8h\n" "fmla v25.8h, v0.8h, v10.8h\n" - "ldr q10, [x27, x13]\n" - "ldr x27, [x14, #0xe0]\n" + "ldr q10, [x26, x12]\n" + "ldr x26, [x13, #0xe0]\n" "fmla v18.8h, v8.8h, v12.8h\n" "fmla v30.8h, v8.8h, v11.8h\n" "fmla v31.8h, v7.8h, v11.8h\n" - "ldr q11, [x25, x13]\n" + "ldr q11, [x24, x12]\n" "fmla v27.8h, v1.8h, v12.8h\n" - "ldr x25, [x14, #0xe8]\n" + "ldr x24, [x13, #0xe8]\n" "fmla v19.8h, v7.8h, v12.8h\n" "fmla v22.8h, v5.8h, v12.8h\n" "fmla v23.8h, v4.8h, v12.8h\n" "fmla v26.8h, v2.8h, v12.8h\n" - "ldr q12, [x26, x13]\n" - "ldr x26, [x14, #0xf0]\n" + "ldr q12, [x25, x12]\n" + "ldr x25, [x13, #0xf0]\n" "fmla v16.8h, v2.8h, v10.8h\n" "fmla v17.8h, v1.8h, v10.8h\n" "fmla v18.8h, v0.8h, v10.8h\n" - "ldr q10, [x24, x13]\n" "fmla v20.8h, v7.8h, v11.8h\n" - "ldr x24, [x14, #0xf8]\n" + "ldr q10, [x23, x12]\n" + "ldr x23, [x13, #0xf8]\n" "fmla v21.8h, v6.8h, v11.8h\n" "fmla v24.8h, v4.8h, v11.8h\n" "fmla v25.8h, v3.8h, v11.8h\n" "fmla v28.8h, v1.8h, v11.8h\n" "fmla v29.8h, v0.8h, v11.8h\n" - "ldr q11, [x11, x13]\n" + "ldr q11, [x10, x12]\n" "fmla v27.8h, v4.8h, v11.8h\n" - "ldr x11, [x14, #0x100]\n" + "ldr x10, [x13, #0x100]\n" "fmla v30.8h, v2.8h, v11.8h\n" "fmla v17.8h, v2.8h, v12.8h\n" "fmla v18.8h, v1.8h, v12.8h\n" "fmla v19.8h, v0.8h, v12.8h\n" - "ldr q12, [x10, x13]\n" - "ldr x10, [x14, #0x108]\n" + "ldr q12, [x9, x12]\n" + "ldr x9, [x13, #0x108]\n" "fmla v16.8h, v6.8h, v10.8h\n" "fmla v20.8h, v3.8h, v10.8h\n" "fmla v24.8h, v0.8h, v10.8h\n" - "ldr q10, [x9, x13]\n" "fmla v22.8h, v8.8h, v11.8h\n" - "ldr x9, [x14, #0x110]\n" + "ldr q10, [x28, x12]\n" + "ldr x28, [x13, #0x110]\n" "fmla v23.8h, v7.8h, v11.8h\n" "fmla v26.8h, v5.8h, v11.8h\n" "fmla v31.8h, v1.8h, v11.8h\n" - "ldr q11, [x28, x13]\n" + "ldr q11, [x27, x12]\n" "fmla v27.8h, v2.8h, v12.8h\n" - "ldr x28, [x14, #0x118]\n" + "ldr x27, [x13, #0x118]\n" "fmla v28.8h, v0.8h, v10.8h\n" "fmla v29.8h, v4.8h, v11.8h\n" "fmla v30.8h, v3.8h, v11.8h\n" "fmla v19.8h, v8.8h, v12.8h\n" "fmla v23.8h, v5.8h, v12.8h\n" - "ldr q12, [x27, x13]\n" "fmla v20.8h, v6.8h, v10.8h\n" + "ldr q12, [x26, x12]\n" "fmla v24.8h, v3.8h, v10.8h\n" - "ldr q10, [x25, x13]\n" + "ldr q10, [x24, x12]\n" "fmla v25.8h, v7.8h, v11.8h\n" "fmla v26.8h, v6.8h, v11.8h\n" "fmla v28.8h, v5.8h, v11.8h\n" @@ -605,18 +605,18 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_indirect_impl( "fmla v29.8h, v7.8h, v10.8h\n" "fmla v30.8h, v6.8h, v10.8h\n" "fmla v24.8h, v8.8h, v11.8h\n" - "ldr q11, [x26, x13]\n" + "ldr q11, [x25, x12]\n" "fmla v28.8h, v8.8h, v10.8h\n" - "ldr q10, [x11, x13]\n" + "ldr q10, [x10, x12]\n" "fmla v25.8h, v8.8h, v11.8h\n" "fmla v26.8h, v7.8h, v11.8h\n" "fmla v27.8h, v6.8h, v11.8h\n" "fmla v29.8h, v5.8h, v11.8h\n" "fmla v30.8h, v4.8h, v11.8h\n" "fmla v31.8h, v3.8h, v11.8h\n" - "ldr q11, [x10, x13]\n" + "ldr q11, [x9, x12]\n" "fmla v23.8h, v8.8h, v12.8h\n" - "ldr q12, [x24, x13]\n" + "ldr q12, [x23, x12]\n" "fmla v16.8h, v4.8h, v10.8h\n" "fmax v16.8h, v16.8h, v15.8h\n" "fmla v17.8h, v3.8h, v10.8h\n" @@ -627,145 +627,145 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_indirect_impl( "fmax v18.8h, v18.8h, v15.8h\n" "fmla v30.8h, v7.8h, v12.8h\n" "fmla v31.8h, v6.8h, v12.8h\n" - "ldr q12, [x9, x13]\n" + "ldr q12, [x28, x12]\n" "fmax v19.8h, v19.8h, v15.8h\n" "fmla v20.8h, v1.8h, v10.8h\n" "fmla v21.8h, v0.8h, v10.8h\n" - "ldr q10, [x28, x13]\n" + "ldr q10, [x27, x12]\n" "fmin v16.8h, v16.8h, v14.8h\n" "fmla v22.8h, v2.8h, v11.8h\n" "fmla v23.8h, v1.8h, v11.8h\n" "fmin v17.8h, v17.8h, v14.8h\n" - "str q16, [x23, x12]\n" + "str q16, [x22, x11]\n" "fmla v24.8h, v7.8h, v12.8h\n" "fmla v25.8h, v6.8h, v12.8h\n" "fmin v18.8h, v18.8h, v14.8h\n" - "str q17, [x22, x12]\n" + "str q17, [x21, x11]\n" "fmla v26.8h, v8.8h, v10.8h\n" "fmla v27.8h, v7.8h, v10.8h\n" "fmin v19.8h, v19.8h, v14.8h\n" - "str q18, [x21, x12]\n" + "str q18, [x20, x11]\n" "fmax v20.8h, v20.8h, v15.8h\n" "fmax v21.8h, v21.8h, v15.8h\n" - "str q19, [x20, x12]\n" - "ldr x23, [x16, #0x20]\n" + "str q19, [x19, x11]\n" + "ldr x22, [x15, #0x20]\n" "fmax v22.8h, v22.8h, v15.8h\n" "fmax v23.8h, v23.8h, v15.8h\n" - "ldr x22, [x16, #0x28]\n" - "ldr x21, [x16, #0x30]\n" - "ldr x20, [x16, #0x38]\n" + "ldr x21, [x15, #0x28]\n" + "ldr x20, [x15, #0x30]\n" + "ldr x19, [x15, #0x38]\n" "fmla v28.8h, v4.8h, v12.8h\n" "fmla v29.8h, v3.8h, v12.8h\n" "fmin v20.8h, v20.8h, v14.8h\n" "fmla v30.8h, v5.8h, v10.8h\n" "fmla v31.8h, v4.8h, v10.8h\n" "fmin v21.8h, v21.8h, v14.8h\n" - "str q20, [x23, x12]\n" + "str q20, [x22, x11]\n" "fmin v22.8h, v22.8h, v14.8h\n" "fmin v23.8h, v23.8h, v14.8h\n" - "str q21, [x22, x12]\n" - "ldr x23, [x16, #0x40]\n" + "str q21, [x21, x11]\n" + "ldr x22, [x15, #0x40]\n" "fmax v24.8h, v24.8h, v15.8h\n" "fmax v25.8h, v25.8h, v15.8h\n" - "str q22, [x21, x12]\n" - "ldr x22, [x16, #0x48]\n" + "str q22, [x20, x11]\n" + "ldr x21, [x15, #0x48]\n" "fmax v26.8h, v26.8h, v15.8h\n" "fmax v27.8h, v27.8h, v15.8h\n" - "str q23, [x20, x12]\n" - "ldr x21, [x16, #0x50]\n" - "ldr x20, [x16, #0x58]\n" + "str q23, [x19, x11]\n" + "ldr x20, [x15, #0x50]\n" + "ldr x19, [x15, #0x58]\n" "fmin v24.8h, v24.8h, v14.8h\n" "fmin v25.8h, v25.8h, v14.8h\n" - "str q24, [x23, x12]\n" + "str q24, [x22, x11]\n" "fmin v26.8h, v26.8h, v14.8h\n" "fmin v27.8h, v27.8h, v14.8h\n" - "str q25, [x22, x12]\n" - "ldr x23, [x16, #0x60]\n" + "str q25, [x21, x11]\n" + "ldr x22, [x15, #0x60]\n" "fmax v28.8h, v28.8h, v15.8h\n" "fmax v29.8h, v29.8h, v15.8h\n" - "str q26, [x21, x12]\n" - "ldr x22, [x16, #0x68]\n" + "str q26, [x20, x11]\n" + "ldr x21, [x15, #0x68]\n" "fmax v30.8h, v30.8h, v15.8h\n" "fmax v31.8h, v31.8h, v15.8h\n" - "str q27, [x20, x12]\n" - "ldr x21, [x16, #0x70]\n" - "ldr x20, [x16, #0x78]\n" + "str q27, [x19, x11]\n" + "ldr x20, [x15, #0x70]\n" + "ldr x19, [x15, #0x78]\n" "fmin v28.8h, v28.8h, v14.8h\n" "fmin v29.8h, v29.8h, v14.8h\n" - "str q28, [x23, x12]\n" + "str q28, [x22, x11]\n" "fmin v30.8h, v30.8h, v14.8h\n" "fmin v31.8h, v31.8h, v14.8h\n" - "str q29, [x22, x12]\n" - "add x13, x13, #0x10\n" - "str q30, [x21, x12]\n" - "str q31, [x20, x12]\n" + "str q29, [x21, x11]\n" + "add x12, x12, #0x10\n" + "str q30, [x20, x11]\n" + "str q31, [x19, x11]\n" "3:" // Oddments "tst %x[n_channels], #0x7\n" "beq 140f\n" - "ldr q13, [x15, #0x0]\n" - "ldr q0, [x15, #0x10]\n" - "mov x12, x13\n" - "ldr q1, [x15, #0x20]\n" - "ldr q2, [x15, #0x30]\n" - "ldr q3, [x15, #0x40]\n" - "ldr q4, [x15, #0x50]\n" - "ldr q5, [x15, #0x60]\n" - "ldr q6, [x15, #0x70]\n" - "ldr q7, [x15, #0x80]\n" - "ldr q8, [x15, #0x90]\n" - "ldr x23, [x14, #0x0]\n" - "ldr x22, [x14, #0x8]\n" - "add x23, x23, x13\n" - "add x22, x22, x13\n" - "ldr x21, [x14, #0x10]\n" - "ldr x20, [x14, #0x18]\n" - "add x21, x21, x13\n" - "add x20, x20, x13\n" + "ldr x10, [x13, #0x0]\n" + "ldr x9, [x13, #0x8]\n" + "ldr x28, [x13, #0x10]\n" + "ldr x27, [x13, #0x18]\n" + "mov x11, x12\n" + "add x10, x10, x12\n" + "ldr q13, [x14, #0x0]\n" + "ldr q0, [x14, #0x10]\n" + "add x9, x9, x12\n" + "add x28, x28, x12\n" + "ldr q1, [x14, #0x20]\n" + "ldr q2, [x14, #0x30]\n" + "add x27, x27, x12\n" + "ldr q3, [x14, #0x40]\n" + "ldr q4, [x14, #0x50]\n" + "ldr q5, [x14, #0x60]\n" + "ldr q6, [x14, #0x70]\n" + "ldr q7, [x14, #0x80]\n" + "ldr q8, [x14, #0x90]\n" "tbz %x[n_channels], #2, 5f\n" - "ld1 { v9.d }[0], [x23], #0x8\n" - "ld1 { v10.d }[0], [x22], #0x8\n" - "ld1 { v11.d }[0], [x21], #0x8\n" - "ld1 { v12.d }[0], [x20], #0x8\n" + "ld1 { v9.d }[0], [x10], #0x8\n" + "ld1 { v10.d }[0], [x9], #0x8\n" + "ld1 { v11.d }[0], [x28], #0x8\n" + "ld1 { v12.d }[0], [x27], #0x8\n" "tbz %x[n_channels], #1, 4f\n" - "ld1 { v9.s }[2], [x23], #0x4\n" - "ld1 { v10.s }[2], [x22], #0x4\n" - "ld1 { v11.s }[2], [x21], #0x4\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v9.s }[2], [x10], #0x4\n" + "ld1 { v10.s }[2], [x9], #0x4\n" + "ld1 { v11.s }[2], [x28], #0x4\n" + "ld1 { v12.s }[2], [x27], #0x4\n" "tbz %x[n_channels], #0, 7f\n" - "ld1 { v9.h }[6], [x23], #0x2\n" - "ld1 { v10.h }[6], [x22], #0x2\n" - "ld1 { v11.h }[6], [x21], #0x2\n" - "ld1 { v12.h }[6], [x20], #0x2\n" + "ld1 { v9.h }[6], [x10], #0x2\n" + "ld1 { v10.h }[6], [x9], #0x2\n" + "ld1 { v11.h }[6], [x28], #0x2\n" + "ld1 { v12.h }[6], [x27], #0x2\n" "b 7f\n" "4:" // Oddments: Load inputs (2, 2), (0, 0), (0, 5), (2, 3): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 7f\n" - "ld1 { v9.h }[4], [x23], #0x2\n" - "ld1 { v10.h }[4], [x22], #0x2\n" - "ld1 { v11.h }[4], [x21], #0x2\n" - "ld1 { v12.h }[4], [x20], #0x2\n" + "ld1 { v9.h }[4], [x10], #0x2\n" + "ld1 { v10.h }[4], [x9], #0x2\n" + "ld1 { v11.h }[4], [x28], #0x2\n" + "ld1 { v12.h }[4], [x27], #0x2\n" "b 7f\n" "5:" // Oddments: Load inputs (2, 2), (0, 0), (0, 5), (2, 3): Bit 2: Unset "tbz %x[n_channels], #1, 6f\n" - "ld1 { v9.s }[0], [x23], #0x4\n" - "ld1 { v10.s }[0], [x22], #0x4\n" - "ld1 { v11.s }[0], [x21], #0x4\n" - "ld1 { v12.s }[0], [x20], #0x4\n" + "ld1 { v9.s }[0], [x10], #0x4\n" + "ld1 { v10.s }[0], [x9], #0x4\n" + "ld1 { v11.s }[0], [x28], #0x4\n" + "ld1 { v12.s }[0], [x27], #0x4\n" "tbz %x[n_channels], #0, 7f\n" - "ld1 { v9.h }[2], [x23], #0x2\n" - "ld1 { v10.h }[2], [x22], #0x2\n" - "ld1 { v11.h }[2], [x21], #0x2\n" - "ld1 { v12.h }[2], [x20], #0x2\n" + "ld1 { v9.h }[2], [x10], #0x2\n" + "ld1 { v10.h }[2], [x9], #0x2\n" + "ld1 { v11.h }[2], [x28], #0x2\n" + "ld1 { v12.h }[2], [x27], #0x2\n" "b 7f\n" "6:" // Oddments: Load inputs (2, 2), (0, 0), (0, 5), (2, 3): Bit 2: Unset: Bit 1: Unset - "ld1 { v9.h }[0], [x23], #0x2\n" - "ld1 { v10.h }[0], [x22], #0x2\n" - "ld1 { v11.h }[0], [x21], #0x2\n" - "ld1 { v12.h }[0], [x20], #0x2\n" + "ld1 { v9.h }[0], [x10], #0x2\n" + "ld1 { v10.h }[0], [x9], #0x2\n" + "ld1 { v11.h }[0], [x28], #0x2\n" + "ld1 { v12.h }[0], [x27], #0x2\n" "7:" // Oddments: Load inputs (2, 2), (0, 0), (0, 5), (2, 3): Bit 2: End "mov v16.16b, v13.16b\n fmla v16.8h, v8.8h, v9.8h\n" "mov v17.16b, v13.16b\n fmla v17.8h, v7.8h, v9.8h\n" - "ldr x20, [x14, #0x20]\n" - "add x20, x20, x13\n" + "ldr x26, [x13, #0x20]\n" + "add x26, x26, x12\n" "mov v18.16b, v13.16b\n fmla v18.8h, v6.8h, v9.8h\n" "mov v21.16b, v13.16b\n fmla v21.8h, v4.8h, v9.8h\n" "mov v22.16b, v13.16b\n fmla v22.8h, v3.8h, v9.8h\n" @@ -785,75 +785,75 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_indirect_impl( "fmla v26.8h, v1.8h, v12.8h\n" "mov v27.16b, v13.16b\n fmla v27.8h, v0.8h, v12.8h\n" "tbz %x[n_channels], #2, 9f\n" - "ld1 { v10.d }[0], [x20], #0x8\n" + "ld1 { v10.d }[0], [x26], #0x8\n" "tbz %x[n_channels], #1, 8f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x26], #0x4\n" "tbz %x[n_channels], #0, 11f\n" - "ld1 { v10.h }[6], [x20], #0x2\n" + "ld1 { v10.h }[6], [x26], #0x2\n" "b 11f\n" "8:" // Oddments: Load input (5, 0): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 11f\n" - "ld1 { v10.h }[4], [x20], #0x2\n" + "ld1 { v10.h }[4], [x26], #0x2\n" "b 11f\n" "9:" // Oddments: Load input (5, 0): Bit 2: Unset "tbz %x[n_channels], #1, 10f\n" - "ld1 { v10.s }[0], [x20], #0x4\n" + "ld1 { v10.s }[0], [x26], #0x4\n" "tbz %x[n_channels], #0, 11f\n" - "ld1 { v10.h }[2], [x20], #0x2\n" + "ld1 { v10.h }[2], [x26], #0x2\n" "b 11f\n" "10:" // Oddments: Load input (5, 0): Bit 2: Unset: Bit 1: Unset - "ld1 { v10.h }[0], [x20], #0x2\n" + "ld1 { v10.h }[0], [x26], #0x2\n" "11:" // Oddments: Load input (5, 0): Bit 2: End - "ldr x20, [x14, #0x28]\n" + "ldr x24, [x13, #0x28]\n" "mov v28.16b, v13.16b\n fmla v28.8h, v6.8h, v10.8h\n" - "add x20, x20, x13\n" + "add x24, x24, x12\n" "tbz %x[n_channels], #2, 13f\n" - "ld1 { v11.d }[0], [x20], #0x8\n" + "ld1 { v11.d }[0], [x24], #0x8\n" "tbz %x[n_channels], #1, 12f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x24], #0x4\n" "tbz %x[n_channels], #0, 15f\n" - "ld1 { v11.h }[6], [x20], #0x2\n" + "ld1 { v11.h }[6], [x24], #0x2\n" "b 15f\n" "12:" // Oddments: Load input (5, 5): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 15f\n" - "ld1 { v11.h }[4], [x20], #0x2\n" + "ld1 { v11.h }[4], [x24], #0x2\n" "b 15f\n" "13:" // Oddments: Load input (5, 5): Bit 2: Unset "tbz %x[n_channels], #1, 14f\n" - "ld1 { v11.s }[0], [x20], #0x4\n" + "ld1 { v11.s }[0], [x24], #0x4\n" "tbz %x[n_channels], #0, 15f\n" - "ld1 { v11.h }[2], [x20], #0x2\n" + "ld1 { v11.h }[2], [x24], #0x2\n" "b 15f\n" "14:" // Oddments: Load input (5, 5): Bit 2: Unset: Bit 1: Unset - "ld1 { v11.h }[0], [x20], #0x2\n" + "ld1 { v11.h }[0], [x24], #0x2\n" "15:" // Oddments: Load input (5, 5): Bit 2: End - "ldr x20, [x14, #0x30]\n" + "ldr x25, [x13, #0x30]\n" "mov v31.16b, v13.16b\n fmla v31.8h, v8.8h, v11.8h\n" - "add x20, x20, x13\n" + "add x25, x25, x12\n" "tbz %x[n_channels], #2, 17f\n" - "ld1 { v9.d }[0], [x20], #0x8\n" + "ld1 { v9.d }[0], [x25], #0x8\n" "tbz %x[n_channels], #1, 16f\n" - "ld1 { v9.s }[2], [x20], #0x4\n" + "ld1 { v9.s }[2], [x25], #0x4\n" "tbz %x[n_channels], #0, 19f\n" - "ld1 { v9.h }[6], [x20], #0x2\n" + "ld1 { v9.h }[6], [x25], #0x2\n" "b 19f\n" "16:" // Oddments: Load input (3, 2): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 19f\n" - "ld1 { v9.h }[4], [x20], #0x2\n" + "ld1 { v9.h }[4], [x25], #0x2\n" "b 19f\n" "17:" // Oddments: Load input (3, 2): Bit 2: Unset "tbz %x[n_channels], #1, 18f\n" - "ld1 { v9.s }[0], [x20], #0x4\n" + "ld1 { v9.s }[0], [x25], #0x4\n" "tbz %x[n_channels], #0, 19f\n" - "ld1 { v9.h }[2], [x20], #0x2\n" + "ld1 { v9.h }[2], [x25], #0x2\n" "b 19f\n" "18:" // Oddments: Load input (3, 2): Bit 2: Unset: Bit 1: Unset - "ld1 { v9.h }[0], [x20], #0x2\n" + "ld1 { v9.h }[0], [x25], #0x2\n" "19:" // Oddments: Load input (3, 2): Bit 2: End - "ldr x20, [x14, #0x38]\n" + "ldr x23, [x13, #0x38]\n" "fmla v20.8h, v8.8h, v9.8h\n" "fmla v21.8h, v7.8h, v9.8h\n" - "add x20, x20, x13\n" + "add x23, x23, x12\n" "fmla v22.8h, v6.8h, v9.8h\n" "fmla v24.8h, v5.8h, v9.8h\n" "fmla v25.8h, v4.8h, v9.8h\n" @@ -862,77 +862,77 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_indirect_impl( "mov v29.16b, v13.16b\n fmla v29.8h, v1.8h, v9.8h\n" "mov v30.16b, v13.16b\n fmla v30.8h, v0.8h, v9.8h\n" "tbz %x[n_channels], #2, 21f\n" - "ld1 { v12.d }[0], [x20], #0x8\n" + "ld1 { v12.d }[0], [x23], #0x8\n" "tbz %x[n_channels], #1, 20f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x23], #0x4\n" "tbz %x[n_channels], #0, 23f\n" - "ld1 { v12.h }[6], [x20], #0x2\n" + "ld1 { v12.h }[6], [x23], #0x2\n" "b 23f\n" "20:" // Oddments: Load input (0, 1): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 23f\n" - "ld1 { v12.h }[4], [x20], #0x2\n" + "ld1 { v12.h }[4], [x23], #0x2\n" "b 23f\n" "21:" // Oddments: Load input (0, 1): Bit 2: Unset "tbz %x[n_channels], #1, 22f\n" - "ld1 { v12.s }[0], [x20], #0x4\n" + "ld1 { v12.s }[0], [x23], #0x4\n" "tbz %x[n_channels], #0, 23f\n" - "ld1 { v12.h }[2], [x20], #0x2\n" + "ld1 { v12.h }[2], [x23], #0x2\n" "b 23f\n" "22:" // Oddments: Load input (0, 1): Bit 2: Unset: Bit 1: Unset - "ld1 { v12.h }[0], [x20], #0x2\n" + "ld1 { v12.h }[0], [x23], #0x2\n" "23:" // Oddments: Load input (0, 1): Bit 2: End - "ldr x20, [x14, #0x40]\n" + "ldr x10, [x13, #0x40]\n" "fmla v16.8h, v1.8h, v12.8h\n" "fmla v17.8h, v0.8h, v12.8h\n" - "add x20, x20, x13\n" + "add x10, x10, x12\n" "tbz %x[n_channels], #2, 25f\n" - "ld1 { v11.d }[0], [x20], #0x8\n" + "ld1 { v11.d }[0], [x10], #0x8\n" "tbz %x[n_channels], #1, 24f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x10], #0x4\n" "tbz %x[n_channels], #0, 27f\n" - "ld1 { v11.h }[6], [x20], #0x2\n" + "ld1 { v11.h }[6], [x10], #0x2\n" "b 27f\n" "24:" // Oddments: Load input (0, 4): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 27f\n" - "ld1 { v11.h }[4], [x20], #0x2\n" + "ld1 { v11.h }[4], [x10], #0x2\n" "b 27f\n" "25:" // Oddments: Load input (0, 4): Bit 2: Unset "tbz %x[n_channels], #1, 26f\n" - "ld1 { v11.s }[0], [x20], #0x4\n" + "ld1 { v11.s }[0], [x10], #0x4\n" "tbz %x[n_channels], #0, 27f\n" - "ld1 { v11.h }[2], [x20], #0x2\n" + "ld1 { v11.h }[2], [x10], #0x2\n" "b 27f\n" "26:" // Oddments: Load input (0, 4): Bit 2: Unset: Bit 1: Unset - "ld1 { v11.h }[0], [x20], #0x2\n" + "ld1 { v11.h }[0], [x10], #0x2\n" "27:" // Oddments: Load input (0, 4): Bit 2: End - "ldr x20, [x14, #0x48]\n" + "ldr x9, [x13, #0x48]\n" "fmla v18.8h, v2.8h, v11.8h\n" "fmla v19.8h, v1.8h, v11.8h\n" - "add x20, x20, x13\n" + "add x9, x9, x12\n" "tbz %x[n_channels], #2, 29f\n" - "ld1 { v10.d }[0], [x20], #0x8\n" + "ld1 { v10.d }[0], [x9], #0x8\n" "tbz %x[n_channels], #1, 28f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x9], #0x4\n" "tbz %x[n_channels], #0, 31f\n" - "ld1 { v10.h }[6], [x20], #0x2\n" + "ld1 { v10.h }[6], [x9], #0x2\n" "b 31f\n" "28:" // Oddments: Load input (3, 3): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 31f\n" - "ld1 { v10.h }[4], [x20], #0x2\n" + "ld1 { v10.h }[4], [x9], #0x2\n" "b 31f\n" "29:" // Oddments: Load input (3, 3): Bit 2: Unset "tbz %x[n_channels], #1, 30f\n" - "ld1 { v10.s }[0], [x20], #0x4\n" + "ld1 { v10.s }[0], [x9], #0x4\n" "tbz %x[n_channels], #0, 31f\n" - "ld1 { v10.h }[2], [x20], #0x2\n" + "ld1 { v10.h }[2], [x9], #0x2\n" "b 31f\n" "30:" // Oddments: Load input (3, 3): Bit 2: Unset: Bit 1: Unset - "ld1 { v10.h }[0], [x20], #0x2\n" + "ld1 { v10.h }[0], [x9], #0x2\n" "31:" // Oddments: Load input (3, 3): Bit 2: End - "ldr x20, [x14, #0x50]\n" + "ldr x28, [x13, #0x50]\n" "fmla v21.8h, v8.8h, v10.8h\n" "fmla v22.8h, v7.8h, v10.8h\n" - "add x20, x20, x13\n" + "add x28, x28, x12\n" "fmla v23.8h, v6.8h, v10.8h\n" "fmla v25.8h, v5.8h, v10.8h\n" "fmla v26.8h, v4.8h, v10.8h\n" @@ -941,670 +941,670 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_indirect_impl( "fmla v30.8h, v1.8h, v10.8h\n" "fmla v31.8h, v0.8h, v10.8h\n" "tbz %x[n_channels], #2, 33f\n" - "ld1 { v9.d }[0], [x20], #0x8\n" + "ld1 { v9.d }[0], [x28], #0x8\n" "tbz %x[n_channels], #1, 32f\n" - "ld1 { v9.s }[2], [x20], #0x4\n" + "ld1 { v9.s }[2], [x28], #0x4\n" "tbz %x[n_channels], #0, 35f\n" - "ld1 { v9.h }[6], [x20], #0x2\n" + "ld1 { v9.h }[6], [x28], #0x2\n" "b 35f\n" "32:" // Oddments: Load input (1, 0): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 35f\n" - "ld1 { v9.h }[4], [x20], #0x2\n" + "ld1 { v9.h }[4], [x28], #0x2\n" "b 35f\n" "33:" // Oddments: Load input (1, 0): Bit 2: Unset "tbz %x[n_channels], #1, 34f\n" - "ld1 { v9.s }[0], [x20], #0x4\n" + "ld1 { v9.s }[0], [x28], #0x4\n" "tbz %x[n_channels], #0, 35f\n" - "ld1 { v9.h }[2], [x20], #0x2\n" + "ld1 { v9.h }[2], [x28], #0x2\n" "b 35f\n" "34:" // Oddments: Load input (1, 0): Bit 2: Unset: Bit 1: Unset - "ld1 { v9.h }[0], [x20], #0x2\n" + "ld1 { v9.h }[0], [x28], #0x2\n" "35:" // Oddments: Load input (1, 0): Bit 2: End - "ldr x20, [x14, #0x58]\n" + "ldr x27, [x13, #0x58]\n" "fmla v16.8h, v3.8h, v9.8h\n" "fmla v20.8h, v0.8h, v9.8h\n" - "add x20, x20, x13\n" + "add x27, x27, x12\n" "tbz %x[n_channels], #2, 37f\n" - "ld1 { v12.d }[0], [x20], #0x8\n" + "ld1 { v12.d }[0], [x27], #0x8\n" "tbz %x[n_channels], #1, 36f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x27], #0x4\n" "tbz %x[n_channels], #0, 39f\n" - "ld1 { v12.h }[6], [x20], #0x2\n" + "ld1 { v12.h }[6], [x27], #0x2\n" "b 39f\n" "36:" // Oddments: Load input (1, 5): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 39f\n" - "ld1 { v12.h }[4], [x20], #0x2\n" + "ld1 { v12.h }[4], [x27], #0x2\n" "b 39f\n" "37:" // Oddments: Load input (1, 5): Bit 2: Unset "tbz %x[n_channels], #1, 38f\n" - "ld1 { v12.s }[0], [x20], #0x4\n" + "ld1 { v12.s }[0], [x27], #0x4\n" "tbz %x[n_channels], #0, 39f\n" - "ld1 { v12.h }[2], [x20], #0x2\n" + "ld1 { v12.h }[2], [x27], #0x2\n" "b 39f\n" "38:" // Oddments: Load input (1, 5): Bit 2: Unset: Bit 1: Unset - "ld1 { v12.h }[0], [x20], #0x2\n" + "ld1 { v12.h }[0], [x27], #0x2\n" "39:" // Oddments: Load input (1, 5): Bit 2: End - "ldr x20, [x14, #0x60]\n" + "ldr x26, [x13, #0x60]\n" "fmla v19.8h, v5.8h, v12.8h\n" "fmla v23.8h, v2.8h, v12.8h\n" - "add x20, x20, x13\n" + "add x26, x26, x12\n" "tbz %x[n_channels], #2, 41f\n" - "ld1 { v11.d }[0], [x20], #0x8\n" + "ld1 { v11.d }[0], [x26], #0x8\n" "tbz %x[n_channels], #1, 40f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x26], #0x4\n" "tbz %x[n_channels], #0, 43f\n" - "ld1 { v11.h }[6], [x20], #0x2\n" + "ld1 { v11.h }[6], [x26], #0x2\n" "b 43f\n" "40:" // Oddments: Load input (4, 0): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 43f\n" - "ld1 { v11.h }[4], [x20], #0x2\n" + "ld1 { v11.h }[4], [x26], #0x2\n" "b 43f\n" "41:" // Oddments: Load input (4, 0): Bit 2: Unset "tbz %x[n_channels], #1, 42f\n" - "ld1 { v11.s }[0], [x20], #0x4\n" + "ld1 { v11.s }[0], [x26], #0x4\n" "tbz %x[n_channels], #0, 43f\n" - "ld1 { v11.h }[2], [x20], #0x2\n" + "ld1 { v11.h }[2], [x26], #0x2\n" "b 43f\n" "42:" // Oddments: Load input (4, 0): Bit 2: Unset: Bit 1: Unset - "ld1 { v11.h }[0], [x20], #0x2\n" + "ld1 { v11.h }[0], [x26], #0x2\n" "43:" // Oddments: Load input (4, 0): Bit 2: End - "ldr x20, [x14, #0x68]\n" + "ldr x24, [x13, #0x68]\n" "fmla v24.8h, v6.8h, v11.8h\n" "fmla v28.8h, v3.8h, v11.8h\n" - "add x20, x20, x13\n" + "add x24, x24, x12\n" "tbz %x[n_channels], #2, 45f\n" - "ld1 { v10.d }[0], [x20], #0x8\n" + "ld1 { v10.d }[0], [x24], #0x8\n" "tbz %x[n_channels], #1, 44f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x24], #0x4\n" "tbz %x[n_channels], #0, 47f\n" - "ld1 { v10.h }[6], [x20], #0x2\n" + "ld1 { v10.h }[6], [x24], #0x2\n" "b 47f\n" "44:" // Oddments: Load input (1, 2): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 47f\n" - "ld1 { v10.h }[4], [x20], #0x2\n" + "ld1 { v10.h }[4], [x24], #0x2\n" "b 47f\n" "45:" // Oddments: Load input (1, 2): Bit 2: Unset "tbz %x[n_channels], #1, 46f\n" - "ld1 { v10.s }[0], [x20], #0x4\n" + "ld1 { v10.s }[0], [x24], #0x4\n" "tbz %x[n_channels], #0, 47f\n" - "ld1 { v10.h }[2], [x20], #0x2\n" + "ld1 { v10.h }[2], [x24], #0x2\n" "b 47f\n" "46:" // Oddments: Load input (1, 2): Bit 2: Unset: Bit 1: Unset - "ld1 { v10.h }[0], [x20], #0x2\n" + "ld1 { v10.h }[0], [x24], #0x2\n" "47:" // Oddments: Load input (1, 2): Bit 2: End - "ldr x20, [x14, #0x70]\n" + "ldr x25, [x13, #0x70]\n" "fmla v16.8h, v5.8h, v10.8h\n" "fmla v17.8h, v4.8h, v10.8h\n" - "add x20, x20, x13\n" + "add x25, x25, x12\n" "fmla v18.8h, v3.8h, v10.8h\n" "fmla v20.8h, v2.8h, v10.8h\n" "fmla v21.8h, v1.8h, v10.8h\n" "fmla v22.8h, v0.8h, v10.8h\n" "tbz %x[n_channels], #2, 49f\n" - "ld1 { v11.d }[0], [x20], #0x8\n" + "ld1 { v11.d }[0], [x25], #0x8\n" "tbz %x[n_channels], #1, 48f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x25], #0x4\n" "tbz %x[n_channels], #0, 51f\n" - "ld1 { v11.h }[6], [x20], #0x2\n" + "ld1 { v11.h }[6], [x25], #0x2\n" "b 51f\n" "48:" // Oddments: Load input (4, 5): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 51f\n" - "ld1 { v11.h }[4], [x20], #0x2\n" + "ld1 { v11.h }[4], [x25], #0x2\n" "b 51f\n" "49:" // Oddments: Load input (4, 5): Bit 2: Unset "tbz %x[n_channels], #1, 50f\n" - "ld1 { v11.s }[0], [x20], #0x4\n" + "ld1 { v11.s }[0], [x25], #0x4\n" "tbz %x[n_channels], #0, 51f\n" - "ld1 { v11.h }[2], [x20], #0x2\n" + "ld1 { v11.h }[2], [x25], #0x2\n" "b 51f\n" "50:" // Oddments: Load input (4, 5): Bit 2: Unset: Bit 1: Unset - "ld1 { v11.h }[0], [x20], #0x2\n" + "ld1 { v11.h }[0], [x25], #0x2\n" "51:" // Oddments: Load input (4, 5): Bit 2: End - "ldr x20, [x14, #0x78]\n" + "ldr x23, [x13, #0x78]\n" "fmla v27.8h, v8.8h, v11.8h\n" "fmla v31.8h, v5.8h, v11.8h\n" - "add x20, x20, x13\n" + "add x23, x23, x12\n" "tbz %x[n_channels], #2, 53f\n" - "ld1 { v12.d }[0], [x20], #0x8\n" + "ld1 { v12.d }[0], [x23], #0x8\n" "tbz %x[n_channels], #1, 52f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x23], #0x4\n" "tbz %x[n_channels], #0, 55f\n" - "ld1 { v12.h }[6], [x20], #0x2\n" + "ld1 { v12.h }[6], [x23], #0x2\n" "b 55f\n" "52:" // Oddments: Load input (1, 3): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 55f\n" - "ld1 { v12.h }[4], [x20], #0x2\n" + "ld1 { v12.h }[4], [x23], #0x2\n" "b 55f\n" "53:" // Oddments: Load input (1, 3): Bit 2: Unset "tbz %x[n_channels], #1, 54f\n" - "ld1 { v12.s }[0], [x20], #0x4\n" + "ld1 { v12.s }[0], [x23], #0x4\n" "tbz %x[n_channels], #0, 55f\n" - "ld1 { v12.h }[2], [x20], #0x2\n" + "ld1 { v12.h }[2], [x23], #0x2\n" "b 55f\n" "54:" // Oddments: Load input (1, 3): Bit 2: Unset: Bit 1: Unset - "ld1 { v12.h }[0], [x20], #0x2\n" + "ld1 { v12.h }[0], [x23], #0x2\n" "55:" // Oddments: Load input (1, 3): Bit 2: End - "ldr x20, [x14, #0x80]\n" + "ldr x10, [x13, #0x80]\n" "fmla v17.8h, v5.8h, v12.8h\n" "fmla v18.8h, v4.8h, v12.8h\n" - "add x20, x20, x13\n" + "add x10, x10, x12\n" "fmla v19.8h, v3.8h, v12.8h\n" "fmla v21.8h, v2.8h, v12.8h\n" "fmla v22.8h, v1.8h, v12.8h\n" "fmla v23.8h, v0.8h, v12.8h\n" "tbz %x[n_channels], #2, 57f\n" - "ld1 { v11.d }[0], [x20], #0x8\n" + "ld1 { v11.d }[0], [x10], #0x8\n" "tbz %x[n_channels], #1, 56f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x10], #0x4\n" "tbz %x[n_channels], #0, 59f\n" - "ld1 { v11.h }[6], [x20], #0x2\n" + "ld1 { v11.h }[6], [x10], #0x2\n" "b 59f\n" "56:" // Oddments: Load input (5, 1): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 59f\n" - "ld1 { v11.h }[4], [x20], #0x2\n" + "ld1 { v11.h }[4], [x10], #0x2\n" "b 59f\n" "57:" // Oddments: Load input (5, 1): Bit 2: Unset "tbz %x[n_channels], #1, 58f\n" - "ld1 { v11.s }[0], [x20], #0x4\n" + "ld1 { v11.s }[0], [x10], #0x4\n" "tbz %x[n_channels], #0, 59f\n" - "ld1 { v11.h }[2], [x20], #0x2\n" + "ld1 { v11.h }[2], [x10], #0x2\n" "b 59f\n" "58:" // Oddments: Load input (5, 1): Bit 2: Unset: Bit 1: Unset - "ld1 { v11.h }[0], [x20], #0x2\n" + "ld1 { v11.h }[0], [x10], #0x2\n" "59:" // Oddments: Load input (5, 1): Bit 2: End - "ldr x20, [x14, #0x88]\n" + "ldr x9, [x13, #0x88]\n" "fmla v28.8h, v7.8h, v11.8h\n" "fmla v29.8h, v6.8h, v11.8h\n" - "add x20, x20, x13\n" + "add x9, x9, x12\n" "tbz %x[n_channels], #2, 61f\n" - "ld1 { v10.d }[0], [x20], #0x8\n" + "ld1 { v10.d }[0], [x9], #0x8\n" "tbz %x[n_channels], #1, 60f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x9], #0x4\n" "tbz %x[n_channels], #0, 63f\n" - "ld1 { v10.h }[6], [x20], #0x2\n" + "ld1 { v10.h }[6], [x9], #0x2\n" "b 63f\n" "60:" // Oddments: Load input (2, 1): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 63f\n" - "ld1 { v10.h }[4], [x20], #0x2\n" + "ld1 { v10.h }[4], [x9], #0x2\n" "b 63f\n" "61:" // Oddments: Load input (2, 1): Bit 2: Unset "tbz %x[n_channels], #1, 62f\n" - "ld1 { v10.s }[0], [x20], #0x4\n" + "ld1 { v10.s }[0], [x9], #0x4\n" "tbz %x[n_channels], #0, 63f\n" - "ld1 { v10.h }[2], [x20], #0x2\n" + "ld1 { v10.h }[2], [x9], #0x2\n" "b 63f\n" "62:" // Oddments: Load input (2, 1): Bit 2: Unset: Bit 1: Unset - "ld1 { v10.h }[0], [x20], #0x2\n" + "ld1 { v10.h }[0], [x9], #0x2\n" "63:" // Oddments: Load input (2, 1): Bit 2: End - "ldr x20, [x14, #0x90]\n" + "ldr x28, [x13, #0x90]\n" "fmla v16.8h, v7.8h, v10.8h\n" "fmla v17.8h, v6.8h, v10.8h\n" - "add x20, x20, x13\n" + "add x28, x28, x12\n" "fmla v20.8h, v4.8h, v10.8h\n" "fmla v21.8h, v3.8h, v10.8h\n" "fmla v24.8h, v1.8h, v10.8h\n" "fmla v25.8h, v0.8h, v10.8h\n" "tbz %x[n_channels], #2, 65f\n" - "ld1 { v11.d }[0], [x20], #0x8\n" + "ld1 { v11.d }[0], [x28], #0x8\n" "tbz %x[n_channels], #1, 64f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x28], #0x4\n" "tbz %x[n_channels], #0, 67f\n" - "ld1 { v11.h }[6], [x20], #0x2\n" + "ld1 { v11.h }[6], [x28], #0x2\n" "b 67f\n" "64:" // Oddments: Load input (5, 4): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 67f\n" - "ld1 { v11.h }[4], [x20], #0x2\n" + "ld1 { v11.h }[4], [x28], #0x2\n" "b 67f\n" "65:" // Oddments: Load input (5, 4): Bit 2: Unset "tbz %x[n_channels], #1, 66f\n" - "ld1 { v11.s }[0], [x20], #0x4\n" + "ld1 { v11.s }[0], [x28], #0x4\n" "tbz %x[n_channels], #0, 67f\n" - "ld1 { v11.h }[2], [x20], #0x2\n" + "ld1 { v11.h }[2], [x28], #0x2\n" "b 67f\n" "66:" // Oddments: Load input (5, 4): Bit 2: Unset: Bit 1: Unset - "ld1 { v11.h }[0], [x20], #0x2\n" + "ld1 { v11.h }[0], [x28], #0x2\n" "67:" // Oddments: Load input (5, 4): Bit 2: End - "ldr x20, [x14, #0x98]\n" + "ldr x27, [x13, #0x98]\n" "fmla v30.8h, v8.8h, v11.8h\n" "fmla v31.8h, v7.8h, v11.8h\n" - "add x20, x20, x13\n" + "add x27, x27, x12\n" "tbz %x[n_channels], #2, 69f\n" - "ld1 { v12.d }[0], [x20], #0x8\n" + "ld1 { v12.d }[0], [x27], #0x8\n" "tbz %x[n_channels], #1, 68f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x27], #0x4\n" "tbz %x[n_channels], #0, 71f\n" - "ld1 { v12.h }[6], [x20], #0x2\n" + "ld1 { v12.h }[6], [x27], #0x2\n" "b 71f\n" "68:" // Oddments: Load input (2, 4): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 71f\n" - "ld1 { v12.h }[4], [x20], #0x2\n" + "ld1 { v12.h }[4], [x27], #0x2\n" "b 71f\n" "69:" // Oddments: Load input (2, 4): Bit 2: Unset "tbz %x[n_channels], #1, 70f\n" - "ld1 { v12.s }[0], [x20], #0x4\n" + "ld1 { v12.s }[0], [x27], #0x4\n" "tbz %x[n_channels], #0, 71f\n" - "ld1 { v12.h }[2], [x20], #0x2\n" + "ld1 { v12.h }[2], [x27], #0x2\n" "b 71f\n" "70:" // Oddments: Load input (2, 4): Bit 2: Unset: Bit 1: Unset - "ld1 { v12.h }[0], [x20], #0x2\n" + "ld1 { v12.h }[0], [x27], #0x2\n" "71:" // Oddments: Load input (2, 4): Bit 2: End - "ldr x20, [x14, #0xa0]\n" + "ldr x26, [x13, #0xa0]\n" "fmla v18.8h, v8.8h, v12.8h\n" "fmla v19.8h, v7.8h, v12.8h\n" - "add x20, x20, x13\n" + "add x26, x26, x12\n" "fmla v22.8h, v5.8h, v12.8h\n" "fmla v23.8h, v4.8h, v12.8h\n" "fmla v26.8h, v2.8h, v12.8h\n" "fmla v27.8h, v1.8h, v12.8h\n" "tbz %x[n_channels], #2, 73f\n" - "ld1 { v10.d }[0], [x20], #0x8\n" + "ld1 { v10.d }[0], [x26], #0x8\n" "tbz %x[n_channels], #1, 72f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x26], #0x4\n" "tbz %x[n_channels], #0, 75f\n" - "ld1 { v10.h }[6], [x20], #0x2\n" + "ld1 { v10.h }[6], [x26], #0x2\n" "b 75f\n" "72:" // Oddments: Load input (0, 2): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 75f\n" - "ld1 { v10.h }[4], [x20], #0x2\n" + "ld1 { v10.h }[4], [x26], #0x2\n" "b 75f\n" "73:" // Oddments: Load input (0, 2): Bit 2: Unset "tbz %x[n_channels], #1, 74f\n" - "ld1 { v10.s }[0], [x20], #0x4\n" + "ld1 { v10.s }[0], [x26], #0x4\n" "tbz %x[n_channels], #0, 75f\n" - "ld1 { v10.h }[2], [x20], #0x2\n" + "ld1 { v10.h }[2], [x26], #0x2\n" "b 75f\n" "74:" // Oddments: Load input (0, 2): Bit 2: Unset: Bit 1: Unset - "ld1 { v10.h }[0], [x20], #0x2\n" + "ld1 { v10.h }[0], [x26], #0x2\n" "75:" // Oddments: Load input (0, 2): Bit 2: End - "ldr x20, [x14, #0xa8]\n" + "ldr x24, [x13, #0xa8]\n" "fmla v16.8h, v2.8h, v10.8h\n" "fmla v17.8h, v1.8h, v10.8h\n" - "add x20, x20, x13\n" + "add x24, x24, x12\n" "fmla v18.8h, v0.8h, v10.8h\n" "tbz %x[n_channels], #2, 77f\n" - "ld1 { v11.d }[0], [x20], #0x8\n" + "ld1 { v11.d }[0], [x24], #0x8\n" "tbz %x[n_channels], #1, 76f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x24], #0x4\n" "tbz %x[n_channels], #0, 79f\n" - "ld1 { v11.h }[6], [x20], #0x2\n" + "ld1 { v11.h }[6], [x24], #0x2\n" "b 79f\n" "76:" // Oddments: Load input (3, 1): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 79f\n" - "ld1 { v11.h }[4], [x20], #0x2\n" + "ld1 { v11.h }[4], [x24], #0x2\n" "b 79f\n" "77:" // Oddments: Load input (3, 1): Bit 2: Unset "tbz %x[n_channels], #1, 78f\n" - "ld1 { v11.s }[0], [x20], #0x4\n" + "ld1 { v11.s }[0], [x24], #0x4\n" "tbz %x[n_channels], #0, 79f\n" - "ld1 { v11.h }[2], [x20], #0x2\n" + "ld1 { v11.h }[2], [x24], #0x2\n" "b 79f\n" "78:" // Oddments: Load input (3, 1): Bit 2: Unset: Bit 1: Unset - "ld1 { v11.h }[0], [x20], #0x2\n" + "ld1 { v11.h }[0], [x24], #0x2\n" "79:" // Oddments: Load input (3, 1): Bit 2: End - "ldr x20, [x14, #0xb0]\n" + "ldr x25, [x13, #0xb0]\n" "fmla v20.8h, v7.8h, v11.8h\n" "fmla v21.8h, v6.8h, v11.8h\n" - "add x20, x20, x13\n" + "add x25, x25, x12\n" "fmla v24.8h, v4.8h, v11.8h\n" "fmla v25.8h, v3.8h, v11.8h\n" "fmla v28.8h, v1.8h, v11.8h\n" "fmla v29.8h, v0.8h, v11.8h\n" "tbz %x[n_channels], #2, 81f\n" - "ld1 { v12.d }[0], [x20], #0x8\n" + "ld1 { v12.d }[0], [x25], #0x8\n" "tbz %x[n_channels], #1, 80f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x25], #0x4\n" "tbz %x[n_channels], #0, 83f\n" - "ld1 { v12.h }[6], [x20], #0x2\n" + "ld1 { v12.h }[6], [x25], #0x2\n" "b 83f\n" "80:" // Oddments: Load input (0, 3): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 83f\n" - "ld1 { v12.h }[4], [x20], #0x2\n" + "ld1 { v12.h }[4], [x25], #0x2\n" "b 83f\n" "81:" // Oddments: Load input (0, 3): Bit 2: Unset "tbz %x[n_channels], #1, 82f\n" - "ld1 { v12.s }[0], [x20], #0x4\n" + "ld1 { v12.s }[0], [x25], #0x4\n" "tbz %x[n_channels], #0, 83f\n" - "ld1 { v12.h }[2], [x20], #0x2\n" + "ld1 { v12.h }[2], [x25], #0x2\n" "b 83f\n" "82:" // Oddments: Load input (0, 3): Bit 2: Unset: Bit 1: Unset - "ld1 { v12.h }[0], [x20], #0x2\n" + "ld1 { v12.h }[0], [x25], #0x2\n" "83:" // Oddments: Load input (0, 3): Bit 2: End - "ldr x20, [x14, #0xb8]\n" + "ldr x23, [x13, #0xb8]\n" "fmla v17.8h, v2.8h, v12.8h\n" "fmla v18.8h, v1.8h, v12.8h\n" - "add x20, x20, x13\n" + "add x23, x23, x12\n" "fmla v19.8h, v0.8h, v12.8h\n" "tbz %x[n_channels], #2, 85f\n" - "ld1 { v10.d }[0], [x20], #0x8\n" + "ld1 { v10.d }[0], [x23], #0x8\n" "tbz %x[n_channels], #1, 84f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x23], #0x4\n" "tbz %x[n_channels], #0, 87f\n" - "ld1 { v10.h }[6], [x20], #0x2\n" + "ld1 { v10.h }[6], [x23], #0x2\n" "b 87f\n" "84:" // Oddments: Load input (2, 0): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 87f\n" - "ld1 { v10.h }[4], [x20], #0x2\n" + "ld1 { v10.h }[4], [x23], #0x2\n" "b 87f\n" "85:" // Oddments: Load input (2, 0): Bit 2: Unset "tbz %x[n_channels], #1, 86f\n" - "ld1 { v10.s }[0], [x20], #0x4\n" + "ld1 { v10.s }[0], [x23], #0x4\n" "tbz %x[n_channels], #0, 87f\n" - "ld1 { v10.h }[2], [x20], #0x2\n" + "ld1 { v10.h }[2], [x23], #0x2\n" "b 87f\n" "86:" // Oddments: Load input (2, 0): Bit 2: Unset: Bit 1: Unset - "ld1 { v10.h }[0], [x20], #0x2\n" + "ld1 { v10.h }[0], [x23], #0x2\n" "87:" // Oddments: Load input (2, 0): Bit 2: End - "ldr x20, [x14, #0xc0]\n" + "ldr x10, [x13, #0xc0]\n" "fmla v16.8h, v6.8h, v10.8h\n" "fmla v20.8h, v3.8h, v10.8h\n" - "add x20, x20, x13\n" + "add x10, x10, x12\n" "fmla v24.8h, v0.8h, v10.8h\n" "tbz %x[n_channels], #2, 89f\n" - "ld1 { v11.d }[0], [x20], #0x8\n" + "ld1 { v11.d }[0], [x10], #0x8\n" "tbz %x[n_channels], #1, 88f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x10], #0x4\n" "tbz %x[n_channels], #0, 91f\n" - "ld1 { v11.h }[6], [x20], #0x2\n" + "ld1 { v11.h }[6], [x10], #0x2\n" "b 91f\n" "88:" // Oddments: Load input (3, 4): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 91f\n" - "ld1 { v11.h }[4], [x20], #0x2\n" + "ld1 { v11.h }[4], [x10], #0x2\n" "b 91f\n" "89:" // Oddments: Load input (3, 4): Bit 2: Unset "tbz %x[n_channels], #1, 90f\n" - "ld1 { v11.s }[0], [x20], #0x4\n" + "ld1 { v11.s }[0], [x10], #0x4\n" "tbz %x[n_channels], #0, 91f\n" - "ld1 { v11.h }[2], [x20], #0x2\n" + "ld1 { v11.h }[2], [x10], #0x2\n" "b 91f\n" "90:" // Oddments: Load input (3, 4): Bit 2: Unset: Bit 1: Unset - "ld1 { v11.h }[0], [x20], #0x2\n" + "ld1 { v11.h }[0], [x10], #0x2\n" "91:" // Oddments: Load input (3, 4): Bit 2: End - "ldr x20, [x14, #0xc8]\n" + "ldr x9, [x13, #0xc8]\n" "fmla v22.8h, v8.8h, v11.8h\n" "fmla v23.8h, v7.8h, v11.8h\n" - "add x20, x20, x13\n" + "add x9, x9, x12\n" "fmla v26.8h, v5.8h, v11.8h\n" "fmla v27.8h, v4.8h, v11.8h\n" "fmla v30.8h, v2.8h, v11.8h\n" "fmla v31.8h, v1.8h, v11.8h\n" "tbz %x[n_channels], #2, 93f\n" - "ld1 { v12.d }[0], [x20], #0x8\n" + "ld1 { v12.d }[0], [x9], #0x8\n" "tbz %x[n_channels], #1, 92f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x9], #0x4\n" "tbz %x[n_channels], #0, 95f\n" - "ld1 { v12.h }[6], [x20], #0x2\n" + "ld1 { v12.h }[6], [x9], #0x2\n" "b 95f\n" "92:" // Oddments: Load input (2, 5): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 95f\n" - "ld1 { v12.h }[4], [x20], #0x2\n" + "ld1 { v12.h }[4], [x9], #0x2\n" "b 95f\n" "93:" // Oddments: Load input (2, 5): Bit 2: Unset "tbz %x[n_channels], #1, 94f\n" - "ld1 { v12.s }[0], [x20], #0x4\n" + "ld1 { v12.s }[0], [x9], #0x4\n" "tbz %x[n_channels], #0, 95f\n" - "ld1 { v12.h }[2], [x20], #0x2\n" + "ld1 { v12.h }[2], [x9], #0x2\n" "b 95f\n" "94:" // Oddments: Load input (2, 5): Bit 2: Unset: Bit 1: Unset - "ld1 { v12.h }[0], [x20], #0x2\n" + "ld1 { v12.h }[0], [x9], #0x2\n" "95:" // Oddments: Load input (2, 5): Bit 2: End - "ldr x20, [x14, #0xd0]\n" + "ldr x28, [x13, #0xd0]\n" "fmla v19.8h, v8.8h, v12.8h\n" "fmla v23.8h, v5.8h, v12.8h\n" - "add x20, x20, x13\n" + "add x28, x28, x12\n" "fmla v27.8h, v2.8h, v12.8h\n" "tbz %x[n_channels], #2, 97f\n" - "ld1 { v10.d }[0], [x20], #0x8\n" + "ld1 { v10.d }[0], [x28], #0x8\n" "tbz %x[n_channels], #1, 96f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x28], #0x4\n" "tbz %x[n_channels], #0, 99f\n" - "ld1 { v10.h }[6], [x20], #0x2\n" + "ld1 { v10.h }[6], [x28], #0x2\n" "b 99f\n" "96:" // Oddments: Load input (3, 0): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 99f\n" - "ld1 { v10.h }[4], [x20], #0x2\n" + "ld1 { v10.h }[4], [x28], #0x2\n" "b 99f\n" "97:" // Oddments: Load input (3, 0): Bit 2: Unset "tbz %x[n_channels], #1, 98f\n" - "ld1 { v10.s }[0], [x20], #0x4\n" + "ld1 { v10.s }[0], [x28], #0x4\n" "tbz %x[n_channels], #0, 99f\n" - "ld1 { v10.h }[2], [x20], #0x2\n" + "ld1 { v10.h }[2], [x28], #0x2\n" "b 99f\n" "98:" // Oddments: Load input (3, 0): Bit 2: Unset: Bit 1: Unset - "ld1 { v10.h }[0], [x20], #0x2\n" + "ld1 { v10.h }[0], [x28], #0x2\n" "99:" // Oddments: Load input (3, 0): Bit 2: End - "ldr x20, [x14, #0xd8]\n" + "ldr x27, [x13, #0xd8]\n" "fmla v20.8h, v6.8h, v10.8h\n" "fmla v24.8h, v3.8h, v10.8h\n" - "add x20, x20, x13\n" + "add x27, x27, x12\n" "fmla v28.8h, v0.8h, v10.8h\n" "tbz %x[n_channels], #2, 101f\n" - "ld1 { v11.d }[0], [x20], #0x8\n" + "ld1 { v11.d }[0], [x27], #0x8\n" "tbz %x[n_channels], #1, 100f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x27], #0x4\n" "tbz %x[n_channels], #0, 103f\n" - "ld1 { v11.h }[6], [x20], #0x2\n" + "ld1 { v11.h }[6], [x27], #0x2\n" "b 103f\n" "100:" // Oddments: Load input (4, 2): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 103f\n" - "ld1 { v11.h }[4], [x20], #0x2\n" + "ld1 { v11.h }[4], [x27], #0x2\n" "b 103f\n" "101:" // Oddments: Load input (4, 2): Bit 2: Unset "tbz %x[n_channels], #1, 102f\n" - "ld1 { v11.s }[0], [x20], #0x4\n" + "ld1 { v11.s }[0], [x27], #0x4\n" "tbz %x[n_channels], #0, 103f\n" - "ld1 { v11.h }[2], [x20], #0x2\n" + "ld1 { v11.h }[2], [x27], #0x2\n" "b 103f\n" "102:" // Oddments: Load input (4, 2): Bit 2: Unset: Bit 1: Unset - "ld1 { v11.h }[0], [x20], #0x2\n" + "ld1 { v11.h }[0], [x27], #0x2\n" "103:" // Oddments: Load input (4, 2): Bit 2: End - "ldr x20, [x14, #0xe0]\n" + "ldr x26, [x13, #0xe0]\n" "fmla v24.8h, v8.8h, v11.8h\n" "fmla v25.8h, v7.8h, v11.8h\n" - "add x20, x20, x13\n" + "add x26, x26, x12\n" "fmla v26.8h, v6.8h, v11.8h\n" "fmla v28.8h, v5.8h, v11.8h\n" "fmla v29.8h, v4.8h, v11.8h\n" "fmla v30.8h, v3.8h, v11.8h\n" "tbz %x[n_channels], #2, 105f\n" - "ld1 { v12.d }[0], [x20], #0x8\n" + "ld1 { v12.d }[0], [x26], #0x8\n" "tbz %x[n_channels], #1, 104f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x26], #0x4\n" "tbz %x[n_channels], #0, 107f\n" - "ld1 { v12.h }[6], [x20], #0x2\n" + "ld1 { v12.h }[6], [x26], #0x2\n" "b 107f\n" "104:" // Oddments: Load input (3, 5): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 107f\n" - "ld1 { v12.h }[4], [x20], #0x2\n" + "ld1 { v12.h }[4], [x26], #0x2\n" "b 107f\n" "105:" // Oddments: Load input (3, 5): Bit 2: Unset "tbz %x[n_channels], #1, 106f\n" - "ld1 { v12.s }[0], [x20], #0x4\n" + "ld1 { v12.s }[0], [x26], #0x4\n" "tbz %x[n_channels], #0, 107f\n" - "ld1 { v12.h }[2], [x20], #0x2\n" + "ld1 { v12.h }[2], [x26], #0x2\n" "b 107f\n" "106:" // Oddments: Load input (3, 5): Bit 2: Unset: Bit 1: Unset - "ld1 { v12.h }[0], [x20], #0x2\n" + "ld1 { v12.h }[0], [x26], #0x2\n" "107:" // Oddments: Load input (3, 5): Bit 2: End - "ldr x20, [x14, #0xe8]\n" + "ldr x24, [x13, #0xe8]\n" "fmla v23.8h, v8.8h, v12.8h\n" "fmla v27.8h, v5.8h, v12.8h\n" - "add x20, x20, x13\n" + "add x24, x24, x12\n" "fmla v31.8h, v2.8h, v12.8h\n" "tbz %x[n_channels], #2, 109f\n" - "ld1 { v10.d }[0], [x20], #0x8\n" + "ld1 { v10.d }[0], [x24], #0x8\n" "tbz %x[n_channels], #1, 108f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x24], #0x4\n" "tbz %x[n_channels], #0, 111f\n" - "ld1 { v10.h }[6], [x20], #0x2\n" + "ld1 { v10.h }[6], [x24], #0x2\n" "b 111f\n" "108:" // Oddments: Load input (5, 2): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 111f\n" - "ld1 { v10.h }[4], [x20], #0x2\n" + "ld1 { v10.h }[4], [x24], #0x2\n" "b 111f\n" "109:" // Oddments: Load input (5, 2): Bit 2: Unset "tbz %x[n_channels], #1, 110f\n" - "ld1 { v10.s }[0], [x20], #0x4\n" + "ld1 { v10.s }[0], [x24], #0x4\n" "tbz %x[n_channels], #0, 111f\n" - "ld1 { v10.h }[2], [x20], #0x2\n" + "ld1 { v10.h }[2], [x24], #0x2\n" "b 111f\n" "110:" // Oddments: Load input (5, 2): Bit 2: Unset: Bit 1: Unset - "ld1 { v10.h }[0], [x20], #0x2\n" + "ld1 { v10.h }[0], [x24], #0x2\n" "111:" // Oddments: Load input (5, 2): Bit 2: End - "ldr x20, [x14, #0xf0]\n" + "ldr x25, [x13, #0xf0]\n" "fmla v28.8h, v8.8h, v10.8h\n" "fmla v29.8h, v7.8h, v10.8h\n" - "add x20, x20, x13\n" + "add x25, x25, x12\n" "fmla v30.8h, v6.8h, v10.8h\n" "tbz %x[n_channels], #2, 113f\n" - "ld1 { v11.d }[0], [x20], #0x8\n" + "ld1 { v11.d }[0], [x25], #0x8\n" "tbz %x[n_channels], #1, 112f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x25], #0x4\n" "tbz %x[n_channels], #0, 115f\n" - "ld1 { v11.h }[6], [x20], #0x2\n" + "ld1 { v11.h }[6], [x25], #0x2\n" "b 115f\n" "112:" // Oddments: Load input (4, 3): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 115f\n" - "ld1 { v11.h }[4], [x20], #0x2\n" + "ld1 { v11.h }[4], [x25], #0x2\n" "b 115f\n" "113:" // Oddments: Load input (4, 3): Bit 2: Unset "tbz %x[n_channels], #1, 114f\n" - "ld1 { v11.s }[0], [x20], #0x4\n" + "ld1 { v11.s }[0], [x25], #0x4\n" "tbz %x[n_channels], #0, 115f\n" - "ld1 { v11.h }[2], [x20], #0x2\n" + "ld1 { v11.h }[2], [x25], #0x2\n" "b 115f\n" "114:" // Oddments: Load input (4, 3): Bit 2: Unset: Bit 1: Unset - "ld1 { v11.h }[0], [x20], #0x2\n" + "ld1 { v11.h }[0], [x25], #0x2\n" "115:" // Oddments: Load input (4, 3): Bit 2: End - "ldr x20, [x14, #0xf8]\n" + "ldr x23, [x13, #0xf8]\n" "fmla v25.8h, v8.8h, v11.8h\n" "fmla v26.8h, v7.8h, v11.8h\n" - "add x20, x20, x13\n" + "add x23, x23, x12\n" "fmla v27.8h, v6.8h, v11.8h\n" "fmla v29.8h, v5.8h, v11.8h\n" "fmla v30.8h, v4.8h, v11.8h\n" "fmla v31.8h, v3.8h, v11.8h\n" "tbz %x[n_channels], #2, 117f\n" - "ld1 { v12.d }[0], [x20], #0x8\n" + "ld1 { v12.d }[0], [x23], #0x8\n" "tbz %x[n_channels], #1, 116f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x23], #0x4\n" "tbz %x[n_channels], #0, 119f\n" - "ld1 { v12.h }[6], [x20], #0x2\n" + "ld1 { v12.h }[6], [x23], #0x2\n" "b 119f\n" "116:" // Oddments: Load input (5, 3): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 119f\n" - "ld1 { v12.h }[4], [x20], #0x2\n" + "ld1 { v12.h }[4], [x23], #0x2\n" "b 119f\n" "117:" // Oddments: Load input (5, 3): Bit 2: Unset "tbz %x[n_channels], #1, 118f\n" - "ld1 { v12.s }[0], [x20], #0x4\n" + "ld1 { v12.s }[0], [x23], #0x4\n" "tbz %x[n_channels], #0, 119f\n" - "ld1 { v12.h }[2], [x20], #0x2\n" + "ld1 { v12.h }[2], [x23], #0x2\n" "b 119f\n" "118:" // Oddments: Load input (5, 3): Bit 2: Unset: Bit 1: Unset - "ld1 { v12.h }[0], [x20], #0x2\n" + "ld1 { v12.h }[0], [x23], #0x2\n" "119:" // Oddments: Load input (5, 3): Bit 2: End - "ldr x20, [x14, #0x100]\n" + "ldr x10, [x13, #0x100]\n" "fmla v29.8h, v8.8h, v12.8h\n" "fmla v30.8h, v7.8h, v12.8h\n" - "add x20, x20, x13\n" + "add x10, x10, x12\n" "fmla v31.8h, v6.8h, v12.8h\n" "tbz %x[n_channels], #2, 121f\n" - "ld1 { v10.d }[0], [x20], #0x8\n" + "ld1 { v10.d }[0], [x10], #0x8\n" "tbz %x[n_channels], #1, 120f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x10], #0x4\n" "tbz %x[n_channels], #0, 123f\n" - "ld1 { v10.h }[6], [x20], #0x2\n" + "ld1 { v10.h }[6], [x10], #0x2\n" "b 123f\n" "120:" // Oddments: Load input (1, 1): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 123f\n" - "ld1 { v10.h }[4], [x20], #0x2\n" + "ld1 { v10.h }[4], [x10], #0x2\n" "b 123f\n" "121:" // Oddments: Load input (1, 1): Bit 2: Unset "tbz %x[n_channels], #1, 122f\n" - "ld1 { v10.s }[0], [x20], #0x4\n" + "ld1 { v10.s }[0], [x10], #0x4\n" "tbz %x[n_channels], #0, 123f\n" - "ld1 { v10.h }[2], [x20], #0x2\n" + "ld1 { v10.h }[2], [x10], #0x2\n" "b 123f\n" "122:" // Oddments: Load input (1, 1): Bit 2: Unset: Bit 1: Unset - "ld1 { v10.h }[0], [x20], #0x2\n" + "ld1 { v10.h }[0], [x10], #0x2\n" "123:" // Oddments: Load input (1, 1): Bit 2: End - "ldr x20, [x14, #0x108]\n" + "ldr x9, [x13, #0x108]\n" "fmla v16.8h, v4.8h, v10.8h\n" "fmla v17.8h, v3.8h, v10.8h\n" - "add x20, x20, x13\n" + "add x9, x9, x12\n" "fmla v20.8h, v1.8h, v10.8h\n" "fmla v21.8h, v0.8h, v10.8h\n" "tbz %x[n_channels], #2, 125f\n" - "ld1 { v11.d }[0], [x20], #0x8\n" + "ld1 { v11.d }[0], [x9], #0x8\n" "tbz %x[n_channels], #1, 124f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x9], #0x4\n" "tbz %x[n_channels], #0, 127f\n" - "ld1 { v11.h }[6], [x20], #0x2\n" + "ld1 { v11.h }[6], [x9], #0x2\n" "b 127f\n" "124:" // Oddments: Load input (1, 4): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 127f\n" - "ld1 { v11.h }[4], [x20], #0x2\n" + "ld1 { v11.h }[4], [x9], #0x2\n" "b 127f\n" "125:" // Oddments: Load input (1, 4): Bit 2: Unset "tbz %x[n_channels], #1, 126f\n" - "ld1 { v11.s }[0], [x20], #0x4\n" + "ld1 { v11.s }[0], [x9], #0x4\n" "tbz %x[n_channels], #0, 127f\n" - "ld1 { v11.h }[2], [x20], #0x2\n" + "ld1 { v11.h }[2], [x9], #0x2\n" "b 127f\n" "126:" // Oddments: Load input (1, 4): Bit 2: Unset: Bit 1: Unset - "ld1 { v11.h }[0], [x20], #0x2\n" + "ld1 { v11.h }[0], [x9], #0x2\n" "127:" // Oddments: Load input (1, 4): Bit 2: End - "ldr x20, [x14, #0x110]\n" + "ldr x28, [x13, #0x110]\n" "fmla v18.8h, v5.8h, v11.8h\n" "fmla v19.8h, v4.8h, v11.8h\n" - "add x20, x20, x13\n" + "add x28, x28, x12\n" "fmla v22.8h, v2.8h, v11.8h\n" "fmla v23.8h, v1.8h, v11.8h\n" "tbz %x[n_channels], #2, 129f\n" - "ld1 { v12.d }[0], [x20], #0x8\n" + "ld1 { v12.d }[0], [x28], #0x8\n" "tbz %x[n_channels], #1, 128f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x28], #0x4\n" "tbz %x[n_channels], #0, 131f\n" - "ld1 { v12.h }[6], [x20], #0x2\n" + "ld1 { v12.h }[6], [x28], #0x2\n" "b 131f\n" "128:" // Oddments: Load input (4, 1): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 131f\n" - "ld1 { v12.h }[4], [x20], #0x2\n" + "ld1 { v12.h }[4], [x28], #0x2\n" "b 131f\n" "129:" // Oddments: Load input (4, 1): Bit 2: Unset "tbz %x[n_channels], #1, 130f\n" - "ld1 { v12.s }[0], [x20], #0x4\n" + "ld1 { v12.s }[0], [x28], #0x4\n" "tbz %x[n_channels], #0, 131f\n" - "ld1 { v12.h }[2], [x20], #0x2\n" + "ld1 { v12.h }[2], [x28], #0x2\n" "b 131f\n" "130:" // Oddments: Load input (4, 1): Bit 2: Unset: Bit 1: Unset - "ld1 { v12.h }[0], [x20], #0x2\n" + "ld1 { v12.h }[0], [x28], #0x2\n" "131:" // Oddments: Load input (4, 1): Bit 2: End - "ldr x20, [x14, #0x118]\n" + "ldr x27, [x13, #0x118]\n" "fmla v24.8h, v7.8h, v12.8h\n" "fmla v25.8h, v6.8h, v12.8h\n" - "add x20, x20, x13\n" + "add x27, x27, x12\n" "fmla v28.8h, v4.8h, v12.8h\n" "fmla v29.8h, v3.8h, v12.8h\n" "tbz %x[n_channels], #2, 133f\n" - "ld1 { v10.d }[0], [x20], #0x8\n" + "ld1 { v10.d }[0], [x27], #0x8\n" "tbz %x[n_channels], #1, 132f\n" - "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v10.s }[2], [x27], #0x4\n" "tbz %x[n_channels], #0, 135f\n" - "ld1 { v10.h }[6], [x20], #0x2\n" + "ld1 { v10.h }[6], [x27], #0x2\n" "b 135f\n" "132:" // Oddments: Load input (4, 4): Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 135f\n" - "ld1 { v10.h }[4], [x20], #0x2\n" + "ld1 { v10.h }[4], [x27], #0x2\n" "b 135f\n" "133:" // Oddments: Load input (4, 4): Bit 2: Unset "tbz %x[n_channels], #1, 134f\n" - "ld1 { v10.s }[0], [x20], #0x4\n" + "ld1 { v10.s }[0], [x27], #0x4\n" "tbz %x[n_channels], #0, 135f\n" - "ld1 { v10.h }[2], [x20], #0x2\n" + "ld1 { v10.h }[2], [x27], #0x2\n" "b 135f\n" "134:" // Oddments: Load input (4, 4): Bit 2: Unset: Bit 1: Unset - "ld1 { v10.h }[0], [x20], #0x2\n" + "ld1 { v10.h }[0], [x27], #0x2\n" "135:" // Oddments: Load input (4, 4): Bit 2: End "fmla v26.8h, v8.8h, v10.8h\n" "fmla v27.8h, v7.8h, v10.8h\n" @@ -1643,363 +1643,363 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_indirect_impl( "fmin v30.8h, v30.8h, v14.8h\n" "fmin v31.8h, v31.8h, v14.8h\n" "tbz %x[n_channels], #2, 137f\n" - "ldr x23, [x16, #0x0]\n" - "ldr x22, [x16, #0x8]\n" - "add x23, x23, x12\n" - "add x22, x22, x12\n" - "ldr x21, [x16, #0x10]\n" - "ldr x20, [x16, #0x18]\n" - "add x21, x21, x12\n" - "add x20, x20, x12\n" - "st1 { v16.d }[0], [x23]\n" - "ldr x23, [x16, #0x20]\n" - "add x23, x23, x12\n" - "st1 { v17.d }[0], [x22]\n" - "ldr x22, [x16, #0x28]\n" - "add x22, x22, x12\n" - "st1 { v18.d }[0], [x21]\n" - "ldr x21, [x16, #0x30]\n" - "add x21, x21, x12\n" - "st1 { v19.d }[0], [x20]\n" - "ldr x20, [x16, #0x38]\n" - "add x20, x20, x12\n" - "st1 { v20.d }[0], [x23]\n" - "ldr x23, [x16, #0x40]\n" - "add x23, x23, x12\n" - "st1 { v21.d }[0], [x22]\n" - "ldr x22, [x16, #0x48]\n" - "add x22, x22, x12\n" - "st1 { v22.d }[0], [x21]\n" - "ldr x21, [x16, #0x50]\n" - "add x21, x21, x12\n" - "st1 { v23.d }[0], [x20]\n" - "ldr x20, [x16, #0x58]\n" - "add x20, x20, x12\n" - "st1 { v24.d }[0], [x23]\n" - "ldr x23, [x16, #0x60]\n" - "add x23, x23, x12\n" - "st1 { v25.d }[0], [x22]\n" - "ldr x22, [x16, #0x68]\n" - "add x22, x22, x12\n" - "st1 { v26.d }[0], [x21]\n" - "ldr x21, [x16, #0x70]\n" - "add x21, x21, x12\n" - "st1 { v27.d }[0], [x20]\n" - "ldr x20, [x16, #0x78]\n" - "add x20, x20, x12\n" - "add x12, x12, #0x8\n" - "st1 { v28.d }[0], [x23]\n" - "st1 { v29.d }[0], [x22]\n" - "st1 { v30.d }[0], [x21]\n" - "st1 { v31.d }[0], [x20]\n" + "ldr x22, [x15, #0x0]\n" + "ldr x21, [x15, #0x8]\n" + "ldr x20, [x15, #0x10]\n" + "add x22, x22, x11\n" + "add x21, x21, x11\n" + "ldr x19, [x15, #0x18]\n" + "add x20, x20, x11\n" + "add x19, x19, x11\n" + "st1 { v16.d }[0], [x22]\n" + "st1 { v17.d }[0], [x21]\n" + "ldr x22, [x15, #0x20]\n" + "ldr x21, [x15, #0x28]\n" + "add x22, x22, x11\n" + "st1 { v18.d }[0], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x21, x21, x11\n" + "add x20, x20, x11\n" + "st1 { v19.d }[0], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v20.d }[0], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "st1 { v21.d }[0], [x21]\n" + "ldr x21, [x15, #0x48]\n" + "add x21, x21, x11\n" + "st1 { v22.d }[0], [x20]\n" + "ldr x20, [x15, #0x50]\n" + "add x20, x20, x11\n" + "st1 { v23.d }[0], [x19]\n" + "ldr x19, [x15, #0x58]\n" + "add x19, x19, x11\n" + "st1 { v24.d }[0], [x22]\n" + "ldr x22, [x15, #0x60]\n" + "add x22, x22, x11\n" + "st1 { v25.d }[0], [x21]\n" + "ldr x21, [x15, #0x68]\n" + "add x21, x21, x11\n" + "st1 { v26.d }[0], [x20]\n" + "ldr x20, [x15, #0x70]\n" + "add x20, x20, x11\n" + "st1 { v27.d }[0], [x19]\n" + "ldr x19, [x15, #0x78]\n" + "add x19, x19, x11\n" + "add x11, x11, #0x8\n" + "st1 { v28.d }[0], [x22]\n" + "st1 { v29.d }[0], [x21]\n" + "st1 { v30.d }[0], [x20]\n" + "st1 { v31.d }[0], [x19]\n" "tbz %x[n_channels], #1, 136f\n" - "ldr x23, [x16, #0x0]\n" - "ldr x22, [x16, #0x8]\n" - "add x23, x23, x12\n" - "add x22, x22, x12\n" - "ldr x21, [x16, #0x10]\n" - "ldr x20, [x16, #0x18]\n" - "add x21, x21, x12\n" - "add x20, x20, x12\n" - "st1 { v16.s }[2], [x23]\n" - "ldr x23, [x16, #0x20]\n" - "add x23, x23, x12\n" - "st1 { v17.s }[2], [x22]\n" - "ldr x22, [x16, #0x28]\n" - "add x22, x22, x12\n" - "st1 { v18.s }[2], [x21]\n" - "ldr x21, [x16, #0x30]\n" - "add x21, x21, x12\n" - "st1 { v19.s }[2], [x20]\n" - "ldr x20, [x16, #0x38]\n" - "add x20, x20, x12\n" - "st1 { v20.s }[2], [x23]\n" - "ldr x23, [x16, #0x40]\n" - "add x23, x23, x12\n" - "st1 { v21.s }[2], [x22]\n" - "ldr x22, [x16, #0x48]\n" - "add x22, x22, x12\n" - "st1 { v22.s }[2], [x21]\n" - "ldr x21, [x16, #0x50]\n" - "add x21, x21, x12\n" - "st1 { v23.s }[2], [x20]\n" - "ldr x20, [x16, #0x58]\n" - "add x20, x20, x12\n" - "st1 { v24.s }[2], [x23]\n" - "ldr x23, [x16, #0x60]\n" - "add x23, x23, x12\n" - "st1 { v25.s }[2], [x22]\n" - "ldr x22, [x16, #0x68]\n" - "add x22, x22, x12\n" - "st1 { v26.s }[2], [x21]\n" - "ldr x21, [x16, #0x70]\n" - "add x21, x21, x12\n" - "st1 { v27.s }[2], [x20]\n" - "ldr x20, [x16, #0x78]\n" - "add x20, x20, x12\n" - "add x12, x12, #0x4\n" - "st1 { v28.s }[2], [x23]\n" - "st1 { v29.s }[2], [x22]\n" - "st1 { v30.s }[2], [x21]\n" - "st1 { v31.s }[2], [x20]\n" + "ldr x22, [x15, #0x0]\n" + "ldr x21, [x15, #0x8]\n" + "ldr x20, [x15, #0x10]\n" + "ldr x19, [x15, #0x18]\n" + "add x22, x22, x11\n" + "add x21, x21, x11\n" + "add x20, x20, x11\n" + "add x19, x19, x11\n" + "st1 { v16.s }[2], [x22]\n" + "ldr x22, [x15, #0x20]\n" + "st1 { v17.s }[2], [x21]\n" + "ldr x21, [x15, #0x28]\n" + "add x22, x22, x11\n" + "add x21, x21, x11\n" + "st1 { v18.s }[2], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x20, x20, x11\n" + "st1 { v19.s }[2], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v20.s }[2], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "st1 { v21.s }[2], [x21]\n" + "ldr x21, [x15, #0x48]\n" + "add x21, x21, x11\n" + "st1 { v22.s }[2], [x20]\n" + "ldr x20, [x15, #0x50]\n" + "add x20, x20, x11\n" + "st1 { v23.s }[2], [x19]\n" + "ldr x19, [x15, #0x58]\n" + "add x19, x19, x11\n" + "st1 { v24.s }[2], [x22]\n" + "ldr x22, [x15, #0x60]\n" + "add x22, x22, x11\n" + "st1 { v25.s }[2], [x21]\n" + "ldr x21, [x15, #0x68]\n" + "add x21, x21, x11\n" + "st1 { v26.s }[2], [x20]\n" + "ldr x20, [x15, #0x70]\n" + "add x20, x20, x11\n" + "st1 { v27.s }[2], [x19]\n" + "ldr x19, [x15, #0x78]\n" + "add x19, x19, x11\n" + "add x11, x11, #0x4\n" + "st1 { v28.s }[2], [x22]\n" + "st1 { v29.s }[2], [x21]\n" + "st1 { v30.s }[2], [x20]\n" + "st1 { v31.s }[2], [x19]\n" "tbz %x[n_channels], #0, 139f\n" - "ldr x23, [x16, #0x0]\n" - "ldr x22, [x16, #0x8]\n" - "add x23, x23, x12\n" - "add x22, x22, x12\n" - "ldr x21, [x16, #0x10]\n" - "ldr x20, [x16, #0x18]\n" - "add x21, x21, x12\n" - "add x20, x20, x12\n" - "st1 { v16.h }[6], [x23]\n" - "ldr x23, [x16, #0x20]\n" - "add x23, x23, x12\n" - "st1 { v17.h }[6], [x22]\n" - "ldr x22, [x16, #0x28]\n" - "add x22, x22, x12\n" - "st1 { v18.h }[6], [x21]\n" - "ldr x21, [x16, #0x30]\n" - "add x21, x21, x12\n" - "st1 { v19.h }[6], [x20]\n" - "ldr x20, [x16, #0x38]\n" - "add x20, x20, x12\n" - "st1 { v20.h }[6], [x23]\n" - "ldr x23, [x16, #0x40]\n" - "add x23, x23, x12\n" - "st1 { v21.h }[6], [x22]\n" - "ldr x22, [x16, #0x48]\n" - "add x22, x22, x12\n" - "st1 { v22.h }[6], [x21]\n" - "ldr x21, [x16, #0x50]\n" - "add x21, x21, x12\n" - "st1 { v23.h }[6], [x20]\n" - "ldr x20, [x16, #0x58]\n" - "add x20, x20, x12\n" - "st1 { v24.h }[6], [x23]\n" - "ldr x23, [x16, #0x60]\n" - "add x23, x23, x12\n" - "st1 { v25.h }[6], [x22]\n" - "ldr x22, [x16, #0x68]\n" - "add x22, x22, x12\n" - "st1 { v26.h }[6], [x21]\n" - "ldr x21, [x16, #0x70]\n" - "add x21, x21, x12\n" - "st1 { v27.h }[6], [x20]\n" - "ldr x20, [x16, #0x78]\n" - "add x20, x20, x12\n" - "st1 { v28.h }[6], [x23]\n" - "st1 { v29.h }[6], [x22]\n" - "st1 { v30.h }[6], [x21]\n" - "st1 { v31.h }[6], [x20]\n" + "ldr x22, [x15, #0x0]\n" + "ldr x21, [x15, #0x8]\n" + "ldr x20, [x15, #0x10]\n" + "ldr x19, [x15, #0x18]\n" + "add x22, x22, x11\n" + "add x21, x21, x11\n" + "add x20, x20, x11\n" + "add x19, x19, x11\n" + "st1 { v16.h }[6], [x22]\n" + "ldr x22, [x15, #0x20]\n" + "st1 { v17.h }[6], [x21]\n" + "ldr x21, [x15, #0x28]\n" + "add x22, x22, x11\n" + "add x21, x21, x11\n" + "st1 { v18.h }[6], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x20, x20, x11\n" + "st1 { v19.h }[6], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v20.h }[6], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "st1 { v21.h }[6], [x21]\n" + "ldr x21, [x15, #0x48]\n" + "add x21, x21, x11\n" + "st1 { v22.h }[6], [x20]\n" + "ldr x20, [x15, #0x50]\n" + "add x20, x20, x11\n" + "st1 { v23.h }[6], [x19]\n" + "ldr x19, [x15, #0x58]\n" + "add x19, x19, x11\n" + "st1 { v24.h }[6], [x22]\n" + "ldr x22, [x15, #0x60]\n" + "add x22, x22, x11\n" + "st1 { v25.h }[6], [x21]\n" + "ldr x21, [x15, #0x68]\n" + "add x21, x21, x11\n" + "st1 { v26.h }[6], [x20]\n" + "ldr x20, [x15, #0x70]\n" + "add x20, x20, x11\n" + "st1 { v27.h }[6], [x19]\n" + "ldr x19, [x15, #0x78]\n" + "add x19, x19, x11\n" + "st1 { v28.h }[6], [x22]\n" + "st1 { v29.h }[6], [x21]\n" + "st1 { v30.h }[6], [x20]\n" + "st1 { v31.h }[6], [x19]\n" "b 139f\n" "136:" // Oddments: Store: Bit 2: Bit 1: Unset "tbz %x[n_channels], #0, 139f\n" - "ldr x23, [x16, #0x0]\n" - "ldr x22, [x16, #0x8]\n" - "add x23, x23, x12\n" - "add x22, x22, x12\n" - "ldr x21, [x16, #0x10]\n" - "ldr x20, [x16, #0x18]\n" - "add x21, x21, x12\n" - "add x20, x20, x12\n" - "st1 { v16.h }[4], [x23]\n" - "ldr x23, [x16, #0x20]\n" - "add x23, x23, x12\n" - "st1 { v17.h }[4], [x22]\n" - "ldr x22, [x16, #0x28]\n" - "add x22, x22, x12\n" - "st1 { v18.h }[4], [x21]\n" - "ldr x21, [x16, #0x30]\n" - "add x21, x21, x12\n" - "st1 { v19.h }[4], [x20]\n" - "ldr x20, [x16, #0x38]\n" - "add x20, x20, x12\n" - "st1 { v20.h }[4], [x23]\n" - "ldr x23, [x16, #0x40]\n" - "add x23, x23, x12\n" - "st1 { v21.h }[4], [x22]\n" - "ldr x22, [x16, #0x48]\n" - "add x22, x22, x12\n" - "st1 { v22.h }[4], [x21]\n" - "ldr x21, [x16, #0x50]\n" - "add x21, x21, x12\n" - "st1 { v23.h }[4], [x20]\n" - "ldr x20, [x16, #0x58]\n" - "add x20, x20, x12\n" - "st1 { v24.h }[4], [x23]\n" - "ldr x23, [x16, #0x60]\n" - "add x23, x23, x12\n" - "st1 { v25.h }[4], [x22]\n" - "ldr x22, [x16, #0x68]\n" - "add x22, x22, x12\n" - "st1 { v26.h }[4], [x21]\n" - "ldr x21, [x16, #0x70]\n" - "add x21, x21, x12\n" - "st1 { v27.h }[4], [x20]\n" - "ldr x20, [x16, #0x78]\n" - "add x20, x20, x12\n" - "st1 { v28.h }[4], [x23]\n" - "st1 { v29.h }[4], [x22]\n" - "st1 { v30.h }[4], [x21]\n" - "st1 { v31.h }[4], [x20]\n" + "ldr x22, [x15, #0x0]\n" + "ldr x21, [x15, #0x8]\n" + "add x22, x22, x11\n" + "ldr x20, [x15, #0x10]\n" + "ldr x19, [x15, #0x18]\n" + "add x21, x21, x11\n" + "add x20, x20, x11\n" + "add x19, x19, x11\n" + "st1 { v16.h }[4], [x22]\n" + "ldr x22, [x15, #0x20]\n" + "add x22, x22, x11\n" + "st1 { v17.h }[4], [x21]\n" + "ldr x21, [x15, #0x28]\n" + "add x21, x21, x11\n" + "st1 { v18.h }[4], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x20, x20, x11\n" + "st1 { v19.h }[4], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v20.h }[4], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "st1 { v21.h }[4], [x21]\n" + "ldr x21, [x15, #0x48]\n" + "add x21, x21, x11\n" + "st1 { v22.h }[4], [x20]\n" + "ldr x20, [x15, #0x50]\n" + "add x20, x20, x11\n" + "st1 { v23.h }[4], [x19]\n" + "ldr x19, [x15, #0x58]\n" + "add x19, x19, x11\n" + "st1 { v24.h }[4], [x22]\n" + "ldr x22, [x15, #0x60]\n" + "add x22, x22, x11\n" + "st1 { v25.h }[4], [x21]\n" + "ldr x21, [x15, #0x68]\n" + "add x21, x21, x11\n" + "st1 { v26.h }[4], [x20]\n" + "ldr x20, [x15, #0x70]\n" + "add x20, x20, x11\n" + "st1 { v27.h }[4], [x19]\n" + "ldr x19, [x15, #0x78]\n" + "add x19, x19, x11\n" + "st1 { v28.h }[4], [x22]\n" + "st1 { v29.h }[4], [x21]\n" + "st1 { v30.h }[4], [x20]\n" + "st1 { v31.h }[4], [x19]\n" "b 139f\n" "137:" // Oddments: Store: Bit 2: Unset "tbz %x[n_channels], #1, 138f\n" - "ldr x23, [x16, #0x0]\n" - "ldr x22, [x16, #0x8]\n" - "add x23, x23, x12\n" - "add x22, x22, x12\n" - "ldr x21, [x16, #0x10]\n" - "ldr x20, [x16, #0x18]\n" - "add x21, x21, x12\n" - "add x20, x20, x12\n" - "st1 { v16.s }[0], [x23]\n" - "ldr x23, [x16, #0x20]\n" - "add x23, x23, x12\n" - "st1 { v17.s }[0], [x22]\n" - "ldr x22, [x16, #0x28]\n" - "add x22, x22, x12\n" - "st1 { v18.s }[0], [x21]\n" - "ldr x21, [x16, #0x30]\n" - "add x21, x21, x12\n" - "st1 { v19.s }[0], [x20]\n" - "ldr x20, [x16, #0x38]\n" - "add x20, x20, x12\n" - "st1 { v20.s }[0], [x23]\n" - "ldr x23, [x16, #0x40]\n" - "add x23, x23, x12\n" - "st1 { v21.s }[0], [x22]\n" - "ldr x22, [x16, #0x48]\n" - "add x22, x22, x12\n" - "st1 { v22.s }[0], [x21]\n" - "ldr x21, [x16, #0x50]\n" - "add x21, x21, x12\n" - "st1 { v23.s }[0], [x20]\n" - "ldr x20, [x16, #0x58]\n" - "add x20, x20, x12\n" - "st1 { v24.s }[0], [x23]\n" - "ldr x23, [x16, #0x60]\n" - "add x23, x23, x12\n" - "st1 { v25.s }[0], [x22]\n" - "ldr x22, [x16, #0x68]\n" - "add x22, x22, x12\n" - "st1 { v26.s }[0], [x21]\n" - "ldr x21, [x16, #0x70]\n" - "add x21, x21, x12\n" - "st1 { v27.s }[0], [x20]\n" - "ldr x20, [x16, #0x78]\n" - "add x20, x20, x12\n" - "add x12, x12, #0x4\n" - "st1 { v28.s }[0], [x23]\n" - "st1 { v29.s }[0], [x22]\n" - "st1 { v30.s }[0], [x21]\n" - "st1 { v31.s }[0], [x20]\n" + "ldr x22, [x15, #0x0]\n" + "ldr x21, [x15, #0x8]\n" + "add x22, x22, x11\n" + "ldr x20, [x15, #0x10]\n" + "ldr x19, [x15, #0x18]\n" + "add x21, x21, x11\n" + "add x20, x20, x11\n" + "add x19, x19, x11\n" + "st1 { v16.s }[0], [x22]\n" + "ldr x22, [x15, #0x20]\n" + "add x22, x22, x11\n" + "st1 { v17.s }[0], [x21]\n" + "ldr x21, [x15, #0x28]\n" + "add x21, x21, x11\n" + "st1 { v18.s }[0], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x20, x20, x11\n" + "st1 { v19.s }[0], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v20.s }[0], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "st1 { v21.s }[0], [x21]\n" + "ldr x21, [x15, #0x48]\n" + "add x21, x21, x11\n" + "st1 { v22.s }[0], [x20]\n" + "ldr x20, [x15, #0x50]\n" + "add x20, x20, x11\n" + "st1 { v23.s }[0], [x19]\n" + "ldr x19, [x15, #0x58]\n" + "add x19, x19, x11\n" + "st1 { v24.s }[0], [x22]\n" + "ldr x22, [x15, #0x60]\n" + "add x22, x22, x11\n" + "st1 { v25.s }[0], [x21]\n" + "ldr x21, [x15, #0x68]\n" + "add x21, x21, x11\n" + "st1 { v26.s }[0], [x20]\n" + "ldr x20, [x15, #0x70]\n" + "add x20, x20, x11\n" + "st1 { v27.s }[0], [x19]\n" + "ldr x19, [x15, #0x78]\n" + "add x19, x19, x11\n" + "add x11, x11, #0x4\n" + "st1 { v28.s }[0], [x22]\n" + "st1 { v29.s }[0], [x21]\n" + "st1 { v30.s }[0], [x20]\n" + "st1 { v31.s }[0], [x19]\n" "tbz %x[n_channels], #0, 139f\n" - "ldr x23, [x16, #0x0]\n" - "ldr x22, [x16, #0x8]\n" - "add x23, x23, x12\n" - "add x22, x22, x12\n" - "ldr x21, [x16, #0x10]\n" - "ldr x20, [x16, #0x18]\n" - "add x21, x21, x12\n" - "add x20, x20, x12\n" - "st1 { v16.h }[2], [x23]\n" - "ldr x23, [x16, #0x20]\n" - "add x23, x23, x12\n" - "st1 { v17.h }[2], [x22]\n" - "ldr x22, [x16, #0x28]\n" - "add x22, x22, x12\n" - "st1 { v18.h }[2], [x21]\n" - "ldr x21, [x16, #0x30]\n" - "add x21, x21, x12\n" - "st1 { v19.h }[2], [x20]\n" - "ldr x20, [x16, #0x38]\n" - "add x20, x20, x12\n" - "st1 { v20.h }[2], [x23]\n" - "ldr x23, [x16, #0x40]\n" - "add x23, x23, x12\n" - "st1 { v21.h }[2], [x22]\n" - "ldr x22, [x16, #0x48]\n" - "add x22, x22, x12\n" - "st1 { v22.h }[2], [x21]\n" - "ldr x21, [x16, #0x50]\n" - "add x21, x21, x12\n" - "st1 { v23.h }[2], [x20]\n" - "ldr x20, [x16, #0x58]\n" - "add x20, x20, x12\n" - "st1 { v24.h }[2], [x23]\n" - "ldr x23, [x16, #0x60]\n" - "add x23, x23, x12\n" - "st1 { v25.h }[2], [x22]\n" - "ldr x22, [x16, #0x68]\n" - "add x22, x22, x12\n" - "st1 { v26.h }[2], [x21]\n" - "ldr x21, [x16, #0x70]\n" - "add x21, x21, x12\n" - "st1 { v27.h }[2], [x20]\n" - "ldr x20, [x16, #0x78]\n" - "add x20, x20, x12\n" - "st1 { v28.h }[2], [x23]\n" - "st1 { v29.h }[2], [x22]\n" - "st1 { v30.h }[2], [x21]\n" - "st1 { v31.h }[2], [x20]\n" + "ldr x22, [x15, #0x0]\n" + "ldr x21, [x15, #0x8]\n" + "ldr x20, [x15, #0x10]\n" + "ldr x19, [x15, #0x18]\n" + "add x22, x22, x11\n" + "add x21, x21, x11\n" + "add x20, x20, x11\n" + "add x19, x19, x11\n" + "st1 { v16.h }[2], [x22]\n" + "ldr x22, [x15, #0x20]\n" + "st1 { v17.h }[2], [x21]\n" + "ldr x21, [x15, #0x28]\n" + "add x22, x22, x11\n" + "add x21, x21, x11\n" + "st1 { v18.h }[2], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x20, x20, x11\n" + "st1 { v19.h }[2], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v20.h }[2], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "st1 { v21.h }[2], [x21]\n" + "ldr x21, [x15, #0x48]\n" + "add x21, x21, x11\n" + "st1 { v22.h }[2], [x20]\n" + "ldr x20, [x15, #0x50]\n" + "add x20, x20, x11\n" + "st1 { v23.h }[2], [x19]\n" + "ldr x19, [x15, #0x58]\n" + "add x19, x19, x11\n" + "st1 { v24.h }[2], [x22]\n" + "ldr x22, [x15, #0x60]\n" + "add x22, x22, x11\n" + "st1 { v25.h }[2], [x21]\n" + "ldr x21, [x15, #0x68]\n" + "add x21, x21, x11\n" + "st1 { v26.h }[2], [x20]\n" + "ldr x20, [x15, #0x70]\n" + "add x20, x20, x11\n" + "st1 { v27.h }[2], [x19]\n" + "ldr x19, [x15, #0x78]\n" + "add x19, x19, x11\n" + "st1 { v28.h }[2], [x22]\n" + "st1 { v29.h }[2], [x21]\n" + "st1 { v30.h }[2], [x20]\n" + "st1 { v31.h }[2], [x19]\n" "b 139f\n" "138:" // Oddments: Store: Bit 2: Unset: Bit 1: Unset - "ldr x23, [x16, #0x0]\n" - "ldr x22, [x16, #0x8]\n" - "add x23, x23, x12\n" - "add x22, x22, x12\n" - "ldr x21, [x16, #0x10]\n" - "ldr x20, [x16, #0x18]\n" - "add x21, x21, x12\n" - "add x20, x20, x12\n" - "st1 { v16.h }[0], [x23]\n" - "ldr x23, [x16, #0x20]\n" - "add x23, x23, x12\n" - "st1 { v17.h }[0], [x22]\n" - "ldr x22, [x16, #0x28]\n" - "add x22, x22, x12\n" - "st1 { v18.h }[0], [x21]\n" - "ldr x21, [x16, #0x30]\n" - "add x21, x21, x12\n" - "st1 { v19.h }[0], [x20]\n" - "ldr x20, [x16, #0x38]\n" - "add x20, x20, x12\n" - "st1 { v20.h }[0], [x23]\n" - "ldr x23, [x16, #0x40]\n" - "add x23, x23, x12\n" - "st1 { v21.h }[0], [x22]\n" - "ldr x22, [x16, #0x48]\n" - "add x22, x22, x12\n" - "st1 { v22.h }[0], [x21]\n" - "ldr x21, [x16, #0x50]\n" - "add x21, x21, x12\n" - "st1 { v23.h }[0], [x20]\n" - "ldr x20, [x16, #0x58]\n" - "add x20, x20, x12\n" - "st1 { v24.h }[0], [x23]\n" - "ldr x23, [x16, #0x60]\n" - "add x23, x23, x12\n" - "st1 { v25.h }[0], [x22]\n" - "ldr x22, [x16, #0x68]\n" - "add x22, x22, x12\n" - "st1 { v26.h }[0], [x21]\n" - "ldr x21, [x16, #0x70]\n" - "add x21, x21, x12\n" - "st1 { v27.h }[0], [x20]\n" - "ldr x20, [x16, #0x78]\n" - "add x20, x20, x12\n" - "st1 { v28.h }[0], [x23]\n" - "st1 { v29.h }[0], [x22]\n" - "st1 { v30.h }[0], [x21]\n" - "st1 { v31.h }[0], [x20]\n" + "ldr x22, [x15, #0x0]\n" + "ldr x21, [x15, #0x8]\n" + "add x22, x22, x11\n" + "add x21, x21, x11\n" + "ldr x20, [x15, #0x10]\n" + "ldr x19, [x15, #0x18]\n" + "add x20, x20, x11\n" + "add x19, x19, x11\n" + "st1 { v16.h }[0], [x22]\n" + "ldr x22, [x15, #0x20]\n" + "add x22, x22, x11\n" + "st1 { v17.h }[0], [x21]\n" + "ldr x21, [x15, #0x28]\n" + "add x21, x21, x11\n" + "st1 { v18.h }[0], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x20, x20, x11\n" + "st1 { v19.h }[0], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v20.h }[0], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "st1 { v21.h }[0], [x21]\n" + "ldr x21, [x15, #0x48]\n" + "add x21, x21, x11\n" + "st1 { v22.h }[0], [x20]\n" + "ldr x20, [x15, #0x50]\n" + "add x20, x20, x11\n" + "st1 { v23.h }[0], [x19]\n" + "ldr x19, [x15, #0x58]\n" + "add x19, x19, x11\n" + "st1 { v24.h }[0], [x22]\n" + "ldr x22, [x15, #0x60]\n" + "add x22, x22, x11\n" + "st1 { v25.h }[0], [x21]\n" + "ldr x21, [x15, #0x68]\n" + "add x21, x21, x11\n" + "st1 { v26.h }[0], [x20]\n" + "ldr x20, [x15, #0x70]\n" + "add x20, x20, x11\n" + "st1 { v27.h }[0], [x19]\n" + "ldr x19, [x15, #0x78]\n" + "add x19, x19, x11\n" + "st1 { v28.h }[0], [x22]\n" + "st1 { v29.h }[0], [x21]\n" + "st1 { v30.h }[0], [x20]\n" + "st1 { v31.h }[0], [x19]\n" "139:" // Oddments: Store: Bit 2: End "140:" // End : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_Args_inptrs] "I" (offsetof(Args, inptrs)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_args_params] "I" (offsetof(Args, params)), [params_struct] "r" (¶ms_struct) - : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" + : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" ); } |