diff options
| author | Vidhya Sudhan Loganathan <vidhyasudhan.loganathan@arm.com> | 2018-07-04 09:34:00 +0100 |
|---|---|---|
| committer | Anthony Barbier <anthony.barbier@arm.com> | 2018-11-02 16:54:10 +0000 |
| commit | 7485d5a62685cb745ab50e970adb722cb71557ac (patch) | |
| tree | ba01b99ca466c93edc9a3f8c1e34394ff84be060 /src/core/NEON/kernels/NEDepthConcatenateLayerKernel.cpp | |
| parent | 014333d73883c3872e458cedda5ccef586a7ccd4 (diff) | |
| download | ComputeLibrary-7485d5a62685cb745ab50e970adb722cb71557ac.tar.gz | |
COMPMID-970 : Remove QS8 / QS16 support
Removed fixed point related code.
Change-Id: I487acf138dace3b0450e0d72ca7071eaec254566
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/137678
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Diffstat (limited to 'src/core/NEON/kernels/NEDepthConcatenateLayerKernel.cpp')
| -rw-r--r-- | src/core/NEON/kernels/NEDepthConcatenateLayerKernel.cpp | 17 |
1 files changed, 2 insertions, 15 deletions
diff --git a/src/core/NEON/kernels/NEDepthConcatenateLayerKernel.cpp b/src/core/NEON/kernels/NEDepthConcatenateLayerKernel.cpp index 891a03c5cc..38443ca4a8 100644 --- a/src/core/NEON/kernels/NEDepthConcatenateLayerKernel.cpp +++ b/src/core/NEON/kernels/NEDepthConcatenateLayerKernel.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, 2018 ARM Limited. + * Copyright (c) 2017-2018 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -41,10 +41,6 @@ using namespace arm_compute; namespace { // Overloads of 128-bit vector loads -uint8x16_t loadq(const uint8_t *ptr) -{ - return vld1q_u8(ptr); -} uint16x8_t loadq(const uint16_t *ptr) { return vld1q_u16(ptr); @@ -54,10 +50,6 @@ uint32x4_t loadq(const uint32_t *ptr) return vld1q_u32(ptr); } // Overloads of 128-bit vector stores -void storeq(uint8_t *ptr, uint8x16_t val) -{ - return vst1q_u8(ptr, val); -} void storeq(uint16_t *ptr, uint16x8_t val) { return vst1q_u16(ptr, val); @@ -107,9 +99,8 @@ BorderSize NEDepthConcatenateLayerKernel::border_size() const void NEDepthConcatenateLayerKernel::configure(const ITensor *input, unsigned int depth_offset, ITensor *output) { - ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::QS8, DataType::QS16, DataType::F16, DataType::F32); + ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::F16, DataType::F32); ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input, output); - ARM_COMPUTE_ERROR_ON_MISMATCHING_FIXED_POINT_POSITION(input, output); ARM_COMPUTE_ERROR_ON(input->info()->dimension(2) + depth_offset > output->info()->dimension(2)); ARM_COMPUTE_ERROR_ON(input->info()->dimension(0) > output->info()->dimension(0)); ARM_COMPUTE_ERROR_ON(input->info()->dimension(1) > output->info()->dimension(1)); @@ -129,10 +120,6 @@ void NEDepthConcatenateLayerKernel::configure(const ITensor *input, unsigned int switch(input->info()->data_type()) { - case DataType::QS8: - _func = &depth_concat<uint8_t>; - break; - case DataType::QS16: case DataType::F16: _func = &depth_concat<uint16_t>; break; |