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| author | SiCongLi <sicong.li@arm.com> | 2021-02-24 15:40:57 +0000 |
|---|---|---|
| committer | SiCong Li <sicong.li@arm.com> | 2021-03-08 09:39:14 +0000 |
| commit | b88272e2dcf09803cd275cfeb5ca1ea743a091ff (patch) | |
| tree | 6637bef6d413bc513ffa451b0993102d7da57f4d /src/core/NEON/kernels/NEBitwiseXorKernel.cpp | |
| parent | c7b1e84ac5f3ada1b2f78c66979ef4d44804a955 (diff) | |
| download | ComputeLibrary-b88272e2dcf09803cd275cfeb5ca1ea743a091ff.tar.gz | |
Remove usage of valid window region in NHWC CPU kernels - Part2
Remove set_valid_region methods from all NHWC CPU ML functions /
operators / kernels
Resolves COMPMID-4152 (2/2)
Change-Id: If9725e9c5b0213b87db96675e81b7fb724970b98
Signed-off-by: SiCongLi <sicong.li@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5203
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/core/NEON/kernels/NEBitwiseXorKernel.cpp')
| -rw-r--r-- | src/core/NEON/kernels/NEBitwiseXorKernel.cpp | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/src/core/NEON/kernels/NEBitwiseXorKernel.cpp b/src/core/NEON/kernels/NEBitwiseXorKernel.cpp index 603b49d5eb..fc5b38b64f 100644 --- a/src/core/NEON/kernels/NEBitwiseXorKernel.cpp +++ b/src/core/NEON/kernels/NEBitwiseXorKernel.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2020 Arm Limited. + * Copyright (c) 2016-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -84,10 +84,6 @@ void NEBitwiseXorKernel::configure(const ITensor *input1, const ITensor *input2, update_window_and_padding(win, AccessWindowHorizontal(input1->info(), 0, num_elems_processed_per_iteration), AccessWindowHorizontal(input2->info(), 0, num_elems_processed_per_iteration), output_access); - const ValidRegion valid_region = intersect_valid_regions(input1->info()->valid_region(), input2->info()->valid_region()); - - output_access.set_valid_region(win, valid_region); - INEKernel::configure(win); } |