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| author | Georgios Pinitas <georgios.pinitas@arm.com> | 2021-06-25 05:42:57 +0100 |
|---|---|---|
| committer | Georgios Pinitas <georgios.pinitas@arm.com> | 2021-06-29 12:38:33 +0000 |
| commit | 5fdde99f4271891a40c02cd1e89f1344aa84583a (patch) | |
| tree | 35944b8bb0eee6aa9bbca08c38325f10cf66370c /src/core/NEON/kernels/NEBatchNormalizationLayerKernel.cpp | |
| parent | 4a95bba6ca61ce99995ece6fd237b5498c9f322c (diff) | |
| download | ComputeLibrary-5fdde99f4271891a40c02cd1e89f1344aa84583a.tar.gz | |
Improve selection speed of CPU implementations
CPU micro-kernel to be used was picked during kernel execution.
Move selection during configuration to reduce runtime overhead.
Standardize kernel names as follows:
<simd_tech>_<data_type>_<data_layout>_<kernel_name>
e.g. sve_fp32_nhwc_scale
Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com>
Change-Id: I544f1c08c8fef0f130a3bde61882ccb9a1f47f21
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5855
Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/core/NEON/kernels/NEBatchNormalizationLayerKernel.cpp')
| -rw-r--r-- | src/core/NEON/kernels/NEBatchNormalizationLayerKernel.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/core/NEON/kernels/NEBatchNormalizationLayerKernel.cpp b/src/core/NEON/kernels/NEBatchNormalizationLayerKernel.cpp index 46551553c9..108b199df7 100644 --- a/src/core/NEON/kernels/NEBatchNormalizationLayerKernel.cpp +++ b/src/core/NEON/kernels/NEBatchNormalizationLayerKernel.cpp @@ -66,12 +66,12 @@ static const BatchNormalizationKernel available_kernels[] = { #if defined(ARM_COMPUTE_ENABLE_SVE) { - "fp16_sve_batch_normalization", + "sve_fp16_batch_normalization", [](const BatchNormalizationSelectorData & data) { return data.dt == DataType::F16 && data.ci.has_sve(); }, REGISTER_FP16_SVE(arm_compute::cpu::fp16_sve_batch_normalization) }, { - "f32_sve_batch_normalization", + "sve_fp32_batch_normalization", [](const BatchNormalizationSelectorData & data) { return data.dt == DataType::F32 && data.ci.has_sve(); }, REGISTER_FP32_SVE(arm_compute::cpu::fp32_sve_batch_normalization) }, @@ -79,13 +79,13 @@ static const BatchNormalizationKernel available_kernels[] = #if defined(ARM_COMPUTE_ENABLE_NEON) #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) { - "fp16_neon_batch_normalization", + "neon_fp16_batch_normalization", [](const BatchNormalizationSelectorData & data) { return data.dt == DataType::F16; }, REGISTER_FP16_NEON(arm_compute::cpu::fp16_neon_batch_normalization) }, #endif /* __ARM_FEATURE_FP16_VECTOR_ARITHMETIC */ { - "f32_neon_batch_normalization", + "neon_fp32_batch_normalization", [](const BatchNormalizationSelectorData & data) { return data.dt == DataType::F32; }, REGISTER_FP32_NEON(arm_compute::cpu::fp32_neon_batch_normalization) }, |