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| author | Pablo Tello <pablo.tello@arm.com> | 2018-10-03 17:11:09 +0100 |
|---|---|---|
| committer | Anthony Barbier <anthony.barbier@arm.com> | 2018-11-02 16:55:19 +0000 |
| commit | d041a835041159a0a6744fc271df15e9f66167bc (patch) | |
| tree | 895f01d68218cbeabf639ef027d519fa4c96d655 /src/core/CL/kernels/CLDirectConvolutionLayerKernel.cpp | |
| parent | ecd9d09c7c77005586250587ec8e1ddb6f224bde (diff) | |
| download | ComputeLibrary-d041a835041159a0a6744fc271df15e9f66167bc.tar.gz | |
COMPMID-1610: Fixed CLDirectConvolution mismatches
Kernel size 5x5 layout NHWC.
Change-Id: Ia82ff211d1c954df228962b5c2c5ad8df7112449
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/151740
Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com>
Tested-by: bsgcomp <bsgcomp@arm.com>
Diffstat (limited to 'src/core/CL/kernels/CLDirectConvolutionLayerKernel.cpp')
| -rw-r--r-- | src/core/CL/kernels/CLDirectConvolutionLayerKernel.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/core/CL/kernels/CLDirectConvolutionLayerKernel.cpp b/src/core/CL/kernels/CLDirectConvolutionLayerKernel.cpp index c3d514adb4..471b3209ac 100644 --- a/src/core/CL/kernels/CLDirectConvolutionLayerKernel.cpp +++ b/src/core/CL/kernels/CLDirectConvolutionLayerKernel.cpp @@ -421,8 +421,7 @@ void CLDirectConvolutionLayerKernel::configure(const ICLTensor *input, const ICL } else { - bool is_quantized_asymm = is_data_type_quantized_asymmetric(data_type); - + const bool is_quantized_asymm = is_data_type_quantized_asymmetric(data_type); build_options.add_option_if(is_quantized_asymm, std::string("-DKERNEL_SIZE=" + support::cpp11::to_string(kernel_size))); build_options.add_option(std::string("-DDATA_TYPE=" + get_cl_type_from_data_type(data_type))); build_options.add_option(std::string("-DDATA_SIZE=" + get_data_size_from_data_type(data_type))); |