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author | Georgios Pinitas <georgios.pinitas@arm.com> | 2018-08-29 12:53:41 +0100 |
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committer | Anthony Barbier <anthony.barbier@arm.com> | 2018-11-02 16:54:54 +0000 |
commit | aa6a04a56f21ab8de23b24c5f9ee7cafeaef8320 (patch) | |
tree | e76cb18abd16960003b30da377bd5422847287b3 /arm_compute | |
parent | 72686fa6ee0f04d458ed2274b4d34917628ef14d (diff) | |
download | ComputeLibrary-aa6a04a56f21ab8de23b24c5f9ee7cafeaef8320.tar.gz |
COMPMID-1528: Add ReorgLayer on NEON
Change-Id: I44369b4a716767163e2233b7d87bff300c523383
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146314
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'arm_compute')
-rw-r--r-- | arm_compute/core/NEON/NEKernels.h | 1 | ||||
-rw-r--r-- | arm_compute/core/NEON/kernels/NEReorgLayerKernel.h | 96 | ||||
-rw-r--r-- | arm_compute/core/utils/misc/ShapeCalculator.h | 16 | ||||
-rw-r--r-- | arm_compute/runtime/NEON/NEFunctions.h | 1 | ||||
-rw-r--r-- | arm_compute/runtime/NEON/functions/NEReorgLayer.h | 58 |
5 files changed, 172 insertions, 0 deletions
diff --git a/arm_compute/core/NEON/NEKernels.h b/arm_compute/core/NEON/NEKernels.h index 8664c7732c..bbeb604140 100644 --- a/arm_compute/core/NEON/NEKernels.h +++ b/arm_compute/core/NEON/NEKernels.h @@ -102,6 +102,7 @@ #include "arm_compute/core/NEON/kernels/NEROIPoolingLayerKernel.h" #include "arm_compute/core/NEON/kernels/NEReductionOperationKernel.h" #include "arm_compute/core/NEON/kernels/NERemapKernel.h" +#include "arm_compute/core/NEON/kernels/NEReorgLayerKernel.h" #include "arm_compute/core/NEON/kernels/NEReshapeLayerKernel.h" #include "arm_compute/core/NEON/kernels/NEScaleKernel.h" #include "arm_compute/core/NEON/kernels/NEScharr3x3Kernel.h" diff --git a/arm_compute/core/NEON/kernels/NEReorgLayerKernel.h b/arm_compute/core/NEON/kernels/NEReorgLayerKernel.h new file mode 100644 index 0000000000..323ab342b2 --- /dev/null +++ b/arm_compute/core/NEON/kernels/NEReorgLayerKernel.h @@ -0,0 +1,96 @@ +/* + * Copyright (c) 2018 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_NEREORGLAYERKERNEL_H__ +#define __ARM_COMPUTE_NEREORGLAYERKERNEL_H__ + +#include "arm_compute/core/NEON/INEKernel.h" + +namespace arm_compute +{ +// Forward declarations +class ITensor; + +/** Interface for the kernel to perform tensor re-organization */ +class NEReorgLayerKernel : public INEKernel +{ +public: + const char *name() const override + { + return "NEReorgLayerKernel"; + } + /** Default constructor */ + NEReorgLayerKernel(); + /** Prevent instances of this class from being copied (As this class contains pointers) */ + NEReorgLayerKernel(const NEReorgLayerKernel &) = delete; + /** Prevent instances of this class from being copied (As this class contains pointers) */ + NEReorgLayerKernel &operator=(const NEReorgLayerKernel &) = delete; + /** Default Move Constructor. */ + NEReorgLayerKernel(NEReorgLayerKernel &&) = default; + /** Default move assignment operator */ + NEReorgLayerKernel &operator=(NEReorgLayerKernel &&) = default; + /** Default destructor */ + ~NEReorgLayerKernel() = default; + /** Set the input and output of the kernel + * + * @param[in] input Source tensor. Data type supported: U8/S8/U16/S16/QASYMM8/U32/S32/F16/F32 + * @param[out] output Destination tensor. Data type supported: Same as @p input + * @param[in] stride Stride to be used during data re-organization + */ + void configure(const ITensor *input, ITensor *output, int32_t stride); + + /** Static function to check if given info will lead to a valid configuration of @ref NEReshapeLayerKernel + * + * @param[in] input Source tensor info. Data type supported: U8/S8/U16/S16/QASYMM8/U32/S32/F16/F32 + * @param[in] output Destination tensor info. Data type supported: Same as @p input + * @param[in] stride Stride to be used during data re-organization + * + * @return a status + */ + static Status validate(const ITensorInfo *input, const ITensorInfo *output, int32_t stride); + + // Inherited methods overridden: + void run(const Window &window, const ThreadInfo &info) override; + +private: + /** Template function to run the reorg + * + * @param[in] window Region on which to execute the kernel. (Must be a valid region of the window returned by window()). + */ + template <typename T> + void run_reorg(const Window &window); + + /** Common signature for all the specialised reorg functions + * + * @param[in] window Region on which to execute the kernel. + */ + using ReorgFunctionPtr = void (NEReorgLayerKernel::*)(const Window &window); + +private: + ReorgFunctionPtr _func; + const ITensor *_input; + ITensor *_output; + int32_t _stride; +}; +} // namespace arm_compute +#endif /*__ARM_COMPUTE_NEREORGLAYERKERNEL_H__ */ diff --git a/arm_compute/core/utils/misc/ShapeCalculator.h b/arm_compute/core/utils/misc/ShapeCalculator.h index 1a86d27727..9c7cfecd4c 100644 --- a/arm_compute/core/utils/misc/ShapeCalculator.h +++ b/arm_compute/core/utils/misc/ShapeCalculator.h @@ -57,6 +57,22 @@ inline TensorShape compute_permutation_output_shape(const ITensorInfo &input, co permute(output_shape, perm); return output_shape; } +inline TensorShape compute_reorg_output_shape(const ITensorInfo &input, int32_t stride) +{ + ARM_COMPUTE_ERROR_ON(stride <= 0); + + const DataLayout data_layout = input.data_layout(); + const unsigned int width_idx = get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH); + const unsigned int height_idx = get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT); + const unsigned int channel_idx = get_data_layout_dimension_index(data_layout, DataLayoutDimension::CHANNEL); + + TensorShape output_shape{ input.tensor_shape() }; + output_shape.set(width_idx, input.tensor_shape()[width_idx] / stride); + output_shape.set(height_idx, input.tensor_shape()[height_idx] / stride); + output_shape.set(channel_idx, input.tensor_shape()[channel_idx] * stride * stride); + + return output_shape; +} inline TensorShape compute_weights_reshaped_shape(const ITensorInfo &weights, bool has_bias = false, unsigned int num_groups = 1) { // Number of groups greater than one are only supported for NCHW data layout, and the number of weights must be a multiple of it. diff --git a/arm_compute/runtime/NEON/NEFunctions.h b/arm_compute/runtime/NEON/NEFunctions.h index dabd78c256..89a5c4aaaf 100644 --- a/arm_compute/runtime/NEON/NEFunctions.h +++ b/arm_compute/runtime/NEON/NEFunctions.h @@ -103,6 +103,7 @@ #include "arm_compute/runtime/NEON/functions/NEROIPoolingLayer.h" #include "arm_compute/runtime/NEON/functions/NEReductionOperation.h" #include "arm_compute/runtime/NEON/functions/NERemap.h" +#include "arm_compute/runtime/NEON/functions/NEReorgLayer.h" #include "arm_compute/runtime/NEON/functions/NEReshapeLayer.h" #include "arm_compute/runtime/NEON/functions/NEScale.h" #include "arm_compute/runtime/NEON/functions/NEScharr3x3.h" diff --git a/arm_compute/runtime/NEON/functions/NEReorgLayer.h b/arm_compute/runtime/NEON/functions/NEReorgLayer.h new file mode 100644 index 0000000000..f29b2f1964 --- /dev/null +++ b/arm_compute/runtime/NEON/functions/NEReorgLayer.h @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2018 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_NEREORGLAYER_H__ +#define __ARM_COMPUTE_NEREORGLAYER_H__ + +#include "arm_compute/core/Types.h" +#include "arm_compute/runtime/NEON/INESimpleFunction.h" + +namespace arm_compute +{ +// Forward declarations +class ITensor; + +/** Basic function to run @ref NEReorgLayerKernel */ +class NEReorgLayer : public INESimpleFunction +{ +public: + /** Initialise the kernel's inputs and outputs + * + * @param[in] input First tensor input. Data type supported: U8/S8/QASYMM8//U16/S16/U32/S32/F16/F32 + * @param[out] output Output tensor. Data type supported: Same as @p input + * @param[in] stride Stride to be used during data re-organization + */ + void configure(const ITensor *input, ITensor *output, int32_t stride); + + /** Static function to check if given info will lead to a valid configuration of @ref NEReorgLayer + * + * @param[in] input First tensor info. Data type supported: U8/S8/QASYMM8//U16/S16/U32/S32/F16/F32 + * @param[in] output Output tensor info. Data type supported: Same as @p input + * @param[in] stride Stride to be used during data re-organization + * + * @return a status + */ + static Status validate(const ITensorInfo *input, const ITensorInfo *output, int32_t stride); +}; +} // namespace arm_compute +#endif /*__ARM_COMPUTE_NEREORGLAYER_H__ */ |