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author | Georgios Pinitas <georgios.pinitas@arm.com> | 2019-12-10 13:33:18 +0000 |
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committer | Georgios Pinitas <georgios.pinitas@arm.com> | 2019-12-11 18:04:21 +0000 |
commit | 338435607fc5291ff991f38aa15d4df5097d1a2d (patch) | |
tree | a0c89e9d5fd78e994594b27978b0c8b285d6da4b /arm_compute/runtime/NEON/functions/NEGather.h | |
parent | 453f9d9e9be824aa0e4f80abc9a051d8038b0e56 (diff) | |
download | ComputeLibrary-338435607fc5291ff991f38aa15d4df5097d1a2d.tar.gz |
COMPMID-2754: Add support for QASYMM8_SIGNED in NE kernels/functions.
Kernels/Functions extended support:
- NEBatchToSpaceLayerKernel/NEBatchToSpaceLayer
- NEChannelShuffleLayerKernel/NEChannelShuffleLayer
- NECol2ImKernel/NECol2Im
- NEConvertFullyConnectedWeightsKernel/NEConvertFullyConnectedWeights
- NECopyKernel/NECopy
- NEConvolutionLayerReshapeWeights
- NEDepthToSpaceLayerKernel/NEDepthToSpaceLayer
- NEFlattenLayerKernel/NEFlattenLayer
- NEFillBorderKernel
- NEFullyConnectedLayerReshapeWeights
- NEGatherKernel/NEGather
- NEGEMMInterleave4x4Kernel
- NEGEMMTranspose1xWKernel
- NEIm2ColKernel/NEIm2Col
- NEMemsetKernel
- NEPadLayerKernel/NEPadLayer
- NEPermuteKernel/NEPermute
- NEReverseKernel/NEReverse
- NEReorgLayerKernel/NEReorgLayer
- NEReshapeLayerKernel/NEReshapeLayer
- NESplit
- NESlice
- NEStridedSliceKernel/NEStridedSlice
- NESpaceToBatchLayerKernel/NESpaceToBatchLayer
- NESpaceToDepthLayerKernel/NESpaceToDepthLayerKernel
- NEStackLayerKernel/NEStackLayer
- NETileKernel/NETile
- NETransposeKernel/NETranspose
- NEWidthConcatenateLayerKernel/NEHeightConcatenateLayer
- NEHeightConcatenateLayerKernel/NEHeightConcatenateLayer
- NEDepthConcatenateLayerKernel/NEDepthConcatenateLayer
- NEBathConcatenateLayerKernel/NEBatchConcatenateLayer
Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com>
Change-Id: Ia070332ad4c4dbced2541dc46f7f2f3a86833b65
Reviewed-on: https://review.mlplatform.org/c/2442
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'arm_compute/runtime/NEON/functions/NEGather.h')
-rw-r--r-- | arm_compute/runtime/NEON/functions/NEGather.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arm_compute/runtime/NEON/functions/NEGather.h b/arm_compute/runtime/NEON/functions/NEGather.h index 6b6072cd53..7ed45c0f15 100644 --- a/arm_compute/runtime/NEON/functions/NEGather.h +++ b/arm_compute/runtime/NEON/functions/NEGather.h @@ -30,6 +30,7 @@ namespace arm_compute { +// Forward declarations class ITensor; /** Basic function to run @ref NEGatherKernel */ @@ -38,7 +39,7 @@ class NEGather : public INESimpleFunctionNoBorder public: /** Initialise the kernel's inputs and outputs * - * @param[in] input Source tensor. Supported tensor rank: up to 4. Data type supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32 + * @param[in] input Source tensor. Supported tensor rank: up to 4. Data type supported: All * @param[in] indices Indices tensor. Supported tensor rank: up to 1. Must be one of the following type: U32/S32. Each value Must be in range [0, input.shape[@p axis]) * @param[out] output Destination tensor. Data type supported: Same as @p input * @param[in] axis (Optional) The axis in @p input to gather @p indices from. Defaults to 0 @@ -47,7 +48,7 @@ public: /** Static function to check if given info will lead to a valid configuration of @ref NEGatherKernel * - * @param[in] input Source tensor info. Supported tensor rank: up to 4. Data type supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32 + * @param[in] input Source tensor info. Supported tensor rank: up to 4. Data type supported: All * @param[in] indices Indices tensor info. Supported tensor rank: up to 1. Must be one of the following types: U32/S32. Each value Must be in range [0, input.shape[@p axis]) * @param[in] output Destination tensor info. Data type supported: Same as @p input * @param[in] axis (Optional) The axis in @p input to gather @p indices from. Defaults to 0 @@ -56,7 +57,6 @@ public: */ static Status validate(const ITensorInfo *input, const ITensorInfo *indices, const ITensorInfo *output, int axis); }; - } // namespace arm_compute #endif /* ARM_COMPUTE_NEGATHER_H */ |