COMPMID-1167: Validation for NEDepthwiseConvolutionLayer

Change-Id: I9689e1a0627dc015dd2ce98417e4c97bb55581bb
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/131327
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>

5 files changed, 62 insertions, 2 deletions

diff --git a/arm_compute/core/NEON/kernels/NEDepthwiseConvolutionLayer3x3Kernel.h b/arm_compute/core/NEON/kernels/NEDepthwiseConvolutionLayer3x3Kernel.h
index bd9e7eb781..3ffafd858f 100644
--- a/arm_compute/core/NEON/kernels/NEDepthwiseConvolutionLayer3x3Kernel.h
+++ b/arm_compute/core/NEON/kernels/NEDepthwiseConvolutionLayer3x3Kernel.h
@@ -53,8 +53,10 @@ public:
     NEDepthwiseConvolutionLayer3x3Kernel &operator=(NEDepthwiseConvolutionLayer3x3Kernel &&) = default;
     /** Initialize the function's source, destination, conv and border_size.
      *
+     * @note Supported data layouts: NCHW and NHWC
+     *
      * @param[in]  input            Source tensor. DataType supported: QASYMM8, F32.
-     * @param[in]  weights          Weights tensor. This is a 3D tensor with dimensions [3, 3, IFM]. Data type supported: Same as @p input.
+     * @param[in]  weights          Weights tensor. This is a 3D tensor with dimensions [3, 3, IFM] for NCHW or [IFM, 3, 3] if NHWC data layout. Data type supported: Same as @p input.
      * @param[out] output           Destination tensor. Data type supported: Same as @p input.
      * @param[in]  conv_info        Padding and stride information to use for the convolution.
      * @param[in]  depth_multiplier (Optional) Multiplier to apply to the input's depth in order to retrieve the output's depth. Defaults to 1.
@@ -66,8 +68,8 @@ public:
      * @param[in] input_shape      Input shape
      * @param[in] conv_info        Padding and stride information to use for the convolution.
      * @param[in] dt               Data type of the input and weights
-     * @param[in] data_layout      (Optional) Data layout of the input and weights tensor
      * @param[in] depth_multiplier (Optional) Multiplier to apply to the input's depth in order to retrieve the output's depth. Defaults to 1.
+     * @param[in] data_layout      (Optional) Data layout of the input and weights tensor
      *
      * @return True if the optimized kernels can be executed else false
      */
@@ -75,6 +77,20 @@ public:
     /** Generates the convolver object */
     void generate_convolver();
 
+    /** Static function to check if given info will lead to a valid configuration of @ref NEDepthwiseConvolutionLayer3x3Kernel
+     *
+     * @note Supported data layouts: NCHW and NHWC
+     *
+     * @param[in] input            Source tensor. DataType supported: QASYMM8, F32.
+     * @param[in] weights          Weights tensor. This is a 3D tensor with dimensions [3, 3, IFM] for NCHW or [IFM, 3, 3] if NHWC data layout. Data type supported: Same as @p input.
+     * @param[in] output           Destination tensor. Data type supported: Same as @p input.
+     * @param[in] conv_info        Padding and stride information to use for the convolution.
+     * @param[in] depth_multiplier (Optional) Multiplier to apply to the input's depth in order to retrieve the output's depth. Defaults to 1.
+     *
+     * @return a status
+     */
+    static Status validate(const ITensorInfo *input, const ITensorInfo *weights, const ITensorInfo *output, const PadStrideInfo &conv_info, unsigned int depth_multiplier = 1);
+
     // Inherited methods overridden:
     void run(const Window &window, const ThreadInfo &info) override;
     BorderSize border_size() const override;
@@ -82,6 +98,7 @@ public:
 private:
     void configure_generic();
     void configure_optimized();
+
     void run_generic(const Window &window, const ThreadInfo &info);
     void run_optimized(const Window &window, const ThreadInfo &info);
     /** Creates an optimized backend convolver object
diff --git a/arm_compute/core/NEON/kernels/NEDepthwiseIm2ColKernel.h b/arm_compute/core/NEON/kernels/NEDepthwiseIm2ColKernel.h
index 9c11cfa425..0d61d3ea38 100644
--- a/arm_compute/core/NEON/kernels/NEDepthwiseIm2ColKernel.h
+++ b/arm_compute/core/NEON/kernels/NEDepthwiseIm2ColKernel.h
@@ -65,6 +65,21 @@ public:
      */
     void configure(const ITensor *input, ITensor *output, const Size2D &kernel_dims, const PadStrideInfo &conv_info, bool has_bias = false, unsigned int depth_multiplier = 1);
 
+    /** Static function to check if given info will lead to a valid configuration of @ref NEDepthwiseIm2ColKernel
+     *
+     * @param[in] input            The input tensor to convert. 3 lower dimensions represent a single input [width, height, IFM],
+     *                             while every optional dimension from 4 and above represent a batch of inputs. Data types supported: QASYMM8, F32
+     * @param[in] output           The output tensor. First 3 lower dimensions represent a transform of each 3D input,
+     *                             while every dimension above 3 represents a batch. Data types supported: Same as @p input
+     * @param[in] kernel_dims      The kernel dimensions (width and height).
+     * @param[in] conv_info        Contains padding and stride information described in @ref PadStrideInfo.
+     * @param[in] has_bias         Boolean that specifies if the depthwise convolution has bias.
+     * @param[in] depth_multiplier (Optional) Multiplier to apply to the input's depth in order to retrieve the output's depth. Defaults to 1.
+     *
+     * @return a status
+     */
+    static Status validate(const ITensorInfo *input, const ITensorInfo *output, const Size2D &kernel_dims, const PadStrideInfo &conv_info, bool has_bias = false, unsigned int depth_multiplier = 1);
+
     // Inherited methods overridden:
     void run(const Window &window, const ThreadInfo &info) override;
 
diff --git a/arm_compute/core/NEON/kernels/NEDepthwiseVectorToTensorKernel.h b/arm_compute/core/NEON/kernels/NEDepthwiseVectorToTensorKernel.h
index 458cbd7812..00977a91b4 100644
--- a/arm_compute/core/NEON/kernels/NEDepthwiseVectorToTensorKernel.h
+++ b/arm_compute/core/NEON/kernels/NEDepthwiseVectorToTensorKernel.h
@@ -62,6 +62,14 @@ public:
      * @param[in]  conv_h The converted tensor's height.
      */
     void configure(const ITensor *input, ITensor *output, size_t conv_w, size_t conv_h);
+    /** Static function to check if given info will lead to a valid configuration of @ref NEDepthwiseVectorToTensorKernel
+     *
+     * @param[in] input  The input vector to convert. Data type supported: QASYMM8/S32/F32.
+     * @param[in] output The output tensor. 3 lower dimensions represent a single input [width, height, IFM]. Data type supported: same as @p input.
+     * @param[in] conv_w The converted tensor's width.
+     * @param[in] conv_h The converted tensor's height.
+     */
+    static Status validate(const ITensorInfo *input, const ITensorInfo *output, size_t conv_w, size_t conv_h);
 
     // Inherited methods overridden:
     void run(const Window &window, const ThreadInfo &info) override;
diff --git a/arm_compute/core/NEON/kernels/NEDepthwiseWeightsReshapeKernel.h b/arm_compute/core/NEON/kernels/NEDepthwiseWeightsReshapeKernel.h
index d00e8a46ed..b78684f993 100644
--- a/arm_compute/core/NEON/kernels/NEDepthwiseWeightsReshapeKernel.h
+++ b/arm_compute/core/NEON/kernels/NEDepthwiseWeightsReshapeKernel.h
@@ -59,6 +59,16 @@ public:
      */
     void configure(const ITensor *input, ITensor *output, const ITensor *biases);
 
+    /** Static function to check if given info will lead to a valid configuration of @ref NEDepthwiseWeightsReshapeKernel
+     *
+     * @param[in] input  The input tensor to convert. 3 lower dimensions represent a single input [width, height, IFM]. Data type supported: QASYMM8, F32.
+     * @param[in] output The output tensor. Data type supported: same as @p input.
+     * @param[in] biases (Optional) The input biases to add. Shape [IFM]. Data type supported: same as @p input.
+     *
+     * @return a status
+     */
+    static Status validate(const ITensorInfo *input, const ITensorInfo *output, const ITensorInfo *biases);
+
     // Inherited methods overridden:
     void run(const Window &window, const ThreadInfo &info) override;
 
diff --git a/arm_compute/core/NEON/kernels/NEGEMMMatrixVectorMultiplyKernel.h b/arm_compute/core/NEON/kernels/NEGEMMMatrixVectorMultiplyKernel.h
index a05d591850..7dddaca3a0 100644
--- a/arm_compute/core/NEON/kernels/NEGEMMMatrixVectorMultiplyKernel.h
+++ b/arm_compute/core/NEON/kernels/NEGEMMMatrixVectorMultiplyKernel.h
@@ -56,6 +56,16 @@ public:
      */
     void configure(const ITensor *input0, const ITensor *input1, ITensor *output);
 
+    /** Static function to check if given info will lead to a valid configuration of @ref NEGEMMMatrixVectorMultiplyKernel
+     *
+     * @param[in] input0 First Input tensor. Data types supported: QASYMM8/F32
+     * @param[in] input1 Second Input tensor. Data types supported: same as @p input.
+     * @param[in] output Output tensor which stores the interleaved matrix. Data type supported: same as @p input, S32 for QASYMM8 input.
+     *
+     * @return a status
+     */
+    static Status validate(const ITensorInfo *input0, const ITensorInfo *input1, const ITensorInfo *output);
+
     // Inherited methods overridden:
     void run(const Window &window, const ThreadInfo &info) override;
     BorderSize border_size() const override;