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author | Michalis Spyrou <michalis.spyrou@arm.com> | 2020-06-19 12:40:46 +0100 |
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committer | Georgios Pinitas <georgios.pinitas@arm.com> | 2020-06-22 14:48:16 +0000 |
commit | 1732da86669aaa330671077dfa0e60cdc0bcc332 (patch) | |
tree | b12ac700559c366edf08596a39fd473acb08dae4 /arm_compute/core/NEON | |
parent | 934a3f1b1c95f6662f66d593fa384d969e858ad4 (diff) | |
download | ComputeLibrary-1732da86669aaa330671077dfa0e60cdc0bcc332.tar.gz |
COMPMID-3384: Async support to NEStridedSliceLayerKernel kernels/functions
Signed-off-by: Michalis Spyrou <michalis.spyrou@arm.com>
Change-Id: I631c566fdf38ff0388b38e71549a1291d351f8b6
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/3426
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'arm_compute/core/NEON')
-rw-r--r-- | arm_compute/core/NEON/kernels/NEStridedSliceKernel.h | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/arm_compute/core/NEON/kernels/NEStridedSliceKernel.h b/arm_compute/core/NEON/kernels/NEStridedSliceKernel.h index 6709619a62..33132c41a5 100644 --- a/arm_compute/core/NEON/kernels/NEStridedSliceKernel.h +++ b/arm_compute/core/NEON/kernels/NEStridedSliceKernel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2019 ARM Limited. + * Copyright (c) 2018-2020 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -58,8 +58,8 @@ public: * * @note Supported tensor rank: up to 4 * - * @param[in] input Source tensor. Data type supported: All - * @param[out] output Destination tensor. Data type supported: Same as @p input + * @param[in] input Source tensor info. Data type supported: All + * @param[out] output Destination tensor info. Data type supported: Same as @p input * @param[in] starts The starts of the dimensions of the input tensor to be sliced. The length must be of rank(input). * @param[in] ends The ends of the dimensions of the input tensor to be sliced. The length must be of rank(input). * @param[in] strides The strides of the dimensions of the input tensor to be sliced. The length must be of rank(input). @@ -68,7 +68,7 @@ public: * @param[in] shrink_axis_mask If the ith bit of shrink_axis_mask is set, it implies that the ith specification shrinks the dimensionality by 1. * A slice of size 1 starting from starts[i] in the dimension must be preserved. */ - void configure(const ITensor *input, ITensor *output, + void configure(const ITensorInfo *input, ITensorInfo *output, const Coordinates &starts, const Coordinates &ends, const BiStrides &strides, int32_t begin_mask, int32_t end_mask, int32_t shrink_axis_mask); @@ -91,14 +91,13 @@ public: int32_t begin_mask, int32_t end_mask, int32_t shrink_axis_mask); // Inherited methods overridden: - void run(const Window &window, const ThreadInfo &info) override; + void run_op(const InputTensorMap &inputs, const OutputTensorMap &outputs, + const Window &window, const ThreadInfo &info) override; private: - const ITensor *_input; /**< Source tensor */ - ITensor *_output; /**< Destination tensor */ - Coordinates _starts_abs; /**< Absolute start coordinates */ - Coordinates _final_strides; /**< Final strides */ - int32_t _shrink_mask; /**< Shrink axis mask */ + Coordinates _starts_abs; /**< Absolute start coordinates */ + Coordinates _final_strides; /**< Final strides */ + int32_t _shrink_mask; /**< Shrink axis mask */ }; } // namespace arm_compute #endif /*ARM_COMPUTE_NE_STRIDED_SLICE_KERNEL_H */ |