aboutsummaryrefslogtreecommitdiff
path: root/arm_compute/core/NEON/kernels/NEGEMMLowpReductionKernel.h
diff options
context:
space:
mode:
authorGeorgios Pinitas <georgios.pinitas@arm.com>2017-11-16 19:24:39 +0000
committerAnthony Barbier <anthony.barbier@arm.com>2018-11-02 16:35:24 +0000
commita3b1b469276b10484cd45901ae3a4b48b506caa9 (patch)
tree8c91176708bdede785edbb98c73ce0a479dff243 /arm_compute/core/NEON/kernels/NEGEMMLowpReductionKernel.h
parentfc35b51d598d12e2a0895ed82d2368f07df68829 (diff)
downloadComputeLibrary-a3b1b469276b10484cd45901ae3a4b48b506caa9.tar.gz
COMPMID-667: Add validation static method to NEON GEMMlowp
Change-Id: I8a470cc1351593ad8eeaf4ec92e04865e83d4f3c Reviewed-on: http://mpd-gerrit.cambridge.arm.com/96147 Tested-by: Kaizen <jeremy.johnson+kaizengerrit@arm.com> Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Diffstat (limited to 'arm_compute/core/NEON/kernels/NEGEMMLowpReductionKernel.h')
-rw-r--r--arm_compute/core/NEON/kernels/NEGEMMLowpReductionKernel.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/arm_compute/core/NEON/kernels/NEGEMMLowpReductionKernel.h b/arm_compute/core/NEON/kernels/NEGEMMLowpReductionKernel.h
index 6eee54a9f0..9ca5cdf828 100644
--- a/arm_compute/core/NEON/kernels/NEGEMMLowpReductionKernel.h
+++ b/arm_compute/core/NEON/kernels/NEGEMMLowpReductionKernel.h
@@ -77,6 +77,16 @@ public:
* @param[in] is_interleaved4x4 True if the matrix A has been interleaved4x4
*/
void configure(const ITensor *mtx_a, ITensor *vector_sum_row, int32_t num_mtx_a_cols, bool is_interleaved4x4) override;
+ /** Static function to check if given info will lead to a valid configuration of @ref NEGEMMLowpMatrixAReductionKernel
+ *
+ * @param[in] mtx_a Input tensor. Data type supported: QASYMM8
+ * @param[in] vector_sum_row Output row-vector of sums of all the entries in each row of mtx_a. Data type supported: S32
+ * @param[in] num_mtx_a_cols Number of matrix A columns
+ * @param[in] is_interleaved4x4 True if the matrix A has been interleaved4x4
+ *
+ * @return an error status
+ */
+ static Error validate(const ITensorInfo *mtx_a, const ITensorInfo *vector_sum_row, int32_t num_mtx_a_cols, bool is_interleaved4x4);
// Inherited methods overridden:
void run(const Window &window, const ThreadInfo &info) override;
@@ -98,6 +108,16 @@ public:
* @param[in] is_transposed1xW True if the input tensor is transposed 1xW
*/
void configure(const ITensor *mtx_b, ITensor *vector_sum_col, int32_t num_mtx_b_rows, bool is_transposed1xW) override;
+ /** Static function to check if given info will lead to a valid configuration of @ref NEGEMMLowpMatrixBReductionKernel
+ *
+ * @param[in] mtx_b Input tensor. Data type supported: Data type supported: QASYMM8
+ * @param[in] vector_sum_col Output row-vector of sums of all the entries in each column of mtx_b. Data type supported: S32
+ * @param[in] num_mtx_b_rows Number of matrix B rows
+ * @param[in] is_transposed1xW True if the input tensor is transposed 1xW
+ *
+ * @return an error status
+ */
+ static Error validate(const ITensorInfo *mtx_b, const ITensorInfo *vector_sum_col, int32_t num_mtx_b_rows, bool is_transposed1xW);
// Inherited methods overridden:
void run(const Window &window, const ThreadInfo &info) override;