COMPMID-464 Implement Depthwise separable convolution on NEON

Change-Id: Iccd686be18381e96bcf09b14c7017c6dda0f38d8
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/109824
Tested-by: BSG Visual Compute Jenkins server to access repositories on http://mpd-gerrit.cambridge.arm.com <bsgcomp@arm.com>
Reviewed-by: Pablo Tello <pablo.tello@arm.com>

1 files changed, 71 insertions, 0 deletions

diff --git a/arm_compute/core/NEON/kernels/NEDepthwiseVectorToTensorKernel.h b/arm_compute/core/NEON/kernels/NEDepthwiseVectorToTensorKernel.h
new file mode 100644
index 0000000000..8b33fae6f3
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+++ b/arm_compute/core/NEON/kernels/NEDepthwiseVectorToTensorKernel.h
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2017 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_NEDEPTHWISEVECTORTOTENSORKERNEL_H__
+#define __ARM_COMPUTE_NEDEPTHWISEVECTORTOTENSORKERNEL_H__
+
+#include "arm_compute/core/NEON/INEKernel.h"
+
+namespace arm_compute
+{
+class ITensor;
+
+/** Interface for the depthwise vector to tensor kernel.
+ *
+ *  This kernel takes the 1D tensor that's been produced by the MatrixVectorMultiply
+ *  kernel and reshapes it to given width and height (previously calculated, based
+ *  on input/weights dimensions and convolution strides and padding).
+ *
+ **/
+class NEDepthwiseVectorToTensorKernel : public INEKernel
+{
+public:
+    /** Default constructor */
+    NEDepthwiseVectorToTensorKernel();
+    /** Prevent instances of this class from being copied (As this class contains pointers) */
+    NEDepthwiseVectorToTensorKernel(const NEDepthwiseVectorToTensorKernel &) = delete;
+    /** Prevent instances of this class from being copied (As this class contains pointers) */
+    NEDepthwiseVectorToTensorKernel &operator=(const NEDepthwiseVectorToTensorKernel &) = delete;
+    /** Allow instances of this class to be moved */
+    NEDepthwiseVectorToTensorKernel(NEDepthwiseVectorToTensorKernel &&) = default;
+    /** Allow instances of this class to be moved */
+    NEDepthwiseVectorToTensorKernel &operator=(NEDepthwiseVectorToTensorKernel &&) = default;
+    /** Set the input and output of the kernel.
+     *
+     * @param[in]  input  The input vector to convert. Data type supported: F32.
+     * @param[out] output The output tensor. 3 lower dimensions represent a single input [width, height, IFM]. Data type supported: same as @p input.
+     * @param[in]  conv_w The converted tensor's width.
+     * @param[in]  conv_h The converted tensor's height.
+     */
+    void configure(const ITensor *input, ITensor *output, size_t conv_w, size_t conv_h);
+
+    // Inherited methods overridden:
+    void run(const Window &window, const ThreadInfo &info) override;
+
+private:
+    const ITensor *_input;
+    ITensor       *_output;
+    std::pair<size_t, size_t> _conv_dims;
+};
+} // arm_compute
+#endif /*__ARM_COMPUTE_NEDEPTHWISEVECTORTOTENSORKERNEL_H__ */