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author | Usama Arif <usama.arif@arm.com> | 2019-04-12 10:29:17 +0100 |
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committer | Pablo Marquez <pablo.tello@arm.com> | 2019-04-24 12:31:21 +0000 |
commit | 881f2ded860fc1db23810076b699c4492556c376 (patch) | |
tree | 6237444ceaf2d5098e0b546693b8c18955963012 /arm_compute/core/NEON/kernels/NEDepthwiseIm2ColKernel.h | |
parent | 557d4aece64b2ed422ec853dbc2b7a4949ea56ca (diff) | |
download | ComputeLibrary-881f2ded860fc1db23810076b699c4492556c376.tar.gz |
COMPMID-2048: Add support for dilation in NEDepthwiseConvolution.
Change-Id: If9941e770779fbf918ba5ff0573da9378078b969
Signed-off-by: Usama Arif <usama.arif@arm.com>
Reviewed-on: https://review.mlplatform.org/c/999
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Marquez <pablo.tello@arm.com>
Diffstat (limited to 'arm_compute/core/NEON/kernels/NEDepthwiseIm2ColKernel.h')
-rw-r--r-- | arm_compute/core/NEON/kernels/NEDepthwiseIm2ColKernel.h | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/arm_compute/core/NEON/kernels/NEDepthwiseIm2ColKernel.h b/arm_compute/core/NEON/kernels/NEDepthwiseIm2ColKernel.h index de671361d6..3e123b4839 100644 --- a/arm_compute/core/NEON/kernels/NEDepthwiseIm2ColKernel.h +++ b/arm_compute/core/NEON/kernels/NEDepthwiseIm2ColKernel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018 ARM Limited. + * Copyright (c) 2017-2019 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -62,23 +62,27 @@ public: * @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo. * @param[in] has_bias Boolean that specifies if the depthwise convolution has bias. * @param[in] depth_multiplier (Optional) Multiplier to apply to the input's depth in order to retrieve the output's depth. Defaults to 1. + * @param[in] dilation (Optional) Dilation, in elements, across x and y. Defaults to (1, 1). */ - void configure(const ITensor *input, ITensor *output, const Size2D &kernel_dims, const PadStrideInfo &conv_info, bool has_bias = false, unsigned int depth_multiplier = 1); + void configure(const ITensor *input, ITensor *output, const Size2D &kernel_dims, const PadStrideInfo &conv_info, bool has_bias = false, unsigned int depth_multiplier = 1, + const Size2D &dilation = Size2D(1U, 1U)); /** Static function to check if given info will lead to a valid configuration of @ref NEDepthwiseIm2ColKernel * - * @param[in] input The input tensor to convert. 3 lower dimensions represent a single input [width, height, IFM], + * @param[in] input The input tensor info to convert. 3 lower dimensions represent a single input [width, height, IFM], * while every optional dimension from 4 and above represent a batch of inputs. Data types supported: QASYMM8/F16/F32 - * @param[in] output The output tensor. First 3 lower dimensions represent a transform of each 3D input, + * @param[in] output The output tensor info. First 3 lower dimensions represent a transform of each 3D input, * while every dimension above 3 represents a batch. Data types supported: Same as @p input * @param[in] kernel_dims The kernel dimensions (width and height). * @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo. * @param[in] has_bias Boolean that specifies if the depthwise convolution has bias. * @param[in] depth_multiplier (Optional) Multiplier to apply to the input's depth in order to retrieve the output's depth. Defaults to 1. + * @param[in] dilation (Optional) Dilation, in elements, across x and y. Defaults to (1, 1). * * @return a status */ - static Status validate(const ITensorInfo *input, const ITensorInfo *output, const Size2D &kernel_dims, const PadStrideInfo &conv_info, bool has_bias = false, unsigned int depth_multiplier = 1); + static Status validate(const ITensorInfo *input, const ITensorInfo *output, const Size2D &kernel_dims, const PadStrideInfo &conv_info, bool has_bias = false, unsigned int depth_multiplier = 1, + const Size2D &dilation = Size2D(1U, 1U)); // Inherited methods overridden: void run(const Window &window, const ThreadInfo &info) override; @@ -104,6 +108,7 @@ private: PadStrideInfo _conv_info; bool _has_bias; unsigned int _depth_multiplier; + Size2D _dilation; }; } // namespace arm_compute #endif /*__ARM_COMPUTE_NEDEPTHWISEIM2COLKERNEL_H__ */ |