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authorMichalis Spyrou <michalis.spyrou@arm.com>2017-11-23 12:10:21 +0000
committerAnthony Barbier <anthony.barbier@arm.com>2018-11-02 16:41:04 +0000
commitb7b31538eb9137e4d3e8de6d381dcbe9fc58df94 (patch)
tree7cca8c388cfb15867b9d92c6fd793ca1588b6526 /arm_compute/core/NEON/kernels/NEDepthwiseIm2ColKernel.h
parent02bf80d4554cfc824a76008905921cb564bee999 (diff)
downloadComputeLibrary-b7b31538eb9137e4d3e8de6d381dcbe9fc58df94.tar.gz
COMPMID-464 Implement Depthwise separable convolution on NEON
Change-Id: Iccd686be18381e96bcf09b14c7017c6dda0f38d8 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/109824 Tested-by: BSG Visual Compute Jenkins server to access repositories on http://mpd-gerrit.cambridge.arm.com <bsgcomp@arm.com> Reviewed-by: Pablo Tello <pablo.tello@arm.com>
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+/*
+ * Copyright (c) 2017 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_NEDEPTHWISEIM2COLKERNEL_H__
+#define __ARM_COMPUTE_NEDEPTHWISEIM2COLKERNEL_H__
+
+#include "arm_compute/core/NEON/INEKernel.h"
+#include "arm_compute/core/Size2D.h"
+
+namespace arm_compute
+{
+class ITensor;
+
+/** Interface for the depthwise im2col reshape kernel.
+ * This kernel reshape the input low 3 dimensions to a new 3D shape where the output's first dimension is
+ * the linear patch size (FILTER_WIDTH * FILTER_HEIGHT) and second dimension is number of patches in per image and third dimension unchanged .
+ **/
+class NEDepthwiseIm2ColKernel : public INEKernel
+{
+public:
+ /** Default constructor */
+ NEDepthwiseIm2ColKernel();
+ /** Prevent instances of this class from being copied (As this class contains pointers) */
+ NEDepthwiseIm2ColKernel(const NEDepthwiseIm2ColKernel &) = delete;
+ /** Prevent instances of this class from being copied (As this class contains pointers) */
+ NEDepthwiseIm2ColKernel &operator=(const NEDepthwiseIm2ColKernel &) = delete;
+ /** Allow instances of this class to be moved */
+ NEDepthwiseIm2ColKernel(NEDepthwiseIm2ColKernel &&) = default;
+ /** Allow instances of this class to be moved */
+ NEDepthwiseIm2ColKernel &operator=(NEDepthwiseIm2ColKernel &&) = default;
+ /** Set the input and output of the kernel.
+ *
+ * @param[in] input The input tensor to convert. 3 lower dimensions represent a single input [width, height, IFM],
+ * while every optional dimension from 4 and above represent a batch of inputs. Data types supported: F32
+ * @param[out] output The output tensor. First 3 lower dimensions represent a transform of each 3D input,
+ * while every dimension above 3 represents a batch. Data types supported: Same as @p input
+ * @param[in] kernel_dims The kernel dimensions (width and height).
+ * @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo.
+ * @param[in] has_bias Boolean that specifies if the depthwise convolution has bias.
+ */
+ void configure(const ITensor *input, ITensor *output, const Size2D &kernel_dims, const PadStrideInfo &conv_info, bool has_bias = false);
+
+ // Inherited methods overridden:
+ void run(const Window &window, const ThreadInfo &info) override;
+
+private:
+ const ITensor *_input;
+ ITensor *_output;
+ Size2D _kernel_dims;
+ PadStrideInfo _conv_info;
+ bool _has_bias;
+};
+} // arm_compute
+#endif /*__ARM_COMPUTE_NEDEPTHWISEIM2COLKERNEL_H__ */