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| author | Georgios Pinitas <georgios.pinitas@arm.com> | 2018-01-12 16:29:45 +0000 |
|---|---|---|
| committer | Anthony Barbier <anthony.barbier@arm.com> | 2018-11-02 16:43:42 +0000 |
| commit | f72f9367d1eddee91f15a64952b99ee6b80b821d (patch) | |
| tree | 0d3296219ca7919c263b3701ab22b5468df86354 /arm_compute/core/NEON/kernels/NEDepthwiseConvolutionLayer3x3Kernel.h | |
| parent | a026e981c607272181292b044c91f73a27d2bcd9 (diff) | |
| download | ComputeLibrary-f72f9367d1eddee91f15a64952b99ee6b80b821d.tar.gz | |
COMPMID-791: Adds support of QASYMM8 in NEDepthwiseConvolution3x3
Change-Id: I1a9ed6c3420ddf8978aeaad48d9915333b006b49
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/116374
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Diffstat (limited to 'arm_compute/core/NEON/kernels/NEDepthwiseConvolutionLayer3x3Kernel.h')
| -rw-r--r-- | arm_compute/core/NEON/kernels/NEDepthwiseConvolutionLayer3x3Kernel.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arm_compute/core/NEON/kernels/NEDepthwiseConvolutionLayer3x3Kernel.h b/arm_compute/core/NEON/kernels/NEDepthwiseConvolutionLayer3x3Kernel.h index b8f01cb635..38e2a5ddfd 100644 --- a/arm_compute/core/NEON/kernels/NEDepthwiseConvolutionLayer3x3Kernel.h +++ b/arm_compute/core/NEON/kernels/NEDepthwiseConvolutionLayer3x3Kernel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017 ARM Limited. + * Copyright (c) 2017-2018 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -47,7 +47,7 @@ public: NEDepthwiseConvolutionLayer3x3Kernel &operator=(NEDepthwiseConvolutionLayer3x3Kernel &&) = default; /** Initialize the function's source, destination, conv and border_size. * - * @param[in] input Source tensor. DataType supported: F32. + * @param[in] input Source tensor. DataType supported: QASYMM8, F32. * @param[in] weights Weights tensor. This is a 3D tensor with dimensions [3, 3, IFM]. Data type supported: Same as @p input. * @param[out] output Destination tensor. Data type supported: Same as @p input. * @param[in] conv_info Padding and stride information to use for the convolution. @@ -64,6 +64,7 @@ private: ITensor *_output; const ITensor *_weights; PadStrideInfo _conv_info; + unsigned int _num_elems_written_per_iteration; }; } // namespace arm_compute #endif /* __ARM_COMPUTE_NEDEPTHWISECONVOLUTIONKERNEL3x3_H__ */
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