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| author | George Wort <george.wort@arm.com> | 2019-02-22 16:37:41 +0000 |
|---|---|---|
| committer | Giuseppe Rossini <giuseppe.rossini@arm.com> | 2019-03-15 13:34:00 +0000 |
| commit | 2d7e683e79c8ad328d4930c1f82a46827313faf4 (patch) | |
| tree | eb81f928ecd2543ef80af87f65d1bdef5a78ea2a /arm_compute/core/NEON/NEAsymm.inl | |
| parent | 3814b30623d6a9e570d850fe5ae275fe2117f3f5 (diff) | |
| download | ComputeLibrary-2d7e683e79c8ad328d4930c1f82a46827313faf4.tar.gz | |
COMPMID-1694: Fuse offset contribution with the output stage when we use NEGEMMLowpMatrixMultiplyCore
Change-Id: Ic1a681e4cc03e1eba3bf8485d9cdb17b3e926047
Signed-off-by: giuros01 <giuseppe.rossini@arm.com>
Reviewed-on: https://review.mlplatform.org/c/561
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'arm_compute/core/NEON/NEAsymm.inl')
| -rw-r--r-- | arm_compute/core/NEON/NEAsymm.inl | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arm_compute/core/NEON/NEAsymm.inl b/arm_compute/core/NEON/NEAsymm.inl index ce999a5413..209785d94e 100644 --- a/arm_compute/core/NEON/NEAsymm.inl +++ b/arm_compute/core/NEON/NEAsymm.inl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017 ARM Limited. + * Copyright (c) 2017-2019 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -31,6 +31,13 @@ inline int32x4_t rounding_divide_by_pow2(int32x4_t x, int exponent) return vrshlq_s32(fixed_up_x, shift_vec); } +inline int32_t rounding_divide_by_pow2(int32_t x, int exponent) +{ + const int32_t mask = (1 << exponent) - 1; + const int32_t threshold = (mask >> 1) + (x < 0 ? 1 : 0); + return (x >> exponent) + ((x & mask) > threshold ? 1 : 0); +} + inline qasymm8x16_t vmlaq_qasymm8(qasymm8x16_t vd, float32x4_t vs, float32x4_t vo) { // Convert uint8 vectors to uint16 vectors |