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authorVidhya Sudhan Loganathan <vidhyasudhan.loganathan@arm.com>2018-12-18 14:17:00 +0000
committerGeorgios Pinitas <georgios.pinitas@arm.com>2018-12-18 17:40:19 +0000
commit5e96be7707a571b136dc64256af399dbbb0fdfe0 (patch)
tree92229d9824f3089814ed2af56c5f76a474366954 /arm_compute/core/CL/kernels/CLRangeKernel.h
parent52ebf4219385efe54463dc794ba806b82a6137b3 (diff)
downloadComputeLibrary-5e96be7707a571b136dc64256af399dbbb0fdfe0.tar.gz
COMPMID-1722 : CL: Implement Range
Change-Id: I88da6eb5289c303b1dc91606c1560ce629746058 Reviewed-on: https://review.mlplatform.org/381 Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
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+/*
+ * Copyright (c) 2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_CLRANGEKERNEL_H__
+#define __ARM_COMPUTE_CLRANGEKERNEL_H__
+
+#include "arm_compute/core/CL/ICLKernel.h"
+#include "arm_compute/core/Types.h"
+
+namespace arm_compute
+{
+class ICLTensor;
+
+/** Kernel class for Range()
+ *
+ * range generates a 1-D tensor containing a sequence of numbers that begins at 'start' and extends by increments
+ * of 'step' up to but not including 'end'.
+ */
+class CLRangeKernel : public ICLKernel
+{
+public:
+ /** Default constructor */
+ CLRangeKernel();
+ /** Prevent instances of this class from being copied (As this class contains pointers) */
+ CLRangeKernel(const CLRangeKernel &) = delete;
+ /** Prevent instances of this class from being copied (As this class contains pointers) */
+ CLRangeKernel &operator=(const CLRangeKernel &) = delete;
+ /** Allow instances of this class to be moved */
+ CLRangeKernel(CLRangeKernel &&) = default;
+ /** Allow instances of this class to be moved */
+ CLRangeKernel &operator=(CLRangeKernel &&) = default;
+ /** Default destructor */
+ ~CLRangeKernel() = default;
+ /** Initialise the kernel's output tensor, start, end and step of the sequence.
+ *
+ * @param[out] output Output tensor. Data types supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32.
+ * @param[in] start The starting value of the sequence.
+ * @param[in] end The ending (not including) value of the sequence.
+ * @param[in] step The gap between each pair of values in the sequence.
+ */
+ void configure(ICLTensor *output, float start, float end, float step);
+ /** Static function to check if given info will lead to a valid configuration of @ref CLRangeKernel
+ *
+ * @param[in] output Output tensor info. Data types supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32.
+ * @param[in] start The starting value of the sequence.
+ * @param[in] end The ending (not including) value of the sequence.
+ * @param[in] step The gap between each pair of values in the sequence.
+ *
+ * @return a status
+ */
+ static Status validate(const ITensorInfo *output, float start, float end, float step);
+
+ // Inherited methods overridden:
+ void run(const Window &window, cl::CommandQueue &queue) override;
+
+private:
+ float _start; /**< Start of sequence */
+ float _end; /**< End of sequence */
+ float _step; /**< Increment/step value */
+ ICLTensor *_output; /**< Destination tensor */
+};
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_CLRANGEKERNEL_H__ */