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| author | Gian Marco Iodice <gianmarco.iodice@arm.com> | 2018-10-18 10:21:02 +0100 |
|---|---|---|
| committer | Anthony Barbier <anthony.barbier@arm.com> | 2018-11-02 16:55:45 +0000 |
| commit | 4b90865ab985d571f70c60583cdfb8c7a65f1670 (patch) | |
| tree | f116a4ffef5f5e823689dd00c1e5c9d987f3d295 /arm_compute/core/CL/kernels/CLGEMMInterleave4x4Kernel.h | |
| parent | c55beee7ef70fa08a5d217619083b288a74fcb27 (diff) | |
| download | ComputeLibrary-4b90865ab985d571f70c60583cdfb8c7a65f1670.tar.gz | |
COMPMID-1413 - Improve the performance of GEMMLowp with 8 bit dot product on OpenCL
COMPMID-1424 - Add dot product support for CLDepthwise QASYMM8 3x3 NHWC non-unit stride
With this patch we are able to improve the performance of MobileNet v1-qasymm8 by 37 %
Tried to use the dot product instruction in CLDepthwise QASYMM8 3x3 NHWC non-unit stride
but I have not seen any benefit (maybe because we have few arithemtic operation and we
do not have more load instructions). However Depthwise convolution has been improved by
30%
Change-Id: Id768a99c2e53a04276707e427af5d0ec93419ada
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155082
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Diffstat (limited to 'arm_compute/core/CL/kernels/CLGEMMInterleave4x4Kernel.h')
| -rw-r--r-- | arm_compute/core/CL/kernels/CLGEMMInterleave4x4Kernel.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arm_compute/core/CL/kernels/CLGEMMInterleave4x4Kernel.h b/arm_compute/core/CL/kernels/CLGEMMInterleave4x4Kernel.h index 4592fc2921..96b01b0237 100644 --- a/arm_compute/core/CL/kernels/CLGEMMInterleave4x4Kernel.h +++ b/arm_compute/core/CL/kernels/CLGEMMInterleave4x4Kernel.h @@ -68,14 +68,15 @@ public: * @param[out] output Output tensor. Data type supported: same as @p input * @param[in] mult_interleave4x4_height (Optional) Multiplication factor for the height of the 4x4 interleave block * @param[in] reinterpret_input_as_3d (Optional) True if the input has to be reinterpreted as 3D tensor + * @param[in] unroll_block (Optional) True if the 4x4 block has to be unrolled rather than transposed */ - void configure(const ICLTensor *input, ICLTensor *output, int mult_interleave4x4_height = 1, bool reinterpret_input_as_3d = false); + void configure(const ICLTensor *input, ICLTensor *output, int mult_interleave4x4_height = 1, bool reinterpret_input_as_3d = false, bool unroll_block = false); /** Static function to check if given info will lead to a valid configuration of @ref CLGEMMInterleave4x4Kernel * * @param[in] input Input tensor info. Data types supported: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32 * @param[in] output Output tensor info which stores the interleaved matrix. Data type supported: same as @p input. * @param[in] mult_interleave4x4_height Multiplication factor for the height of the 4x4 interleave block - * @param[in] reinterpret_input_as_3d (Optional) True if the input has to be reinterpreted as 3D tensor + * @param[in] reinterpret_input_as_3d True if the input has to be reinterpreted as 3D tensor * * @return a status */ |