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authormorgolock <pablo.tello@arm.com>2019-12-31 12:20:47 +0000
committerMichele Di Giorgio <michele.digiorgio@arm.com>2020-01-09 11:37:01 +0000
commita35980546c00ae1647ce033b061530607a5ad1e4 (patch)
tree5eba5c7f8bd4edcd36d682faf35b70d2492b4a99
parentbb123bd6f64444141161562aad06cb406762d47a (diff)
downloadComputeLibrary-a35980546c00ae1647ce033b061530607a5ad1e4.tar.gz
COMPMID-2994: Add support QASYMM8_SIGNED in NEElementwiseMax
Change-Id: I8261558384ae028f7f016dfd6715de140f0b6445 Signed-off-by: morgolock <pablo.tello@arm.com> Reviewed-on: https://review.mlplatform.org/c/2528 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
-rw-r--r--arm_compute/runtime/NEON/functions/NEElementwiseOperations.h6
-rw-r--r--src/core/NEON/kernels/NEElementwiseOperationKernel.cpp6
-rw-r--r--src/runtime/NEON/functions/NEElementwiseOperators.cpp6
-rw-r--r--tests/validation/NEON/ElementwiseMax.cpp44
4 files changed, 50 insertions, 12 deletions
diff --git a/arm_compute/runtime/NEON/functions/NEElementwiseOperations.h b/arm_compute/runtime/NEON/functions/NEElementwiseOperations.h
index 983a9a5d4e..d2281f8bea 100644
--- a/arm_compute/runtime/NEON/functions/NEElementwiseOperations.h
+++ b/arm_compute/runtime/NEON/functions/NEElementwiseOperations.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2019 ARM Limited.
+ * Copyright (c) 2018-2020 ARM Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -41,14 +41,14 @@ class NEElementwiseMax : public INESimpleFunction
public:
/** Initialise the kernel's inputs, output and conversion policy.
*
- * @param[in, out] input1 First tensor input. Data types supported: QASYMM8/S16/F16/S32/F32.
+ * @param[in, out] input1 First tensor input. Data types supported: QASYMM8/QASYMM8_SIGNED/S16/F16/S32/F32.
* @param[in, out] input2 Second tensor input. Data types supported: Same as @p input1.
* @param[out] output Output tensor. Data types supported: Same as @p input1.
*/
void configure(ITensor *input1, ITensor *input2, ITensor *output);
/** Static function to check if given info will lead to a valid configuration of @ref NEArithmeticOperationKernel for max
*
- * @param[in] input1 First tensor input info. Data types supported: QASYMM8/S16/F16/S32/F32.
+ * @param[in] input1 First tensor input info. Data types supported: QASYMM8/QASYMM8_SIGNED/S16/F16/S32/F32.
* @param[in] input2 Second tensor input info. Data types supported: Same as @p input1.
* @param[in] output Output tensor info. Data types supported: Same as @p input1.
*
diff --git a/src/core/NEON/kernels/NEElementwiseOperationKernel.cpp b/src/core/NEON/kernels/NEElementwiseOperationKernel.cpp
index 4928ae9bdd..b8e6f0cc69 100644
--- a/src/core/NEON/kernels/NEElementwiseOperationKernel.cpp
+++ b/src/core/NEON/kernels/NEElementwiseOperationKernel.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2019 ARM Limited.
+ * Copyright (c) 2018-2020 ARM Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -795,8 +795,7 @@ void elementwise_op_quantized_signed(const ITensor *in1, const ITensor *in2, ITe
const UniformQuantizationInfo output_qinfo = out->info()->quantization_info().uniform();
- // Output quantization info (add 0.5 to round toward the nearest integer - 0.5 rounds away from zero)
- const float32x4_t voffseto = vdupq_n_f32(output_qinfo.offset + 0.5f);
+ const float32x4_t voffseto = vdupq_n_f32(output_qinfo.offset);
const float32x4_t invvscaleo = vdupq_n_f32(1.f / output_qinfo.scale);
if(is_broadcast_across_x)
@@ -1000,7 +999,6 @@ NEElementwiseOperationKernel::NEElementwiseOperationKernel()
Status NEElementwiseOperationKernel::validate_arguments_common(const ITensorInfo &input1, const ITensorInfo &input2, const ITensorInfo &output)
{
ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(&input1, 1, DataType::QASYMM8, DataType::QASYMM8_SIGNED, DataType::S16, DataType::F16, DataType::S32, DataType::F32);
- ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(&input2, 1, DataType::QASYMM8, DataType::QASYMM8_SIGNED, DataType::S16, DataType::F16, DataType::S32, DataType::F32);
ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(&input1);
ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(&input1, &input2);
diff --git a/src/runtime/NEON/functions/NEElementwiseOperators.cpp b/src/runtime/NEON/functions/NEElementwiseOperators.cpp
index 699363111d..ede8c20428 100644
--- a/src/runtime/NEON/functions/NEElementwiseOperators.cpp
+++ b/src/runtime/NEON/functions/NEElementwiseOperators.cpp
@@ -23,6 +23,7 @@
*/
#include "arm_compute/runtime/NEON/functions/NEElementwiseOperations.h"
#include <arm_compute/core/NEON/kernels/NEElementwiseOperationKernel.h>
+#include "arm_compute/core/Validate.h"
#include "arm_compute/core/ITensor.h"
#include "support/ToolchainSupport.h"
@@ -40,6 +41,11 @@ void NEElementwiseMax::configure(ITensor *input1, ITensor *input2, ITensor *outp
Status NEElementwiseMax::validate(const ITensorInfo *input1, const ITensorInfo *input2, const ITensorInfo *output)
{
+ if( input1->data_type() == DataType::QASYMM8_SIGNED)
+ {
+ ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input1, output);
+ ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_QUANTIZATION_INFO(input1, input2, output);
+ }
return NEArithmeticOperationKernel::validate(ArithmeticOperation::MAX, input1, input2, output);
}
diff --git a/tests/validation/NEON/ElementwiseMax.cpp b/tests/validation/NEON/ElementwiseMax.cpp
index 5c8a12ea96..fc6bb9454d 100644
--- a/tests/validation/NEON/ElementwiseMax.cpp
+++ b/tests/validation/NEON/ElementwiseMax.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2019 ARM Limited.
+ * Copyright (c) 2018-2020 ARM Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -46,6 +46,10 @@ RelativeTolerance<float> tolerance_fp32(0.000001f);
const auto ElementwiseMaxQASYMM8Dataset = combine(combine(framework::dataset::make("DataType", DataType::QASYMM8), framework::dataset::make("DataType", DataType::QASYMM8)),
framework::dataset::make("DataType",
DataType::QASYMM8));
+const auto ElementwiseMaxQASYMM8SignedDataset = combine(combine(framework::dataset::make("DataType", DataType::QASYMM8_SIGNED), framework::dataset::make("DataType", DataType::QASYMM8_SIGNED)),
+ framework::dataset::make("DataType",
+ DataType::QASYMM8_SIGNED));
+
/** Input data sets **/
const auto ElementwiseMaxS32Dataset = combine(combine(framework::dataset::make("DataType", DataType::S32), framework::dataset::make("DataType", DataType::S32)), framework::dataset::make("DataType",
DataType::S32));
@@ -71,25 +75,41 @@ DATA_TEST_CASE(Validate, framework::DatasetMode::ALL, zip(zip(zip(
framework::dataset::make("Input1Info", { TensorInfo(TensorShape(32U, 13U, 2U), 1, DataType::F32),
TensorInfo(TensorShape(32U, 13U, 2U), 1, DataType::S32),
TensorInfo(TensorShape(27U, 13U, 2U), 1, DataType::S32),
- TensorInfo(TensorShape(32U, 13U, 2U), 1, DataType::S32), // Invalid data type combination
- TensorInfo(TensorShape(32U, 13U, 2U), 1, DataType::F32), // Mismatching shapes
+ TensorInfo(TensorShape(32U, 13U, 2U), 1, DataType::S32), // Invalid data type combination
+ TensorInfo(TensorShape(32U, 13U, 2U), 1, DataType::F32), // Mismatching shapes
+ TensorInfo(TensorShape(8U, 8U, 3U), 1, DataType::QASYMM8_SIGNED), // OK
+ TensorInfo(TensorShape(8U, 8U, 3U), 1, DataType::QASYMM8_SIGNED), // Mismatching data types
+ TensorInfo(TensorShape(8U, 8U, 3U), 1, DataType::QASYMM8_SIGNED,QuantizationInfo(0.1f, 2) ), // Mismatching qinfo
+
}),
framework::dataset::make("Input2Info",{ TensorInfo(TensorShape(32U, 13U, 2U), 1, DataType::F32),
TensorInfo(TensorShape(32U, 13U, 2U), 1, DataType::S32),
TensorInfo(TensorShape(27U, 13U, 2U), 1, DataType::S32),
TensorInfo(TensorShape(32U, 13U, 2U), 1, DataType::S16),
TensorInfo(TensorShape(48U, 11U, 2U), 1, DataType::F32),
+ TensorInfo(TensorShape(8U, 8U, 3U), 1, DataType::QASYMM8_SIGNED),
+ TensorInfo(TensorShape(8U, 8U, 3U), 1, DataType::QASYMM8),
+ TensorInfo(TensorShape(8U, 8U, 3U), 1, DataType::QASYMM8_SIGNED,QuantizationInfo(0.4f, 5) ), // Mismatching qinfo
+
})),
framework::dataset::make("OutputInfo",{ TensorInfo(TensorShape(32U, 13U, 2U), 1, DataType::F32),
TensorInfo(TensorShape(32U, 13U, 2U), 1, DataType::S32),
TensorInfo(TensorShape(27U, 13U, 2U), 1, DataType::S32),
TensorInfo(TensorShape(32U, 13U, 2U), 1, DataType::S32),
TensorInfo(TensorShape(48U, 11U, 2U), 1, DataType::F32),
+ TensorInfo(TensorShape(8U, 8U, 3U), 1, DataType::QASYMM8_SIGNED),
+ TensorInfo(TensorShape(8U, 8U, 3U), 1, DataType::QASYMM8_SIGNED),
+ TensorInfo(TensorShape(8U, 8U, 3U), 1, DataType::QASYMM8_SIGNED,QuantizationInfo(0.3f,4 ) ), // Mismatching qinfo
})),
- framework::dataset::make("Expected", { true, true, true, false, false})),
+
+ framework::dataset::make("Expected", { true, true, true, false, false, true, false, false,false})),
input1_info, input2_info, output_info, expected)
{
- ARM_COMPUTE_EXPECT(bool(NEElementwiseMax::validate(&input1_info.clone()->set_is_resizable(false), &input2_info.clone()->set_is_resizable(false), &output_info.clone()->set_is_resizable(false))) == expected, framework::LogLevel::ERRORS);
+ ARM_COMPUTE_EXPECT(bool(NEElementwiseMax::validate(
+ &input1_info.clone()->set_is_resizable(false),
+ &input2_info.clone()->set_is_resizable(false),
+ &output_info.clone()->set_is_resizable(false))
+ ) == expected, framework::LogLevel::ERRORS);
}
// clang-format on
// *INDENT-ON*
@@ -138,6 +158,20 @@ FIXTURE_DATA_TEST_CASE(RunSmallBroadcast, NEElementwiseMaxQuantizedBroadcastFixt
validate(Accessor(_target), _reference);
}
TEST_SUITE_END()
+
+TEST_SUITE(QASYMM8_SIGNED)
+FIXTURE_DATA_TEST_CASE(RunSmall, NEElementwiseMaxQuantizedFixture<int8_t>, framework::DatasetMode::PRECOMMIT, combine(combine(combine(combine(datasets::SmallShapes(),
+ ElementwiseMaxQASYMM8SignedDataset),
+ framework::dataset::make("QuantizationInfo", { QuantizationInfo(10.f, 2) })),
+ framework::dataset::make("QuantizationInfo", { QuantizationInfo(10.f, 2) })),
+ framework::dataset::make("QuantizationInfo", { QuantizationInfo(10.f, 2) })))
+{
+ // Validate output
+ validate(Accessor(_target), _reference);
+}
+
+TEST_SUITE_END()
+
TEST_SUITE_END()
TEST_SUITE(Float)