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authorManuel Bottini <manuel.bottini@arm.com>2020-05-21 17:14:36 +0100
committerManuel Bottini <manuel.bottini@arm.com>2020-05-22 12:31:03 +0100
commitd71d2be0ab380a2d1fbaf051e43b368330b4d27c (patch)
treee09220a6b7115bd6c4365e65bce2836642663a98
parent0ba7c3ac045b353d977b23c9de362e0e7e7a65ee (diff)
downloadComputeLibrary-d71d2be0ab380a2d1fbaf051e43b368330b4d27c.tar.gz
COMPMID-3069: Removing deprecated functions and classes from 20.05 release
Change-Id: Ic4d20995d6c6bb76d07113e86247bad2722e4e83 Signed-off-by: Manuel Bottini <manuel.bottini@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/3244 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
-rw-r--r--arm_compute/core/Types.h68
-rw-r--r--arm_compute/runtime/CL/functions/CLDepthwiseConvolutionLayer.h82
-rw-r--r--arm_compute/runtime/NEON/functions/NEDepthwiseConvolutionLayer.h65
-rw-r--r--docs/00_introduction.dox19
-rw-r--r--docs/06_functions_list.dox2
-rw-r--r--src/runtime/CL/functions/CLDepthwiseConvolutionLayer.cpp36
-rw-r--r--src/runtime/NEON/functions/NEDepthwiseConvolutionLayer.cpp36
-rw-r--r--tests/validation/CL/DepthwiseConvolutionLayer.cpp130
8 files changed, 15 insertions, 423 deletions
diff --git a/arm_compute/core/Types.h b/arm_compute/core/Types.h
index d59bba6ff4..759ff07822 100644
--- a/arm_compute/core/Types.h
+++ b/arm_compute/core/Types.h
@@ -1195,74 +1195,6 @@ struct PoolingLayerInfo
*
* @param[in] pool_type Pooling type @ref PoolingType.
* @param[in] pool_size Pooling size, in elements, across x and y.
- * @param[in] pad_stride_info (Optional) Padding and stride information @ref PadStrideInfo
- * @param[in] exclude_padding (Optional) Strategy when accounting padding in calculations.
- * True will exclude padding while false will not (Used in AVG/L2 pooling to determine the pooling area).
- * Defaults to false;
- * @param[in] fp_mixed_precision (Optional) Use wider accumulators (32 bit instead of 16 for FP16) to improve accuracy.
- */
- ARM_COMPUTE_DEPRECATED_REL_REPLACE(20.02, PoolingLayerInfo(PoolingType, unsigned int, DataLayout, PadStrideInfo, bool, bool))
- explicit PoolingLayerInfo(PoolingType pool_type,
- unsigned int pool_size,
- PadStrideInfo pad_stride_info = PadStrideInfo(),
- bool exclude_padding = false,
- bool fp_mixed_precision = false)
- : pool_type(pool_type),
- pool_size(Size2D(pool_size, pool_size)),
- data_layout(DataLayout::UNKNOWN),
- pad_stride_info(pad_stride_info),
- exclude_padding(exclude_padding),
- is_global_pooling(false),
- fp_mixed_precision(fp_mixed_precision)
- {
- }
- /** Constructor
- *
- * @param[in] pool_type Pooling type @ref PoolingType.
- * @param[in] pool_size Pooling size, in elements, across x and y.
- * @param[in] pad_stride_info (Optional) Padding and stride information @ref PadStrideInfo
- * @param[in] exclude_padding (Optional) Strategy when accounting padding in calculations.
- * True will exclude padding while false will not (Used in AVG/L2 pooling to determine the pooling area).
- * Defaults to false;
- * @param[in] fp_mixed_precision (Optional) Use wider accumulators (32 bit instead of 16 for FP16) to improve accuracy.
- */
- ARM_COMPUTE_DEPRECATED_REL_REPLACE(20.02, PoolingLayerInfo(PoolingType, Size2D, DataLayout, PadStrideInfo, bool, bool))
- explicit PoolingLayerInfo(PoolingType pool_type,
- Size2D pool_size,
- PadStrideInfo pad_stride_info = PadStrideInfo(),
- bool exclude_padding = false,
- bool fp_mixed_precision = false)
- : pool_type(pool_type),
- pool_size(pool_size),
- data_layout(DataLayout::UNKNOWN),
- pad_stride_info(pad_stride_info),
- exclude_padding(exclude_padding),
- is_global_pooling(false),
- fp_mixed_precision(fp_mixed_precision)
- {
- }
- /** Constructor
- *
- * @note This constructor is used for global pooling
- *
- * @param[in] pool_type Pooling type @ref PoolingType.
- */
- ARM_COMPUTE_DEPRECATED_REL_REPLACE(20.02, PoolingLayerInfo(PoolingType, DataLayout))
- explicit PoolingLayerInfo(PoolingType pool_type)
- : pool_type(pool_type),
- pool_size(Size2D()),
- data_layout(DataLayout::UNKNOWN),
- pad_stride_info(PadStrideInfo(1, 1, 0, 0)),
- exclude_padding(false),
- is_global_pooling(true),
- fp_mixed_precision(false)
- {
- }
-
- /** Constructor
- *
- * @param[in] pool_type Pooling type @ref PoolingType.
- * @param[in] pool_size Pooling size, in elements, across x and y.
* @param[in] data_layout Data layout used by the layer @ref DataLayout
* @param[in] pad_stride_info (Optional) Padding and stride information @ref PadStrideInfo
* @param[in] exclude_padding (Optional) Strategy when accounting padding in calculations.
diff --git a/arm_compute/runtime/CL/functions/CLDepthwiseConvolutionLayer.h b/arm_compute/runtime/CL/functions/CLDepthwiseConvolutionLayer.h
index 63c359e68c..f15271b63c 100644
--- a/arm_compute/runtime/CL/functions/CLDepthwiseConvolutionLayer.h
+++ b/arm_compute/runtime/CL/functions/CLDepthwiseConvolutionLayer.h
@@ -338,87 +338,5 @@ private:
CLDepthwiseConvolutionLayerInternal3x3 _func_3x3;
CLDepthwiseConvolutionLayerGeneric _func_generic;
};
-
-/** Basic function to execute a depthwise convolution for kernel size 3x3xC (when data layout NCHW) or Cx3x3 (when data layout NHWC). This function calls the following OpenCL kernels:
- *
- * -# @ref CLDepthwiseConvolutionLayer3x3NCHWKernel (if data_layout == NCHW)
- * -# @ref CLDepthwiseConvolutionLayer3x3NHWCKernel (if data_layout == NHWC)
- * -# @ref CLDepthwiseConvolutionLayerReshapeWeightsKernel (if data_layout == NHWC)
- * -# @ref CLFillBorderKernel (if pad_x or pad_y > 0)
- *
- */
-class CLDepthwiseConvolutionLayer3x3 : public IFunction
-{
-public:
- /** Default constructor */
- CLDepthwiseConvolutionLayer3x3(std::shared_ptr<IMemoryManager> memory_manager = nullptr);
- /** Prevent instances of this class from being copied (As this class contains pointers) */
- CLDepthwiseConvolutionLayer3x3(const CLDepthwiseConvolutionLayer3x3 &) = delete;
- /** Default move constructor */
- CLDepthwiseConvolutionLayer3x3(CLDepthwiseConvolutionLayer3x3 &&) = default;
- /** Prevent instances of this class from being copied (As this class contains pointers) */
- CLDepthwiseConvolutionLayer3x3 &operator=(const CLDepthwiseConvolutionLayer3x3 &) = delete;
- /** Default move assignment operator */
- CLDepthwiseConvolutionLayer3x3 &operator=(CLDepthwiseConvolutionLayer3x3 &&) = default;
- /** Initialize the function's source, destination, conv and border_size.
- *
- * @param[in, out] input Source tensor. Data type supported: QASYMM8/F16/F32. (Written to only for border filling).
- * @param[in] weights Weights tensor. A 3D tensor with shape [3, 3, IFM].
- * Data type supported: Same as @p input or QASYMM8/QSYMM8_PER_CHANNEL when @p input is QASYMM8.
- * @param[in] biases Biases tensor. A 1D tensor with shape [IFM]. Must be nullptr if not needed.
- * Data type supported: Same as @p input.
- * @param[out] output Destination tensor. Data type supported: same as @p input.
- * @param[in] conv_info Padding and stride information to use for the convolution.
- * @param[in] depth_multiplier (Optional) Multiplier to apply to the input's depth in order to retrieve the output's depth. Defaults to 1.
- * @param[in] act_info (Optional) Activation layer information in case of a fused activation. Only RELU, BOUNDED_RELU and LU_BOUNDED_RELU for 3x3 QASYMM8 supported.
- * @param[in] dilation (Optional) Dilation, in elements, across x and y. Defaults to (1, 1).
- */
- ARM_COMPUTE_DEPRECATED_REL_REPLACE(20.02, CLDepthwiseConvolutionLayer)
- void configure(ICLTensor *input, const ICLTensor *weights, const ICLTensor *biases, ICLTensor *output, const PadStrideInfo &conv_info, unsigned int depth_multiplier = 1,
- ActivationLayerInfo act_info = ActivationLayerInfo(), const Size2D &dilation = Size2D(1U, 1U));
- /** Initialize the function's source, destination, conv and border_size.
- *
- * @param[in] compile_context The compile context to be used.
- * @param[in, out] input Source tensor. Data type supported: QASYMM8/F16/F32. (Written to only for border filling).
- * @param[in] weights Weights tensor. A 3D tensor with shape [3, 3, IFM].
- * Data type supported: Same as @p input or QASYMM8/QSYMM8_PER_CHANNEL when @p input is QASYMM8.
- * @param[in] biases Biases tensor. A 1D tensor with shape [IFM]. Must be nullptr if not needed.
- * Data type supported: Same as @p input.
- * @param[out] output Destination tensor. Data type supported: same as @p input.
- * @param[in] conv_info Padding and stride information to use for the convolution.
- * @param[in] depth_multiplier (Optional) Multiplier to apply to the input's depth in order to retrieve the output's depth. Defaults to 1.
- * @param[in] act_info (Optional) Activation layer information in case of a fused activation. Only RELU, BOUNDED_RELU and LU_BOUNDED_RELU for 3x3 QASYMM8 supported.
- * @param[in] dilation (Optional) Dilation, in elements, across x and y. Defaults to (1, 1).
- */
- ARM_COMPUTE_DEPRECATED_REL_REPLACE(20.02, CLDepthwiseConvolutionLayer)
- void configure(const CLCompileContext &compile_context, ICLTensor *input, const ICLTensor *weights, const ICLTensor *biases, ICLTensor *output, const PadStrideInfo &conv_info,
- unsigned int depth_multiplier = 1, ActivationLayerInfo act_info = ActivationLayerInfo(), const Size2D &dilation = Size2D(1U, 1U));
-
- /** Static function to check if given info will lead to a valid configuration of @ref CLDepthwiseConvolutionLayer3x3
- *
- * @param[in] input Source tensor info. Data type supported: QASYMM8 for all layouts, F16/F32 for NCHW.
- * @param[in] weights Weights tensor info. A 3D tensor with shape [3, 3, IFM].
- * Data type supported: Same as @p input or QASYMM8/QSYMM8_PER_CHANNEL when @p input is QASYMM8.
- * @param[in] biases Biases tensor info. A 1D tensor with shape [IFM]. Must be nullptr if not needed.
- * Data type supported: Same as @p input, S32 when input is QASYMM8.
- * @param[in] output Destination tensor. Data type supported: same as @p input.
- * @param[in] conv_info Padding and stride information to use for the convolution.
- * @param[in] depth_multiplier (Optional) Multiplier to apply to the input's depth in order to retrieve the output's depth. Defaults to 1.
- * @param[in] act_info (Optional) Activation layer information in case of a fused activation. Only RELU, BOUNDED_RELU and LU_BOUNDED_RELU for 3x3 QASYMM8 supported.
- * @param[in] gpu_target (Optional) GPU target to validate the kernel for. Defaults to midgard.
- * @param[in] dilation (Optional) Dilation, in elements, across x and y. Defaults to (1, 1).
- *
- * @return a status
- */
- static Status validate(const ITensorInfo *input, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *output, const PadStrideInfo &conv_info, unsigned int depth_multiplier = 1,
- ActivationLayerInfo act_info = ActivationLayerInfo(), GPUTarget gpu_target = GPUTarget::MIDGARD, const Size2D &dilation = Size2D(1U, 1U));
-
- // Inherited methods overriden:
- void run() override;
- void prepare() override;
-
-private:
- CLDepthwiseConvolutionLayer _func;
-};
} // namespace arm_compute
#endif /*ARM_COMPUTE_CLDEPTHWISECONVOLUTION_H */
diff --git a/arm_compute/runtime/NEON/functions/NEDepthwiseConvolutionLayer.h b/arm_compute/runtime/NEON/functions/NEDepthwiseConvolutionLayer.h
index ccab671644..811dc82843 100644
--- a/arm_compute/runtime/NEON/functions/NEDepthwiseConvolutionLayer.h
+++ b/arm_compute/runtime/NEON/functions/NEDepthwiseConvolutionLayer.h
@@ -303,70 +303,5 @@ private:
NEDepthwiseConvolutionLayerOptimizedInternal _func_optimized;
NEDepthwiseConvolutionLayerGeneric _func_generic;
};
-
-/** Basic function to execute optimized depthwise convolution routines. This function calls the following NEON kernels:
- *
- * @note At the moment 3x3 and 5x5 convolution of stride 1, 2 are supported
- *
- * -# @ref NEFillBorderKernel (if pad_x or pad_y > 0) and no assembly kernel implementation is present
- * -# @ref NEDepthwiseConvolutionLayer3x3Kernel if 3x3 and no assembly kernel implementation is present
- * -# @ref NEDepthwiseConvolutionAssemblyDispatch if assembly kernel implementation is present
- * -# @ref NEDirectConvolutionLayerOutputStageKernel if re-quantization of output is required
- * -# @ref NEActivationLayer if fused activation is required
- *
- */
-class NEDepthwiseConvolutionLayerOptimized : public IFunction
-{
-public:
- /** Default constructor */
- NEDepthwiseConvolutionLayerOptimized(std::shared_ptr<IMemoryManager> memory_manager = nullptr);
- /** Prevent instances of this class from being copied (As this class contains pointers) */
- NEDepthwiseConvolutionLayerOptimized(const NEDepthwiseConvolutionLayerOptimized &) = delete;
- /** Default move constructor */
- NEDepthwiseConvolutionLayerOptimized(NEDepthwiseConvolutionLayerOptimized &&) = default;
- /** Prevent instances of this class from being copied (As this class contains pointers) */
- NEDepthwiseConvolutionLayerOptimized &operator=(const NEDepthwiseConvolutionLayerOptimized &) = delete;
- /** Default move assignment operator */
- NEDepthwiseConvolutionLayerOptimized &operator=(NEDepthwiseConvolutionLayerOptimized &&) = default;
- /** Initialize the function's source, destination, kernels and border_size.
- *
- * @param[in, out] input Source tensor. Data type supported: QASYMM8/QASYMM8_SIGNED/F16/F32. (Written to only for border filling).
- * @param[in] weights Weights tensor. These are 3D tensors with shape [W, H, IFM]. Data type supported: Same as @p input.
- * @param[in] biases Biases tensor. A 1D tensor with shape [IFM]. Must be nullptr if not needed.
- * Data type supported: Same as @p input, S32 when input is QASYMM8/QASYMM8_SIGNED.
- * @param[out] output Destination tensor. Data type supported: same as @p input.
- * @param[in] conv_info Padding and stride information to use for the convolution.
- * @param[in] depth_multiplier (Optional) Multiplier to apply to the input's depth in order to retrieve the output's depth. Defaults to 1.
- * @param[in] act_info (Optional) Activation layer information in case of a fused activation.
- * @param[in] dilation (Optional) Dilation, in elements, across x and y. Defaults to (1, 1).
- */
- ARM_COMPUTE_DEPRECATED_REL_REPLACE(20.02, NEDepthwiseConvolutionLayer)
- void configure(ITensor *input, const ITensor *weights, const ITensor *biases, ITensor *output, const PadStrideInfo &conv_info,
- unsigned int depth_multiplier = 1, const ActivationLayerInfo &act_info = ActivationLayerInfo(), const Size2D &dilation = Size2D(1U, 1U));
-
- /** Static function to check if given info will lead to a valid configuration of @ref NEDepthwiseConvolutionLayerOptimized
- *
- * @param[in] input Source tensor. Data type supported: QASYMM8/QASYMM8_SIGNED/F16/F32. (Written to only for border filling).
- * @param[in] weights Weights tensor. These are 3D tensors with shape [W, H, IFM]. Data type supported: Same as @p input.
- * @param[in] biases Biases tensor. A 1D tensor with shape [IFM]. Must be nullptr if not needed.
- * Data type supported: Same as @p input, S32 when input is QASYMM8/QASYMM8_SIGNED.
- * @param[in] output Destination tensor. Data type supported: same as @p input.
- * @param[in] conv_info Padding and stride information to use for the convolution.
- * @param[in] depth_multiplier (Optional) Multiplier to apply to the input's depth in order to retrieve the output's depth. Defaults to 1.
- * @param[in] act_info (Optional) Activation layer information in case of a fused activation.
- * @param[in] dilation (Optional) Dilation, in elements, across x and y. Defaults to (1, 1).
- *
- * @return a status
- */
- static Status validate(const ITensorInfo *input, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *output, const PadStrideInfo &conv_info,
- unsigned int depth_multiplier = 1, const ActivationLayerInfo &act_info = ActivationLayerInfo(), const Size2D &dilation = Size2D(1U, 1U));
-
- // Inherited methods overriden:
- void run() override;
- void prepare() override;
-
-private:
- NEDepthwiseConvolutionLayer _func;
-};
} // namespace arm_compute
#endif /* ARM_COMPUTE_NEDEPTHWISECONVOLUTION_H */ \ No newline at end of file
diff --git a/docs/00_introduction.dox b/docs/00_introduction.dox
index 6fed3080f9..39b83f27a3 100644
--- a/docs/00_introduction.dox
+++ b/docs/00_introduction.dox
@@ -299,6 +299,9 @@ v20.05 Public major release
- NEGEMMLowpQuantizeDownInt32ToUint8Scale
- Removed CPP kernels / functions:
- CPPFlipWeightsKernel
+ - Removed PoolingLayerInfo constructors without Data Layout.
+ - Removed CLDepthwiseConvolutionLayer3x3
+ - Removed NEDepthwiseConvolutionLayerOptimized
v20.02.1 Maintenance release
- Added Android-NN build script.
@@ -308,7 +311,7 @@ v20.02 Public major release
- Various optimisations.
- Added new data type QASYMM8_SIGNED support for:
- @ref CLDepthwiseConvolutionLayer
- - @ref CLDepthwiseConvolutionLayer3x3
+ - CLDepthwiseConvolutionLayer3x3
- @ref CLGEMMConvolutionLayer
- @ref CLGEMMLowpMatrixMultiplyCore
- @ref CLGEMMLowpMatrixMultiplyReshapedOnlyRHSKernel
@@ -340,9 +343,9 @@ v20.02 Public major release
- @ref NEFill
- @ref NEGEMMLowpQuantizeDownInt32ToInt8ScaleByFixedPointKernel / @ref NEGEMMLowpQuantizeDownInt32ToInt8ScaleByFixedPoint
- Deprecated NEON functions / interfaces:
- - @ref CLDepthwiseConvolutionLayer3x3
- - @ref NEDepthwiseConvolutionLayerOptimized
- - @ref PoolingLayerInfo constructors without Data Layout.
+ - CLDepthwiseConvolutionLayer3x3
+ - NEDepthwiseConvolutionLayerOptimized
+ - PoolingLayerInfo constructors without Data Layout.
- Added support for quantization with multiplier greater than 1 on NEON and CL.
- Added support for quantized inputs of type QASYMM8_SIGNED and QASYMM8 to @ref CLQuantizationLayer.
- Added the ability to build bootcode for bare metal.
@@ -486,8 +489,8 @@ v19.08 Public major release
- Added an optimized depthwise convolution layer kernel for 5x5 filters (NEON only)
- Added support to enable OpenCL kernel cache. Added example showing how to load the prebuilt OpenCL kernels from a binary cache file
- Altered @ref QuantizationInfo interface to support per-channel quantization.
- - The @ref CLDepthwiseConvolutionLayer3x3 will be included by @ref CLDepthwiseConvolutionLayer to accommodate for future optimizations.
- - The @ref NEDepthwiseConvolutionLayerOptimized will be included by @ref NEDepthwiseConvolutionLayer to accommodate for future optimizations.
+ - The CLDepthwiseConvolutionLayer3x3 will be included by @ref CLDepthwiseConvolutionLayer to accommodate for future optimizations.
+ - The NEDepthwiseConvolutionLayerOptimized will be included by @ref NEDepthwiseConvolutionLayer to accommodate for future optimizations.
- Removed inner_border_right and inner_border_top parameters from @ref CLDeconvolutionLayer interface
- Removed inner_border_right and inner_border_top parameters from @ref NEDeconvolutionLayer interface
- Optimized the NEON assembly kernel for GEMMLowp. The new implementation fuses the output stage and quantization with the matrix multiplication kernel
@@ -815,7 +818,7 @@ v18.02 Public major release
- @ref NEDepthwiseConvolutionLayer
- @ref NESoftmaxLayer
- Added FP16 support to:
- - @ref CLDepthwiseConvolutionLayer3x3
+ - CLDepthwiseConvolutionLayer3x3
- @ref CLDepthwiseConvolutionLayer
- Added broadcasting support to @ref NEArithmeticAddition / @ref CLArithmeticAddition / @ref CLPixelWiseMultiplication
- Added fused batched normalization and activation to @ref CLBatchNormalizationLayer and @ref NEBatchNormalizationLayer
@@ -941,7 +944,7 @@ v17.09 Public major release
- @ref NEReshapeLayerKernel / @ref NEReshapeLayer
- New OpenCL kernels / functions:
- - @ref CLDepthwiseConvolutionLayer3x3NCHWKernel @ref CLDepthwiseConvolutionLayer3x3NHWCKernel CLDepthwiseIm2ColKernel CLDepthwiseVectorToTensorKernel CLDepthwiseWeightsReshapeKernel / @ref CLDepthwiseConvolutionLayer3x3 @ref CLDepthwiseConvolutionLayer CLDepthwiseSeparableConvolutionLayer
+ - @ref CLDepthwiseConvolutionLayer3x3NCHWKernel @ref CLDepthwiseConvolutionLayer3x3NHWCKernel CLDepthwiseIm2ColKernel CLDepthwiseVectorToTensorKernel CLDepthwiseWeightsReshapeKernel / CLDepthwiseConvolutionLayer3x3 @ref CLDepthwiseConvolutionLayer CLDepthwiseSeparableConvolutionLayer
- @ref CLDequantizationLayerKernel / @ref CLDequantizationLayer
- @ref CLDirectConvolutionLayerKernel / @ref CLDirectConvolutionLayer
- @ref CLFlattenLayer
diff --git a/docs/06_functions_list.dox b/docs/06_functions_list.dox
index b6b94c4ade..155a356f30 100644
--- a/docs/06_functions_list.dox
+++ b/docs/06_functions_list.dox
@@ -123,7 +123,6 @@ namespace arm_compute
- @ref NEDeconvolutionLayer
- @ref NEDepthwiseConvolutionAssemblyDispatch
- @ref NEDepthwiseConvolutionLayer
- - @ref NEDepthwiseConvolutionLayerOptimized
- @ref NEDequantizationLayer
- @ref NEDerivative
- @ref NEDetectionPostProcessLayer
@@ -201,7 +200,6 @@ namespace arm_compute
- @ref CLDeconvolutionLayerUpsample
- @ref CLDepthToSpaceLayer
- @ref CLDepthwiseConvolutionLayer
- - @ref CLDepthwiseConvolutionLayer3x3
- @ref CLDequantizationLayer
- @ref CLDirectConvolutionLayer
- @ref CLDirectDeconvolutionLayer
diff --git a/src/runtime/CL/functions/CLDepthwiseConvolutionLayer.cpp b/src/runtime/CL/functions/CLDepthwiseConvolutionLayer.cpp
index 0b7a33401d..b1e9fe77d4 100644
--- a/src/runtime/CL/functions/CLDepthwiseConvolutionLayer.cpp
+++ b/src/runtime/CL/functions/CLDepthwiseConvolutionLayer.cpp
@@ -117,40 +117,6 @@ Status validate_arguments_3x3(const ITensorInfo *input, const ITensorInfo *weigh
}
} // namespace
-CLDepthwiseConvolutionLayer3x3::CLDepthwiseConvolutionLayer3x3(std::shared_ptr<IMemoryManager> memory_manager)
- : _func(std::move(memory_manager))
-{
-}
-
-void CLDepthwiseConvolutionLayer3x3::configure(ICLTensor *input, const ICLTensor *weights, const ICLTensor *biases, ICLTensor *output, const PadStrideInfo &conv_info, unsigned int depth_multiplier,
- ActivationLayerInfo act_info, const Size2D &dilation)
-{
- _func.configure(CLKernelLibrary::get().get_compile_context(), input, weights, biases, output, conv_info, depth_multiplier, act_info, dilation);
-}
-
-void CLDepthwiseConvolutionLayer3x3::configure(const CLCompileContext &compile_context, ICLTensor *input, const ICLTensor *weights, const ICLTensor *biases, ICLTensor *output,
- const PadStrideInfo &conv_info, unsigned int depth_multiplier,
- ActivationLayerInfo act_info, const Size2D &dilation)
-{
- _func.configure(compile_context, input, weights, biases, output, conv_info, depth_multiplier, act_info, dilation);
-}
-
-Status CLDepthwiseConvolutionLayer3x3::validate(const ITensorInfo *input, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *output, const PadStrideInfo &conv_info,
- unsigned int depth_multiplier, ActivationLayerInfo act_info, GPUTarget gpu_target, const Size2D &dilation)
-{
- return validate_arguments_3x3(input, weights, biases, output, conv_info, depth_multiplier, act_info, gpu_target, dilation);
-}
-
-void CLDepthwiseConvolutionLayer3x3::run()
-{
- _func.run();
-}
-
-void CLDepthwiseConvolutionLayer3x3::prepare()
-{
- _func.prepare();
-}
-
CLDepthwiseConvolutionLayer::CLDepthwiseConvolutionLayerGeneric::CLDepthwiseConvolutionLayerGeneric(std::shared_ptr<IMemoryManager> memory_manager)
: _memory_group(std::move(memory_manager)),
_dwc_native_kernel(),
@@ -411,7 +377,7 @@ void CLDepthwiseConvolutionLayer::CLDepthwiseConvolutionLayerInternal3x3::config
// Perform validation step
ARM_COMPUTE_ERROR_ON_NULLPTR(input, weights, output);
- ARM_COMPUTE_ERROR_THROW_ON(CLDepthwiseConvolutionLayer3x3::validate(input->info(),
+ ARM_COMPUTE_ERROR_THROW_ON(CLDepthwiseConvolutionLayerInternal3x3::validate(input->info(),
weights->info(),
biases != nullptr ? biases->info() : nullptr,
output->info(),
diff --git a/src/runtime/NEON/functions/NEDepthwiseConvolutionLayer.cpp b/src/runtime/NEON/functions/NEDepthwiseConvolutionLayer.cpp
index beb024c529..7214971044 100644
--- a/src/runtime/NEON/functions/NEDepthwiseConvolutionLayer.cpp
+++ b/src/runtime/NEON/functions/NEDepthwiseConvolutionLayer.cpp
@@ -86,38 +86,6 @@ Status validate_arguments_optimized(const ITensorInfo *input, const ITensorInfo
}
} // namespace
-NEDepthwiseConvolutionLayerOptimized::NEDepthwiseConvolutionLayerOptimized(std::shared_ptr<IMemoryManager> memory_manager)
- : _func(std::move(memory_manager))
-{
-}
-
-void NEDepthwiseConvolutionLayerOptimized::configure(ITensor *input,
- const ITensor *weights,
- const ITensor *biases,
- ITensor *output, const PadStrideInfo &conv_info,
- unsigned int depth_multiplier,
- const ActivationLayerInfo &act_info,
- const Size2D &dilation)
-{
- _func.configure(input, weights, biases, output, conv_info, depth_multiplier, act_info, dilation);
-}
-
-Status NEDepthwiseConvolutionLayerOptimized::validate(const ITensorInfo *input, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *output, const PadStrideInfo &conv_info,
- unsigned int depth_multiplier, const ActivationLayerInfo &act_info, const Size2D &dilation)
-{
- return validate_arguments_optimized(input, weights, biases, output, conv_info, depth_multiplier, act_info, dilation);
-}
-
-void NEDepthwiseConvolutionLayerOptimized::run()
-{
- _func.run();
-}
-
-void NEDepthwiseConvolutionLayerOptimized::prepare()
-{
- _func.prepare();
-}
-
NEDepthwiseConvolutionLayer::NEDepthwiseConvolutionLayerOptimizedInternal::NEDepthwiseConvolutionLayerOptimizedInternal(std::shared_ptr<IMemoryManager> memory_manager)
: _memory_group(memory_manager), _dwc_kernel(), _dwc_optimized_func(memory_manager), _output_stage_kernel(), _border_handler(), _permute_input(), _permute_weights(), _permute_output(),
_activationlayer_function(), _accumulator(), _permuted_input(), _permuted_weights(), _permuted_output(), _original_weights(nullptr), _has_bias(false), _is_quantized(false), _is_optimized(false),
@@ -563,7 +531,7 @@ Status NEDepthwiseConvolutionLayer::validate(const ITensorInfo *input, const ITe
switch(depth_conv_func)
{
case DepthwiseConvolutionFunction::OPTIMIZED:
- return NEDepthwiseConvolutionLayerOptimized::validate(input, weights, biases, output, conv_info, depth_multiplier, act_info, dilation);
+ return NEDepthwiseConvolutionLayerOptimizedInternal::validate(input, weights, biases, output, conv_info, depth_multiplier, act_info, dilation);
break;
case DepthwiseConvolutionFunction::GENERIC:
return NEDepthwiseConvolutionLayerGeneric::validate(input, weights, biases, output, conv_info, depth_multiplier, act_info, dilation);
@@ -577,7 +545,7 @@ DepthwiseConvolutionFunction NEDepthwiseConvolutionLayer::get_depthwiseconvoluti
const PadStrideInfo &conv_info,
unsigned int depth_multiplier, ActivationLayerInfo act_info, const Size2D &dilation)
{
- if(bool(NEDepthwiseConvolutionLayerOptimized::validate(input, weights, biases, output, conv_info, depth_multiplier, act_info, dilation)))
+ if(bool(NEDepthwiseConvolutionLayerOptimizedInternal::validate(input, weights, biases, output, conv_info, depth_multiplier, act_info, dilation)))
{
return DepthwiseConvolutionFunction::OPTIMIZED;
}
diff --git a/tests/validation/CL/DepthwiseConvolutionLayer.cpp b/tests/validation/CL/DepthwiseConvolutionLayer.cpp
index 2e8febf517..07b1235cea 100644
--- a/tests/validation/CL/DepthwiseConvolutionLayer.cpp
+++ b/tests/validation/CL/DepthwiseConvolutionLayer.cpp
@@ -64,135 +64,7 @@ TEST_SUITE(DepthwiseConvolutionLayer)
// *INDENT-OFF*
// clang-format off
-DATA_TEST_CASE(Validate3x3, framework::DatasetMode::ALL, zip(zip(zip(zip(zip(zip(zip(zip(
- framework::dataset::make("InputInfo", { TensorInfo(TensorShape(32U, 18U, 2U), 1, DataType::F32), // Mismatching data type input/weights
- TensorInfo(TensorShape(32U, 18U, 3U), 1, DataType::F32), // Mismatching input feature maps
- TensorInfo(TensorShape(32U, 18U, 2U), 1, DataType::F32), // Unsupported weights dimensions
- TensorInfo(TensorShape(32U, 18U, 2U), 1, DataType::QASYMM8), // Unsupported activation
- TensorInfo(TensorShape(32U, 18U, 2U), 1, DataType::F32), // Mismatching depth multiplier
- TensorInfo(TensorShape(32U, 18U, 2U), 1, DataType::F32), // Invalid stride
- TensorInfo(TensorShape(32U, 18U, 2U), 1, DataType::F32), // Invalid biases size
- TensorInfo(TensorShape(32U, 18U, 2U), 1, DataType::F32), // Invalid biases dimensions
- TensorInfo(TensorShape(32U, 18U, 2U), 1, DataType::F32), // Invalid output size
- TensorInfo(TensorShape(27U, 13U, 2U), 1, DataType::F32), // Window shrink
- TensorInfo(TensorShape(32U, 18U, 8U), 1, DataType::F32), // patch size bigger than input width
- TensorInfo(TensorShape(32U, 18U, 8U), 1, DataType::F32), // dilation < 1
- TensorInfo(TensorShape(32U, 18U, 8U), 1, DataType::F32),
- TensorInfo(TensorShape(50U, 32U, 8U), 1, DataType::QASYMM8),
- }),
- framework::dataset::make("WeightsInfo", { TensorInfo(TensorShape(3U, 3U, 2U), 1, DataType::F16),
- TensorInfo(TensorShape(3U, 3U, 2U), 1, DataType::F32),
- TensorInfo(TensorShape(5U, 5U, 2U), 1, DataType::F32),
- TensorInfo(TensorShape(3U, 3U, 2U), 1, DataType::QASYMM8),
- TensorInfo(TensorShape(3U, 3U, 2U), 1, DataType::F32),
- TensorInfo(TensorShape(3U, 3U, 2U), 1, DataType::F32),
- TensorInfo(TensorShape(3U, 3U, 2U), 1, DataType::F32),
- TensorInfo(TensorShape(3U, 3U, 2U), 1, DataType::F32),
- TensorInfo(TensorShape(3U, 3U, 2U), 1, DataType::F32),
- TensorInfo(TensorShape(3U, 3U, 2U), 1, DataType::F32),
- TensorInfo(TensorShape(3U, 3U, 16U), 1, DataType::F32),
- TensorInfo(TensorShape(3U, 3U, 16U), 1, DataType::F32),
- TensorInfo(TensorShape(3U, 3U, 16U), 1, DataType::F32),
- TensorInfo(TensorShape(3U, 3U, 24U), 1, DataType::QASYMM8),
- })),
- framework::dataset::make("BiasesInfo", { TensorInfo(TensorShape(2U), 1, DataType::F32),
- TensorInfo(TensorShape(2U), 1, DataType::F32),
- TensorInfo(TensorShape(2U), 1, DataType::F32),
- TensorInfo(TensorShape(2U), 1, DataType::S32),
- TensorInfo(TensorShape(2U), 1, DataType::F32),
- TensorInfo(TensorShape(2U), 1, DataType::F32),
- TensorInfo(TensorShape(4U), 1, DataType::F32),
- TensorInfo(TensorShape(2U, 2U), 1, DataType::F32),
- TensorInfo(TensorShape(2U), 1, DataType::F32),
- TensorInfo(TensorShape(2U), 1, DataType::F32),
- TensorInfo(TensorShape(16U), 1, DataType::F32),
- TensorInfo(TensorShape(16U), 1, DataType::F32),
- TensorInfo(TensorShape(16U), 1, DataType::F32),
- TensorInfo(TensorShape(24U), 1, DataType::S32),
- })),
- framework::dataset::make("OutputInfo", { TensorInfo(TensorShape(30U, 16U, 2U), 1, DataType::F32),
- TensorInfo(TensorShape(30U, 16U, 2U), 1, DataType::F32),
- TensorInfo(TensorShape(30U, 16U, 2U), 1, DataType::F32),
- TensorInfo(TensorShape(30U, 16U, 2U), 1, DataType::QASYMM8),
- TensorInfo(TensorShape(30U, 16U, 2U), 1, DataType::F32),
- TensorInfo(TensorShape(30U, 16U, 2U), 1, DataType::F32),
- TensorInfo(TensorShape(30U, 16U, 2U), 1, DataType::F32),
- TensorInfo(TensorShape(30U, 16U, 2U), 1, DataType::F32),
- TensorInfo(TensorShape(32U, 18U, 2U), 1, DataType::F32),
- TensorInfo(TensorShape(25U, 11U, 2U), 1, DataType::F32),
- TensorInfo(TensorShape(30U, 16U, 16U), 1, DataType::F32),
- TensorInfo(TensorShape(30U, 16U, 16U), 1, DataType::F32),
- TensorInfo(TensorShape(30U, 16U, 16U), 1, DataType::F32),
- TensorInfo(TensorShape(48U, 30U, 24U), 1, DataType::QASYMM8),
- })),
- framework::dataset::make("ConvInfo", { PadStrideInfo(1, 1, 0, 0),
- PadStrideInfo(1, 1, 0, 0),
- PadStrideInfo(1, 1, 0, 0),
- PadStrideInfo(1, 1, 0, 0),
- PadStrideInfo(1, 1, 0, 0),
- PadStrideInfo(4, 1, 0, 0),
- PadStrideInfo(1, 1, 0, 0),
- PadStrideInfo(1, 1, 0, 0),
- PadStrideInfo(1, 1, 0, 0),
- PadStrideInfo(1, 1, 0, 0),
- PadStrideInfo(1, 1, 0, 0),
- PadStrideInfo(1, 1, 0, 0),
- PadStrideInfo(1, 1, 0, 0),
- PadStrideInfo(1, 1, 0, 0),
- })),
- framework::dataset::make("DepthMultiplier", { 1,
- 1,
- 1,
- 1,
- 3,
- 1,
- 1,
- 1,
- 1,
- 1,
- 2,
- 2,
- 2,
- 3,
- })),
- framework::dataset::make("ActivationInfo", { ActivationLayerInfo(),
- ActivationLayerInfo(),
- ActivationLayerInfo(),
- ActivationLayerInfo(ActivationLayerInfo::ActivationFunction::LINEAR),
- ActivationLayerInfo(),
- ActivationLayerInfo(),
- ActivationLayerInfo(),
- ActivationLayerInfo(),
- ActivationLayerInfo(),
- ActivationLayerInfo(),
- ActivationLayerInfo(),
- ActivationLayerInfo(),
- ActivationLayerInfo(),
- ActivationLayerInfo(ActivationLayerInfo::ActivationFunction::RELU),
- })),
- framework::dataset::make("Dilation", { Size2D(1U, 1U),
- Size2D(1U, 1U),
- Size2D(1U, 1U),
- Size2D(1U, 1U),
- Size2D(1U, 1U),
- Size2D(1U, 1U),
- Size2D(1U, 1U),
- Size2D(1U, 1U),
- Size2D(1U, 1U),
- Size2D(1U, 1U),
- Size2D(20U, 1U),
- Size2D(0U, 1U),
- Size2D(1U, 1U),
- Size2D(1U, 1U),
- })),
- framework::dataset::make("Expected", { false, false, false, false, false, false, false, false, false, false, false, false, true, true })),
- input_info, weights_info, biases_info, output_info, conv_info, depth_multiplier, act_info, dilation, expected)
-{
- bool is_valid = bool(CLDepthwiseConvolutionLayer3x3::validate(&input_info.clone()->set_is_resizable(false), &weights_info.clone()->set_is_resizable(false), &biases_info.clone()->set_is_resizable(false), &output_info.clone()->set_is_resizable(false), conv_info, depth_multiplier, act_info,GPUTarget::MIDGARD, dilation));
- ARM_COMPUTE_EXPECT(is_valid == expected, framework::LogLevel::ERRORS);
-}
-
-DATA_TEST_CASE(ValidateGeneric, framework::DatasetMode::ALL, zip(zip(zip(zip(zip(zip(zip(
+DATA_TEST_CASE(Validate, framework::DatasetMode::ALL, zip(zip(zip(zip(zip(zip(zip(
framework::dataset::make("InputInfo", { TensorInfo(TensorShape(27U, 13U, 2U), 1, DataType::F32), // Mismatching data type input/weights
TensorInfo(TensorShape(27U, 13U, 3U), 1, DataType::F32), // Mismatching input feature maps
TensorInfo(TensorShape(27U, 13U, 2U), 1, DataType::F32), // Mismatching depth multiplier