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Integer inputs and outputs to TOSA operators are now defined as signless
values. In most instances the operator will used signed arithmetic as
indicated in previous versions of the specification resulting in little
functional change to the specification.
New attributes have been added to the RESCALE operator to indicate
whether the input and output values should be treated as signed or unsigned.
Explicit use of static_cast, sign_extend, zero_extend and truncate are added
to the pseudocode to avoid ambiguity.
Change-Id: I71c67d3e5aeaabc418c768f821fce6ee3eebb65b
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Adds a local_bound flag to convolution operations.
If the local_bound flag is true then the output accuracy
for floating-point is measured relative to the
input tensor data local to the particular convolution output.
If the local_bound flag is false then the output accuracy
for floating-point is measured relative to the whole input tensor.
This accuracy measure is the default and more approapriate for
implementations with non local optimizations (such as
transform based fast convolutions).
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
Change-Id: I64e3e4981a63e26e6391149e28d5d71e7ef5560a
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Shape inference derives the shape of tensors in
the graph from input shapes. Operations such as RESHAPE
may need calculations to derive the new tensor shape.
This patch:
- Adds a DIM operator to get the size of a tensor in
a given axis as a rank 0 tensor of type shape_t
- Allows RESHAPE to take a 1D shape tensor as input for
the new shape
- Allows RESIZE, TILE, PAD to take input sizes based
on shape tensors.
- Allows ADD, SUB, MUL, INTDIV to operate on rank 0
shape_t tensors
- Allows CONCAT to concatenate 0D shape_t tensors to
a 1D shape_t tensor
- Adds CONST support for shape_t tensors
In this version of the specification shape tensors must
be resolvable to constants at backend compile time.
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
Change-Id: I484bd44452453b5e05d0d8a82689564587b224e4
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Nesting of if/while is bounded by MAX_NESTING,
set accoring to the TOSA level.
Change-Id: If9435a143ffa6bd7ba2e46a68542459b3d723b76
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
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Defined for floating-point types only.
For integer versions, a TABLE should be used.
Change-Id: Ieaec6e6eb3227c5dcd9741cddd57426002a8db4d
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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- Standardise the terminology for operator arguments. Argument,
Operand, and Parameter were used interchangeably.
- Introduce a templatized tensor_t<> type for tensor arguments.
Scalars are represented by rank-0 tensors.
- Types can be checked with the XSD schema.
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
Change-Id: Ic57b9387950824e994c5e7f9ec1489c29159b974
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Provide the mathematical formulas for sigmoid and tanh.
Define the operation function for sigmoid and tanh for
floating-point numbers.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: Ib949d2e8e06309e5c5292aa0192746ad0f9b1f11
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Add REQUIRE statements to constrain the range where needed.
Also fix a typo.
Change-Id: I281e6249d8951b4cb3ff19eaf199660bed3feac9
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
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- Add additional main inference compliance test
data sets for dot product testing in Appendix A.
- Express dot product test criteria in terms of
tensors rather than individual dot products.
- Add per-operation details on test set generation
in Appendix A.
- Clarify compliance vs conformance wording.
- Clarify that the comment in the table of section 1.8.2
on integer saturation applies to the CAST from
floating point to integer operation.
Change-Id: I1b4c4493b02ed7c8a6eb547656c91ca67d4b0e86
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
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The tensor size in bytes must fit within the level
defined size range.
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
Change-Id: I131e3aa7e8666b4d0093ae8198367f243081da51
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Also make LEVEL_CHECKs unconditional in pseudocode. The various
MAX_* maximums are always defined.
Change-Id: Iee5d8ade5cba3b4f86cc09f8b867b59fe18f5cfe
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
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Also replace all instances of "co-ordinate" with "coordinate" for
consistency.
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
Change-Id: Idff73092711d3ff85bf4db33df92924c754cf451
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Add a check on the error bias for dot
product calculations and slightly increase the
error variance bound for dot products.
Change-Id: I518704d1fb1b109695b0f90f7ca6733850e6a8c7
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
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This patch contains a draft of the
Main Inference profile floating-point
conformance requirements.
Change-Id: Ib1201fff7f4015668b2de6dccf4cd85b419c3f76
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
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Add definition of Level 1.0.
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
Change-Id: I1b34ae22396f273cc5ecdf99198fdbece6e2809c
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Tensor co-ordinate indices are signed 32-bit values
in this version of the specification.
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
Change-Id: I6b8dde500ef9c4c4c5688c1a43f8d658863e4a49
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The current value is too strict, and can lead to some cases to fail.
By making the new value limit between (-1 << shift-1) and (1 << shift-1),
we still restrict the input value a range that works for optimized implementations
that left shift their values before multiplying.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: Ib4f49732e361418884888d398087560da3ccd6e8
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Define operations in terms of common floating-point data
types. Definitions for the data types are in the introduction.
Added a section to describe status of the different profiles.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: Iac57026806acfb7913f40af61176322fb02b7cc1
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The information on quantization and numerics was out of date.
The tensor access helpers were also consolidated and moved into
their own section in the pseudocode chapter.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I472e674ed88f4a3ef379010cf50b13cf8afa5f17
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An unsigned 16-bit integer data type for use with image networks.
Limited to only operating with the RESCALE operator for conversion
to signed int16.
Zero point can be 0 or 32768 in the RESCALE to allow for no loss of
precision (by subtracting 32768), or keeping all values as positive,
(zero point=0) with scaling/clipping as defined in the other RESCALE
arguments.
Change-Id: Id1aebab68fa207f8f8cc235fc3fa5d050307198e
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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Clarify for types previously definded as int
the width assumed by the specification.
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
Change-Id: Ied62d4803a4323a600d33cff09752a76ca48f18d
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Cover cases where NaN, +/- 0, +/- infinity are involved
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I1a5a23c7b856ddb997f7cdc00282420294ef3e6d
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The interpolation slope must not exceed
int16_t range.
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
Change-Id: Ic9037dcc11c293c78b9398952118a129e3be66f5
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Range checking adjusted to test that
optimized implementations with prior left
shift do not overflow.
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
Change-Id: I45a851a1dfc1f1a767f912bb1429d047ed0fb110
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ERROR_IF to make sure rank(index) == rank(out_shape)
Also try to better explain what the expected value for index is.
Change-Id: I0731324d33335cb1ffc0a6fbd153fbc8521ce2e9
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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We can't easily spell check the entire specification, the
pseudocode and operator tables make it unworkable. This
adds a simple python script that tries to extract just the
description of the operators for checking. It also does a check
over the entire license.
A custom dictionary is used to contain specification custom words.
Change-Id: I74558c03af1506e2970f20b3246d920c2753ca44
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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Operators which use the zero-point functionalty for 8-bit integer
processing are updated to do the zero-point subtract in their
pseudocode.
Note that the PAD operator no longer takes a zero point argument,
and instead requires callers to account for the zero point in the
pad_const argument.
Change-Id: I3bca1cae85aa2093000c420f0433633c347a29de
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PAD now takes an additional attribute, with the padding value.
Will generally be zero, but other values are allowed.
tensor_read now requires the coordinates to be within the
given tensor, with unpredictable behavior occurring if an access
outside of the tensor occurs. Callers of tensor_read are expected
to check the coordinates and take the appropriate action. The
primary impact of this is to move the responsibility for padding to
each operator. In practice, this is expected to not be a functional
change, but a cleanup to make the behavior more clear.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I4f21ca9a13d82d422bbd66c400f23aa9a0bd2aa0
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Catch zero and negative sized tensors.
Clarify configuration of bool_t in the reference model.
int4_t limitations on -8 to stay symmetric around 0.
Pad values must be >= 0.
Stride,dilation values must be >= 1.
Change-Id: Idb6ef740f855912a8340475ba319816f90c9b051
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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Signed-off-by: Dominic Symes <dominic.symes@arm.com>
Change-Id: I2e25d0467843adb078d5ab9fd681af40b2ffa52e
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REQUIRE is a direct replacement for the asserts, and uses
the unpredictable() function in pseudocode to describe the required
conditions for operators
Change-Id: I35dc81e083d8e41f16728d992bdb8b06b0271226
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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They are all now [source,c++] and use ---- as the
delimiter.
Also made the pseudocode indentation consistent (4 spaces)
in the introduction sections.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I1287a60cfeae8b7e3c63b9fc8885b1ebf3d3386d
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When reading tensor values with zero point, the returned value
has one more bit than the original to account for zero point.
Update cases of apply_clip to properly represent the types
involved.
Change-Id: I60c17b1b244c34b4f04f042807936ae0f282ce93
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Attempt to get consistent across the pseudocode.
Change the data types to all be intN_t instead of some cases of intN.
Use float_t as the general floating point data type.
Be consistent on use of the term "floating-point"
Move general pseudocode helpers to their own section.
Change-Id: Ie77666cd3ee438c71f39c62b9c424fe687b0bb51
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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Elementwise operators no longer scale their inputs to a
common range. The elementwise introductory section reflected
the old behavior.
Also clear up some language on the unary functions.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I86bf9da8b51e9a64e4fe6766e01f0c35d43d805a
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The aint8 type represented an asymmetrically quantized range.
With the change to move scaling fully into the RESCALE operator,
the aint8 and int8 types didn't have significant differences in
their use with operators. Unifying to a single data type makes
things simpler.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I3ee89cbdafdc61293ef1f1bec52398d744e716a1
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scale_t is already defined globally for the rescaling.
Move pseudocode for count_leading_zeros to introduction,
and use it in the implementation of CLZ.
Change-Id: I2453bce93b6dd25e870b8a010fc62af4c001cbf9
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Bring the overview and goals up to date.
Incorporate a section on finding the source to the
spec and building it.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I8c862f8e58b01091d5561296702bcae83a8517e9
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Currently only enabled for the accumulator of a convolution and the
input to a RESCALE.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: Ic5474124b4a8735f12ef9c20c2be48e55767a3fc
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The result of 32x32 elementwise multiply
exceeds the int32_t result type range.
This change adds a right scaling shift
argument to shift down the result.
Change-Id: I6ae17e6dc3fe342d052304533158ad2d0e7bb7be
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
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Complete the function naming change from
dimensions() to rank(). Fix MATMUL to
use apply_add() for additions, consistent
with the other operations.
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
Change-Id: I6ba84cf8b016505e8477b04dd00f2a2bf3194492
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rank() is consistent with the rest of the specification.
Also add a bit of whitespace in the pseudocode for easier
reading.
Fix one typo.
Change-Id: Ifa794b2c332cb70cd52a141d9af219e26bd3dca0
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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Change-Id: I7c528ebf7e78759ada4bb951b2471c367d3f4525
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