From 3a4785772a0f076e2e9653ad70dbb2fc412ac302 Mon Sep 17 00:00:00 2001 From: Kevin Cheng Date: Fri, 22 Jan 2021 17:21:02 -0800 Subject: Remove AINT8 - Updated C and Py serialization libraries, updated licence files - Removed AINT8 from TOSA reference tests Signed-off-by: Kevin Cheng Signed-off-by: Jared Smolens Change-Id: I860bfeaad5a075e50f569c8f6861927ebacf1378 --- reference_model/src/ops/activation_funcs.cc | 6 +-- reference_model/src/ops/data_layout.cc | 9 +--- reference_model/src/ops/data_nodes.cc | 4 +- reference_model/src/ops/ewise_binary.cc | 14 +++--- reference_model/src/ops/ewise_ternary.cc | 3 +- reference_model/src/ops/ewise_unary.cc | 10 ++-- reference_model/src/ops/op_factory.cc | 76 ++++++++++++----------------- reference_model/src/ops/reduction.cc | 6 +-- reference_model/src/ops/scatter_gather.cc | 6 +-- reference_model/src/ops/template_types.h | 31 ++---------- reference_model/src/ops/tensor_ops.cc | 30 +++++------- reference_model/src/ops/type_conversion.cc | 38 ++++----------- reference_model/src/quant_util.h | 13 +---- reference_model/src/tensor.cc | 5 +- reference_model/src/tensor.h | 3 +- serialization/tosa.fbs | 3 +- serialization/tosa_generated.h | 21 ++++---- verif/tosa/DType.py | 17 +++---- verif/tosa_serializer.py | 3 +- verif/tosa_test_gen.py | 64 ++++++++++-------------- 20 files changed, 130 insertions(+), 232 deletions(-) diff --git a/reference_model/src/ops/activation_funcs.cc b/reference_model/src/ops/activation_funcs.cc index bca9507..3410ba9 100644 --- a/reference_model/src/ops/activation_funcs.cc +++ b/reference_model/src/ops/activation_funcs.cc @@ -1,5 +1,5 @@ -// Copyright (c) 2020, ARM Limited. +// Copyright (c) 2020-2021, ARM Limited. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -35,7 +35,7 @@ int OpClamp::register_fcn() this->fcn = [min, max](InEigenType a) -> OutEigenType { return a <= min ? min : a >= max ? max : a; }; } break; - case DType_AINT8: + case DType_INT8: case DType_INT16: { InEigenType min = (InEigenType)attribute->min_int(); @@ -107,7 +107,7 @@ int OpTanh::register_fcn() // template explicit instantiation DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpClamp, FLOAT); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpClamp, AINT8); +DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpClamp, INT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpClamp, INT16); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpReluN, FLOAT); diff --git a/reference_model/src/ops/data_layout.cc b/reference_model/src/ops/data_layout.cc index 32029b9..c1a14b7 100644 --- a/reference_model/src/ops/data_layout.cc +++ b/reference_model/src/ops/data_layout.cc @@ -1,5 +1,5 @@ -// Copyright (c) 2020, ARM Limited. +// Copyright (c) 2020-2021, ARM Limited. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -595,49 +595,42 @@ int OpTranspose::eval() // template explicit instantiation DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpConcat, FLOAT) -DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpConcat, AINT8) DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpConcat, INT8) DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpConcat, INT16) DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpConcat, INT32) DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpConcat, BOOL) DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpPad, FLOAT); -DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpPad, AINT8); DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpPad, INT8); DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpPad, INT16); DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpPad, INT32); DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpPad, BOOL); DEF_INSTANTIATE_RESHAPE(OpReshape, FLOAT); -DEF_INSTANTIATE_RESHAPE(OpReshape, AINT8); DEF_INSTANTIATE_RESHAPE(OpReshape, INT8); DEF_INSTANTIATE_RESHAPE(OpReshape, INT16); DEF_INSTANTIATE_RESHAPE(OpReshape, INT32); DEF_INSTANTIATE_RESHAPE(OpReshape, BOOL); DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpReverse, FLOAT); -DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpReverse, AINT8); DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpReverse, INT8); DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpReverse, INT16); DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpReverse, INT32); DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpReverse, BOOL); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpSlice, FLOAT); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpSlice, AINT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpSlice, INT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpSlice, INT16); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpSlice, INT32); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpSlice, BOOL); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpTile, FLOAT); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpTile, AINT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpTile, INT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpTile, INT16); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpTile, INT32); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpTile, BOOL); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpTranspose, FLOAT); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpTranspose, AINT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpTranspose, INT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpTranspose, INT16); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpTranspose, INT32); diff --git a/reference_model/src/ops/data_nodes.cc b/reference_model/src/ops/data_nodes.cc index 2ee4935..883cd1b 100644 --- a/reference_model/src/ops/data_nodes.cc +++ b/reference_model/src/ops/data_nodes.cc @@ -1,5 +1,5 @@ -// Copyright (c) 2020, ARM Limited. +// Copyright (c) 2020-2021, ARM Limited. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -158,14 +158,12 @@ int OpIdentityN::eval() // note OpConst and OpPlaceholder are not templated DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentity, FLOAT); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentity, AINT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentity, INT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentity, INT16); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentity, INT32); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentity, BOOL); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentityN, FLOAT); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentityN, AINT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentityN, INT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentityN, INT16); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentityN, INT32); diff --git a/reference_model/src/ops/ewise_binary.cc b/reference_model/src/ops/ewise_binary.cc index d07790e..7ed8374 100644 --- a/reference_model/src/ops/ewise_binary.cc +++ b/reference_model/src/ops/ewise_binary.cc @@ -1,5 +1,5 @@ -// Copyright (c) 2020, ARM Limited. +// Copyright (c) 2020-2021, ARM Limited. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -251,7 +251,7 @@ int OpBitwiseAnd::register_fcn() { switch (Dtype) { - case DType_AINT8: + case DType_INT8: case DType_INT16: case DType_INT32: this->fcn = [](InEigenType a, InEigenType b) -> OutEigenType { return a & b; }; @@ -268,7 +268,7 @@ int OpBitwiseOr::register_fcn() { switch (Dtype) { - case DType_AINT8: + case DType_INT8: case DType_INT16: case DType_INT32: this->fcn = [](InEigenType a, InEigenType b) -> OutEigenType { return a | b; }; @@ -285,7 +285,7 @@ int OpBitwiseXor::register_fcn() { switch (Dtype) { - case DType_AINT8: + case DType_INT8: case DType_INT16: case DType_INT32: this->fcn = [](InEigenType a, InEigenType b) -> OutEigenType { return a ^ b; }; @@ -567,15 +567,15 @@ DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpArithmeticRightShift, INT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpArithmeticRightShift, INT16); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpArithmeticRightShift, INT32); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseAnd, AINT8); +DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseAnd, INT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseAnd, INT16); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseAnd, INT32); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseOr, AINT8); +DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseOr, INT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseOr, INT16); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseOr, INT32); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseXor, AINT8); +DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseXor, INT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseXor, INT16); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseXor, INT32); diff --git a/reference_model/src/ops/ewise_ternary.cc b/reference_model/src/ops/ewise_ternary.cc index eded0d7..d4845f9 100644 --- a/reference_model/src/ops/ewise_ternary.cc +++ b/reference_model/src/ops/ewise_ternary.cc @@ -1,5 +1,5 @@ -// Copyright (c) 2020, ARM Limited. +// Copyright (c) 2020-2021, ARM Limited. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -108,7 +108,6 @@ int OpSelect<0, Dtype>::eval() // template explicit instantiation DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpSelect, FLOAT); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpSelect, AINT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpSelect, INT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpSelect, INT16); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpSelect, INT32); diff --git a/reference_model/src/ops/ewise_unary.cc b/reference_model/src/ops/ewise_unary.cc index d7bddc0..a73669c 100644 --- a/reference_model/src/ops/ewise_unary.cc +++ b/reference_model/src/ops/ewise_unary.cc @@ -1,5 +1,5 @@ -// Copyright (c) 2020, ARM Limited. +// Copyright (c) 2020-2021, ARM Limited. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -91,7 +91,7 @@ int OpBitwiseNot::register_fcn() { switch (Dtype) { - case DType_AINT8: + case DType_INT8: case DType_INT16: case DType_INT32: this->fcn = [](InEigenType a) -> OutEigenType { return ~a; }; @@ -228,7 +228,7 @@ int OpNegate::register_fcn() return result; }; break; - case DType_AINT8: + case DType_INT8: ASSERT(this->qinfo); this->fcn = [this](InEigenType a) -> OutEigenType { InEigenType result = -(a - this->qinfo->input_zp()) + this->qinfo->output_zp(); @@ -276,7 +276,7 @@ int OpRsqrt::register_fcn() DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpAbs, FLOAT); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpAbs, INT32); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseNot, AINT8); +DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseNot, INT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseNot, INT16); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseNot, INT32); @@ -293,7 +293,7 @@ DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpLog, FLOAT); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpLogicalNot, BOOL); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpNegate, FLOAT); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpNegate, AINT8); +DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpNegate, INT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpNegate, INT16); DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpNegate, INT32); diff --git a/reference_model/src/ops/op_factory.cc b/reference_model/src/ops/op_factory.cc index 4a06248..b326c63 100644 --- a/reference_model/src/ops/op_factory.cc +++ b/reference_model/src/ops/op_factory.cc @@ -1,5 +1,5 @@ -// Copyright (c) 2020, ARM Limited. +// Copyright (c) 2020-2021, ARM Limited. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -49,57 +49,53 @@ GraphNode* OpFactory::newOp(TosaSerializationHandler* tsh, // tensor_ops case Op_ARGMAX: DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpArgMax, FLOAT); - DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpArgMax, AINT8); + DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpArgMax, INT8); DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpArgMax, INT16); break; case Op_AVG_POOL2D: DEF_FACTORY_ONE_TYPE(OpAvgPool2d, FLOAT); - DEF_FACTORY_ONE_TYPE(OpAvgPool2d, AINT8); + DEF_FACTORY_ONE_TYPE(OpAvgPool2d, INT8); DEF_FACTORY_ONE_TYPE(OpAvgPool2d, INT16); break; case Op_CONV2D: DEF_FACTORY_TWO_TYPE(OpConv2d, FLOAT, FLOAT); - DEF_FACTORY_TWO_TYPE(OpConv2d, AINT8, INT4); - DEF_FACTORY_TWO_TYPE(OpConv2d, AINT8, INT8); - DEF_FACTORY_TWO_TYPE(OpConv2d, AINT8, AINT8); + DEF_FACTORY_TWO_TYPE(OpConv2d, INT8, INT4); + DEF_FACTORY_TWO_TYPE(OpConv2d, INT8, INT8); DEF_FACTORY_TWO_TYPE(OpConv2d, INT16, INT8); break; case Op_DEPTHWISE_CONV2D: DEF_FACTORY_TWO_TYPE(OpDepthwiseConv2d, FLOAT, FLOAT); - DEF_FACTORY_TWO_TYPE(OpDepthwiseConv2d, AINT8, INT4); - DEF_FACTORY_TWO_TYPE(OpDepthwiseConv2d, AINT8, INT8); - DEF_FACTORY_TWO_TYPE(OpDepthwiseConv2d, AINT8, AINT8); + DEF_FACTORY_TWO_TYPE(OpDepthwiseConv2d, INT8, INT4); + DEF_FACTORY_TWO_TYPE(OpDepthwiseConv2d, INT8, INT8); DEF_FACTORY_TWO_TYPE(OpDepthwiseConv2d, INT16, INT8); break; case Op_FULLY_CONNECTED: DEF_FACTORY_TWO_TYPE(OpFullyConnected, FLOAT, FLOAT); - DEF_FACTORY_TWO_TYPE(OpFullyConnected, AINT8, INT4); - DEF_FACTORY_TWO_TYPE(OpFullyConnected, AINT8, INT8); - DEF_FACTORY_TWO_TYPE(OpFullyConnected, AINT8, AINT8); + DEF_FACTORY_TWO_TYPE(OpFullyConnected, INT8, INT4); + DEF_FACTORY_TWO_TYPE(OpFullyConnected, INT8, INT8); DEF_FACTORY_TWO_TYPE(OpFullyConnected, INT16, INT8); break; case Op_MATMUL: DEF_FACTORY_ONE_TYPE(OpMatMul, FLOAT); - DEF_FACTORY_ONE_TYPE(OpMatMul, AINT8); + DEF_FACTORY_ONE_TYPE(OpMatMul, INT8); DEF_FACTORY_ONE_TYPE(OpMatMul, INT16); break; case Op_MAX_POOL2D: DEF_FACTORY_ONE_TYPE(OpMaxPool2d, FLOAT); - DEF_FACTORY_ONE_TYPE(OpMaxPool2d, AINT8); + DEF_FACTORY_ONE_TYPE(OpMaxPool2d, INT8); DEF_FACTORY_ONE_TYPE(OpMaxPool2d, INT16); break; case Op_TRANSPOSE_CONV2D: DEF_FACTORY_TWO_TYPE(OpTransposeConv2d, FLOAT, FLOAT); - DEF_FACTORY_TWO_TYPE(OpTransposeConv2d, AINT8, INT4); - DEF_FACTORY_TWO_TYPE(OpTransposeConv2d, AINT8, INT8); - DEF_FACTORY_TWO_TYPE(OpTransposeConv2d, AINT8, AINT8); + DEF_FACTORY_TWO_TYPE(OpTransposeConv2d, INT8, INT4); + DEF_FACTORY_TWO_TYPE(OpTransposeConv2d, INT8, INT8); DEF_FACTORY_TWO_TYPE(OpTransposeConv2d, INT16, INT8); break; // activation_funcs case Op_CLAMP: DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpClamp, FLOAT); - DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpClamp, AINT8); + DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpClamp, INT8); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpClamp, INT16); break; case Op_RELUN: @@ -124,17 +120,17 @@ GraphNode* OpFactory::newOp(TosaSerializationHandler* tsh, DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpArithmeticRightShift, INT32); break; case Op_BITWISE_AND: - DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseAnd, AINT8); + DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseAnd, INT8); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseAnd, INT16); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseAnd, INT32); break; case Op_BITWISE_OR: - DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseOr, AINT8); + DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseOr, INT8); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseOr, INT16); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseOr, INT32); break; case Op_BITWISE_XOR: - DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseXor, AINT8); + DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseXor, INT8); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseXor, INT16); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseXor, INT32); break; @@ -188,7 +184,7 @@ GraphNode* OpFactory::newOp(TosaSerializationHandler* tsh, DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpAbs, INT32); break; case Op_BITWISE_NOT: - DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseNot, AINT8); + DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseNot, INT8); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseNot, INT16); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseNot, INT32); break; @@ -212,7 +208,7 @@ GraphNode* OpFactory::newOp(TosaSerializationHandler* tsh, break; case Op_NEGATE: DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpNegate, FLOAT); - DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpNegate, AINT8); + DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpNegate, INT8); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpNegate, INT16); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpNegate, INT32); break; @@ -226,7 +222,6 @@ GraphNode* OpFactory::newOp(TosaSerializationHandler* tsh, // ewise_ternary case Op_SELECT: DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpSelect, FLOAT); - DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpSelect, AINT8); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpSelect, INT8); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpSelect, INT16); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpSelect, INT32); @@ -256,13 +251,13 @@ GraphNode* OpFactory::newOp(TosaSerializationHandler* tsh, break; case Op_REDUCE_MAX: DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMax, FLOAT); - DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMax, AINT8); + DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMax, INT8); DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMax, INT16); DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMax, INT32); break; case Op_REDUCE_MIN: DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMin, FLOAT); - DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMin, AINT8); + DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMin, INT8); DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMin, INT16); DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMin, INT32); break; @@ -277,7 +272,6 @@ GraphNode* OpFactory::newOp(TosaSerializationHandler* tsh, // data layout case Op_CONCAT: DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpConcat, FLOAT); - DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpConcat, AINT8); DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpConcat, INT8); DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpConcat, INT16); DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpConcat, INT32); @@ -286,14 +280,12 @@ GraphNode* OpFactory::newOp(TosaSerializationHandler* tsh, case Op_PAD: DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpPad, FLOAT); DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpPad, INT32); - DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpPad, AINT8); DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpPad, INT8); DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpPad, INT16); DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpPad, BOOL); break; case Op_RESHAPE: DEF_FACTORY_RESHAPE(OpReshape, FLOAT); - DEF_FACTORY_RESHAPE(OpReshape, AINT8); DEF_FACTORY_RESHAPE(OpReshape, INT8); DEF_FACTORY_RESHAPE(OpReshape, INT16); DEF_FACTORY_RESHAPE(OpReshape, INT32); @@ -301,7 +293,6 @@ GraphNode* OpFactory::newOp(TosaSerializationHandler* tsh, break; case Op_REVERSE: DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpReverse, FLOAT); - DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpReverse, AINT8); DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpReverse, INT8); DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpReverse, INT16); DEF_FACTORY_RANK1_6_ONE_RANK_ONE_TYPE(OpReverse, INT32); @@ -309,7 +300,6 @@ GraphNode* OpFactory::newOp(TosaSerializationHandler* tsh, break; case Op_SLICE: DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpSlice, FLOAT); - DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpSlice, AINT8); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpSlice, INT8); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpSlice, INT16); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpSlice, INT32); @@ -317,7 +307,6 @@ GraphNode* OpFactory::newOp(TosaSerializationHandler* tsh, break; case Op_TILE: DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpTile, FLOAT); - DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpTile, AINT8); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpTile, INT8); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpTile, INT16); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpTile, INT32); @@ -326,7 +315,6 @@ GraphNode* OpFactory::newOp(TosaSerializationHandler* tsh, case Op_TRANSPOSE: DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpTranspose, BOOL); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpTranspose, FLOAT); - DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpTranspose, AINT8); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpTranspose, INT8); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpTranspose, INT16); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpTranspose, INT32); @@ -334,13 +322,13 @@ GraphNode* OpFactory::newOp(TosaSerializationHandler* tsh, // scatter_gather case Op_GATHER: - DEF_FACTORY_ONE_TYPE(OpGather, AINT8); + DEF_FACTORY_ONE_TYPE(OpGather, INT8); DEF_FACTORY_ONE_TYPE(OpGather, INT16); DEF_FACTORY_ONE_TYPE(OpGather, INT32); DEF_FACTORY_ONE_TYPE(OpGather, FLOAT); break; case Op_SCATTER: - DEF_FACTORY_ONE_TYPE(OpScatter, AINT8); + DEF_FACTORY_ONE_TYPE(OpScatter, INT8); DEF_FACTORY_ONE_TYPE(OpScatter, INT16); DEF_FACTORY_ONE_TYPE(OpScatter, INT32); DEF_FACTORY_ONE_TYPE(OpScatter, FLOAT); @@ -363,7 +351,6 @@ GraphNode* OpFactory::newOp(TosaSerializationHandler* tsh, case Op_IDENTITY: DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentity, FLOAT); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentity, INT32); - DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentity, AINT8); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentity, INT8); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentity, INT16); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentity, BOOL); @@ -371,7 +358,6 @@ GraphNode* OpFactory::newOp(TosaSerializationHandler* tsh, case Op_IDENTITYN: DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentityN, FLOAT); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentityN, INT32); - DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentityN, AINT8); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentityN, INT8); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentityN, INT16); DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpIdentityN, BOOL); @@ -399,20 +385,20 @@ GraphNode* OpFactory::newOp(TosaSerializationHandler* tsh, DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpCast, FLOAT, INT32); break; case Op_RESCALE: - DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, AINT8, AINT8); - DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, AINT8, INT16); - DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, AINT8, INT32); - DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT16, AINT8); + DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT8, INT8); + DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT8, INT16); + DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT8, INT32); + DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT16, INT8); DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT16, INT16); DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT16, INT32); - DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT32, AINT8); + DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT32, INT8); DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT32, INT16); DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT32, INT32); - DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT48, AINT8); + DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT48, INT8); DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT48, INT16); DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT48, INT32); - DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, UINT8, AINT8); - DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, AINT8, UINT8); + DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, UINT8, INT8); + DEF_FACTORY_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT8, UINT8); break; // custom diff --git a/reference_model/src/ops/reduction.cc b/reference_model/src/ops/reduction.cc index a2adfdb..97a7aa7 100644 --- a/reference_model/src/ops/reduction.cc +++ b/reference_model/src/ops/reduction.cc @@ -1,5 +1,5 @@ -// Copyright (c) 2020, ARM Limited. +// Copyright (c) 2020-2021, ARM Limited. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -124,12 +124,12 @@ DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceAll, BOOL); DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceAny, BOOL); DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMax, FLOAT); -DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMax, AINT8); +DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMax, INT8); DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMax, INT16); DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMax, INT32); DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMin, FLOAT); -DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMin, AINT8); +DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMin, INT8); DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMin, INT16); DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpReduceMin, INT32); diff --git a/reference_model/src/ops/scatter_gather.cc b/reference_model/src/ops/scatter_gather.cc index 2d1026f..478b776 100644 --- a/reference_model/src/ops/scatter_gather.cc +++ b/reference_model/src/ops/scatter_gather.cc @@ -1,5 +1,5 @@ -// Copyright (c) 2020, ARM Limited. +// Copyright (c) 2020-2021, ARM Limited. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -219,12 +219,12 @@ int OpScatter::eval() } // template explicit instantiation -DEF_INSTANTIATE_ONE_TYPE(OpGather, AINT8); +DEF_INSTANTIATE_ONE_TYPE(OpGather, INT8); DEF_INSTANTIATE_ONE_TYPE(OpGather, INT16); DEF_INSTANTIATE_ONE_TYPE(OpGather, INT32); DEF_INSTANTIATE_ONE_TYPE(OpGather, FLOAT); -DEF_INSTANTIATE_ONE_TYPE(OpScatter, AINT8); +DEF_INSTANTIATE_ONE_TYPE(OpScatter, INT8); DEF_INSTANTIATE_ONE_TYPE(OpScatter, INT16); DEF_INSTANTIATE_ONE_TYPE(OpScatter, INT32); DEF_INSTANTIATE_ONE_TYPE(OpScatter, FLOAT); diff --git a/reference_model/src/ops/template_types.h b/reference_model/src/ops/template_types.h index 1859e03..0fe9a41 100644 --- a/reference_model/src/ops/template_types.h +++ b/reference_model/src/ops/template_types.h @@ -1,5 +1,5 @@ -// Copyright (c) 2020, ARM Limited. +// Copyright (c) 2020-2021, ARM Limited. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -84,11 +84,6 @@ struct GetEigenType using type = bool; }; template <> -struct GetEigenType -{ - using type = int32_t; -}; -template <> struct GetEigenType { using type = int32_t; @@ -121,11 +116,6 @@ struct GetNumBits static constexpr int32_t value = 1; }; template <> -struct GetNumBits -{ - static constexpr int32_t value = 8; -}; -template <> struct GetNumBits { static constexpr int32_t value = 8; @@ -163,11 +153,6 @@ struct GetQMin static constexpr int64_t value = 0L; }; template <> -struct GetQMin -{ - static constexpr int64_t value = -128L; -}; -template <> struct GetQMin { static constexpr int64_t value = 0L; @@ -204,11 +189,6 @@ struct GetQMax static constexpr int64_t value = 0L; }; template <> -struct GetQMax -{ - static constexpr int64_t value = 127L; -}; -template <> struct GetQMax { static constexpr int64_t value = 255L; @@ -242,17 +222,12 @@ struct GetQMax template struct GetAccDType; template <> -struct GetAccDType -{ - static constexpr DType value = DType_INT32; -}; -template <> -struct GetAccDType +struct GetAccDType { static constexpr DType value = DType_INT32; }; template <> -struct GetAccDType +struct GetAccDType { static constexpr DType value = DType_INT32; }; diff --git a/reference_model/src/ops/tensor_ops.cc b/reference_model/src/ops/tensor_ops.cc index 82ce3d2..d6cd1cd 100644 --- a/reference_model/src/ops/tensor_ops.cc +++ b/reference_model/src/ops/tensor_ops.cc @@ -1,5 +1,5 @@ -// Copyright (c) 2020, ARM Limited. +// Copyright (c) 2020-2021, ARM Limited. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -1189,41 +1189,37 @@ int OpTransposeConv2d::eval() // template explicit instantiation DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpArgMax, FLOAT); -DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpArgMax, AINT8); +DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpArgMax, INT8); DEF_INSTANTIATE_RANK1_6_ONE_RANK_ONE_TYPE(OpArgMax, INT16); DEF_INSTANTIATE_ONE_TYPE(OpAvgPool2d, FLOAT) -DEF_INSTANTIATE_ONE_TYPE(OpAvgPool2d, AINT8) +DEF_INSTANTIATE_ONE_TYPE(OpAvgPool2d, INT8) DEF_INSTANTIATE_ONE_TYPE(OpAvgPool2d, INT16) DEF_INSTANTIATE_TWO_TYPE(OpConv2d, FLOAT, FLOAT); -DEF_INSTANTIATE_TWO_TYPE(OpConv2d, AINT8, INT4); -DEF_INSTANTIATE_TWO_TYPE(OpConv2d, AINT8, INT8); -DEF_INSTANTIATE_TWO_TYPE(OpConv2d, AINT8, AINT8); +DEF_INSTANTIATE_TWO_TYPE(OpConv2d, INT8, INT4); +DEF_INSTANTIATE_TWO_TYPE(OpConv2d, INT8, INT8); DEF_INSTANTIATE_TWO_TYPE(OpConv2d, INT16, INT8); DEF_INSTANTIATE_TWO_TYPE(OpDepthwiseConv2d, FLOAT, FLOAT); -DEF_INSTANTIATE_TWO_TYPE(OpDepthwiseConv2d, AINT8, INT4); -DEF_INSTANTIATE_TWO_TYPE(OpDepthwiseConv2d, AINT8, INT8); -DEF_INSTANTIATE_TWO_TYPE(OpDepthwiseConv2d, AINT8, AINT8); +DEF_INSTANTIATE_TWO_TYPE(OpDepthwiseConv2d, INT8, INT4); +DEF_INSTANTIATE_TWO_TYPE(OpDepthwiseConv2d, INT8, INT8); DEF_INSTANTIATE_TWO_TYPE(OpDepthwiseConv2d, INT16, INT8); DEF_INSTANTIATE_TWO_TYPE(OpFullyConnected, FLOAT, FLOAT); -DEF_INSTANTIATE_TWO_TYPE(OpFullyConnected, AINT8, INT4); -DEF_INSTANTIATE_TWO_TYPE(OpFullyConnected, AINT8, INT8); -DEF_INSTANTIATE_TWO_TYPE(OpFullyConnected, AINT8, AINT8); +DEF_INSTANTIATE_TWO_TYPE(OpFullyConnected, INT8, INT4); +DEF_INSTANTIATE_TWO_TYPE(OpFullyConnected, INT8, INT8); DEF_INSTANTIATE_TWO_TYPE(OpFullyConnected, INT16, INT8); -DEF_INSTANTIATE_ONE_TYPE(OpMatMul, AINT8); +DEF_INSTANTIATE_ONE_TYPE(OpMatMul, INT8); DEF_INSTANTIATE_ONE_TYPE(OpMatMul, INT16); DEF_INSTANTIATE_ONE_TYPE(OpMatMul, FLOAT); DEF_INSTANTIATE_ONE_TYPE(OpMaxPool2d, FLOAT); -DEF_INSTANTIATE_ONE_TYPE(OpMaxPool2d, AINT8); +DEF_INSTANTIATE_ONE_TYPE(OpMaxPool2d, INT8); DEF_INSTANTIATE_ONE_TYPE(OpMaxPool2d, INT16); DEF_INSTANTIATE_TWO_TYPE(OpTransposeConv2d, FLOAT, FLOAT); -DEF_INSTANTIATE_TWO_TYPE(OpTransposeConv2d, AINT8, INT4); -DEF_INSTANTIATE_TWO_TYPE(OpTransposeConv2d, AINT8, INT8); -DEF_INSTANTIATE_TWO_TYPE(OpTransposeConv2d, AINT8, AINT8); +DEF_INSTANTIATE_TWO_TYPE(OpTransposeConv2d, INT8, INT4); +DEF_INSTANTIATE_TWO_TYPE(OpTransposeConv2d, INT8, INT8); DEF_INSTANTIATE_TWO_TYPE(OpTransposeConv2d, INT16, INT8); diff --git a/reference_model/src/ops/type_conversion.cc b/reference_model/src/ops/type_conversion.cc index c505e29..3a610ea 100644 --- a/reference_model/src/ops/type_conversion.cc +++ b/reference_model/src/ops/type_conversion.cc @@ -1,5 +1,5 @@ -// Copyright (c) 2020, ARM Limited. +// Copyright (c) 2020-2021, ARM Limited. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -75,24 +75,6 @@ int OpRescale::eval() bool double_round = attribute->double_round(); bool per_channel = attribute->per_channel(); - if (TosaReference::TypeChecker::is_symmetric(InDtype)) - { - if (input_zp != 0) - { - FATAL_ERROR_NODE("input tensor is symmetric type %s but zeropoint is %d instead of 0", - EnumNamesDType()[InDtype], input_zp); - } - } - - if (TosaReference::TypeChecker::is_symmetric(OutDtype)) - { - if (output_zp != 0) - { - FATAL_ERROR_NODE("output tensor is symmetric type %s but zeropoint is %d instead of 0", - EnumNamesDType()[OutDtype], output_zp); - } - } - // reshape [d0, d1, ..., dn] into [d0 * d1 ..., dn] Eigen::array shape_2d; shape_2d[0] = 1; @@ -222,8 +204,6 @@ CastHelper::CastHelper() { fcn = [](InEigenType in) -> OutEigenType { OutEigenType out = (OutEigenType)in; // implicit sign_extend() if sizeof(out_t) >= sizeof(in_t) - int64_t mask = (1L << OutBits) - 1; - out = out & mask; return out; }; } @@ -283,17 +263,17 @@ DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpCast, FLOAT, INT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpCast, FLOAT, INT16); DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpCast, FLOAT, INT32); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, AINT8, AINT8); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, AINT8, INT16); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, AINT8, INT32); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT16, AINT8); +DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT8, INT8); +DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT8, INT16); +DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT8, INT32); +DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT16, INT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT16, INT16); DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT16, INT32); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT32, AINT8); +DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT32, INT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT32, INT16); DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT32, INT32); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT48, AINT8); +DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT48, INT8); DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT48, INT16); DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT48, INT32); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, UINT8, AINT8); -DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, AINT8, UINT8); +DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, UINT8, INT8); +DEF_INSTANTIATE_RANK0_6_ONE_RANK_TWO_TYPE(OpRescale, INT8, UINT8); diff --git a/reference_model/src/quant_util.h b/reference_model/src/quant_util.h index f9ac501..1784493 100644 --- a/reference_model/src/quant_util.h +++ b/reference_model/src/quant_util.h @@ -1,5 +1,5 @@ -// Copyright (c) 2020, ARM Limited. +// Copyright (c) 2020-2021, ARM Limited. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -68,22 +68,13 @@ class TypeChecker public: static bool is_integer(DType dtype) { - if (dtype == DType_INT4 || dtype == DType_INT8 || dtype == DType_AINT8 || dtype == DType_UINT8 || + if (dtype == DType_INT4 || dtype == DType_INT8 || dtype == DType_UINT8 || dtype == DType_INT16 || dtype == DType_INT32 || dtype == DType_INT48) { return true; } return false; } - static bool is_symmetric(DType dtype) - { - if (dtype == DType_INT4 || dtype == DType_INT8 || dtype == DType_INT16 || dtype == DType_INT32 || - dtype == DType_INT48) - { - return true; - } - return false; - } }; }; // namespace TosaReference diff --git a/reference_model/src/tensor.cc b/reference_model/src/tensor.cc index 179484e..da81bcd 100644 --- a/reference_model/src/tensor.cc +++ b/reference_model/src/tensor.cc @@ -1,5 +1,5 @@ -// Copyright (c) 2020, ARM Limited. +// Copyright (c) 2020-2021, ARM Limited. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -107,7 +107,6 @@ int TosaReference::Tensor::readFromNpyFile(const char* filename) nperror = NumpyUtilities::readFromNpyFile(filename, elements, fdatabuf); break; case DType_INT32: - case DType_AINT8: case DType_UINT8: case DType_INT4: case DType_INT8: @@ -163,7 +162,6 @@ int TosaReference::Tensor::readFromNpyFile(const char* filename) } break; case DType_INT32: - case DType_AINT8: case DType_UINT8: case DType_INT4: case DType_INT8: @@ -232,7 +230,6 @@ int TosaReference::Tensor::writeToNpyFile(const char* filename) const free(fdatabuf); break; case DType_INT32: - case DType_AINT8: case DType_UINT8: case DType_INT4: case DType_INT8: diff --git a/reference_model/src/tensor.h b/reference_model/src/tensor.h index 2fd37cd..4f77cfc 100644 --- a/reference_model/src/tensor.h +++ b/reference_model/src/tensor.h @@ -1,5 +1,5 @@ -// Copyright (c) 2020, ARM Limited. +// Copyright (c) 2020-2021, ARM Limited. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -714,7 +714,6 @@ public: goto done; } case DType_INT32: - case DType_AINT8: case DType_UINT8: case DType_INT4: case DType_INT8: diff --git a/serialization/tosa.fbs b/serialization/tosa.fbs index 9df8746..e30c3cf 100644 --- a/serialization/tosa.fbs +++ b/serialization/tosa.fbs @@ -1,5 +1,5 @@ -// Copyright (c) 2020, ARM Limited. +// Copyright (c) 2020-2021, ARM Limited. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -23,7 +23,6 @@ file_extension "tosa"; enum DType:uint32 { UNKNOWN = 0, BOOL, - AINT8, UINT8, INT4, INT8, diff --git a/serialization/tosa_generated.h b/serialization/tosa_generated.h index fad0520..f2796af 100644 --- a/serialization/tosa_generated.h +++ b/serialization/tosa_generated.h @@ -1,5 +1,5 @@ -// Copyright (c) 2020, ARM Limited. +// Copyright (c) 2020-2021, ARM Limited. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -74,23 +74,21 @@ struct TosaGraph; enum DType { DType_UNKNOWN = 0, DType_BOOL = 1, - DType_AINT8 = 2, - DType_UINT8 = 3, - DType_INT4 = 4, - DType_INT8 = 5, - DType_INT16 = 6, - DType_INT32 = 7, - DType_INT48 = 8, - DType_FLOAT = 9, + DType_UINT8 = 2, + DType_INT4 = 3, + DType_INT8 = 4, + DType_INT16 = 5, + DType_INT32 = 6, + DType_INT48 = 7, + DType_FLOAT = 8, DType_MIN = DType_UNKNOWN, DType_MAX = DType_FLOAT }; -inline const DType (&EnumValuesDType())[10] { +inline const DType (&EnumValuesDType())[9] { static const DType values[] = { DType_UNKNOWN, DType_BOOL, - DType_AINT8, DType_UINT8, DType_INT4, DType_INT8, @@ -106,7 +104,6 @@ inline const char * const *EnumNamesDType() { static const char * const names[] = { "UNKNOWN", "BOOL", - "AINT8", "UINT8", "INT4", "INT8", diff --git a/verif/tosa/DType.py b/verif/tosa/DType.py index 44d9970..2e30531 100644 --- a/verif/tosa/DType.py +++ b/verif/tosa/DType.py @@ -1,6 +1,6 @@ # automatically generated by the FlatBuffers compiler, do not modify -# Copyright (c) 2020, ARM Limited. +# Copyright (c) 2020-2021, ARM Limited. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -20,12 +20,11 @@ class DType(object): UNKNOWN = 0 BOOL = 1 - AINT8 = 2 - UINT8 = 3 - INT4 = 4 - INT8 = 5 - INT16 = 6 - INT32 = 7 - INT48 = 8 - FLOAT = 9 + UINT8 = 2 + INT4 = 3 + INT8 = 4 + INT16 = 5 + INT32 = 6 + INT48 = 7 + FLOAT = 8 diff --git a/verif/tosa_serializer.py b/verif/tosa_serializer.py index 3b7e339..136f7aa 100644 --- a/verif/tosa_serializer.py +++ b/verif/tosa_serializer.py @@ -1,6 +1,6 @@ -# Copyright (c) 2020, ARM Limited. +# Copyright (c) 2020-2021, ARM Limited. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -29,7 +29,6 @@ import json # here. DTypeNames = [ 'UNKNOWN', 'BOOL', - 'AINT8', 'UINT8', 'INT4', 'INT8', diff --git a/verif/tosa_test_gen.py b/verif/tosa_test_gen.py index 24d7b7b..57030e7 100644 --- a/verif/tosa_test_gen.py +++ b/verif/tosa_test_gen.py @@ -1,6 +1,6 @@ #!/usr/bin/env python3 -# Copyright (c) 2020, ARM Limited. +# Copyright (c) 2020-2021, ARM Limited. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -50,7 +50,7 @@ class TosaQuantGen: @staticmethod def needsQinfo(op, dtype): - if dtype == DType.AINT8 or dtype == DType.INT8: + if dtype == DType.INT8: return True return False @@ -498,7 +498,7 @@ class TosaArgGen: arg_list = [] # Enumerate the output types here - for dtype in [ DType.AINT8, DType.INT16, DType.INT32 ]: + for dtype in [ DType.INT8, DType.INT16, DType.INT32 ]: for scale32 in [ False, True ]: for double_round in [ False, True ]: for per_channel in [ False, True ]: @@ -790,8 +790,6 @@ class TosaTestGen: if dtype == DType.BOOL: np_dt = np.bool return np.bool_(self.rng.choice(a=[False, True], size=shape)) - elif dtype == DType.AINT8: - return np.int32(self.rng.integers(low=0, high=256, size=shape)) elif dtype == DType.INT4: return np.int32(self.rng.integers(low=-7, high=8, size=shape)) elif dtype == DType.INT8: @@ -845,8 +843,6 @@ class TosaTestGen: return self.rng.choice([False, True]) elif dtype == DType.INT4: low, high = (-7, 8) - elif dtype == DType.AINT8: - low, high = (0, 256) elif dtype == DType.INT8: low, high = (-127, 128) elif dtype == DType.INT16: @@ -874,12 +870,12 @@ class TosaTestGen: def typeStr(self, t): if t == DType.BOOL: return 'b' - elif t == DType.AINT8: - return 'a8' elif t == DType.INT4: return 'i4' elif t == DType.INT8: return 'i8' + elif t == DType.UINT8: + return 'u8' elif t == DType.INT16: return 'i16' elif t == DType.INT32: @@ -893,14 +889,12 @@ class TosaTestGen: def typeWidth(self, t): ''' Get the datatype width for integer types''' - if t == DType.AINT8: - return 8 - elif t == DType.UINT8: - return 8 - elif t == DType.INT4: + if t == DType.INT4: return 4 elif t == DType.INT8: return 8 + elif t == DType.UINT8: + return 8 elif t == DType.INT16: return 16 elif t == DType.INT32: @@ -1030,7 +1024,7 @@ class TosaTestGen: # Create bias here since the acc_t depends on (but isn't the same as) the input dtype # The bias is OC - if ifm.dtype == DType.AINT8 or ifm.dtype == DType.INT8: + if ifm.dtype == DType.INT8: bias_type = DType.INT32 elif ifm.dtype == DType.INT16: bias_type = DType.INT48 @@ -1267,13 +1261,13 @@ class TosaTestGen: in_type_width = self.typeWidth(val.dtype) out_type_width = self.typeWidth(out_dtype) - if val.dtype == DType.AINT8: + if val.dtype == DType.INT8: input_zp = self.randInt() in_type_width = in_type_width + 1 else: input_zp = 0 - if out_dtype == DType.AINT8: + if out_dtype == DType.INT8: output_zp = self.randInt() out_type_width = out_type_width + 1 else: @@ -1637,24 +1631,21 @@ class TosaTestGen: # Tensor operator list # 'op': op name # 'operands': tuple of (placeholder, const) operands - # 'rank': optional, restricts rank to tuple inclusive of (min, max), if not specified, defaults to (1, 4) + # 'rank': optional, restricts rank to tuple inclusive of (min, max), + # if not specified, defaults to (1, 4) # 'build_fcn': tuple of the function to (build_operator(), TensorGen function, ArgGen enum) # 'types': array of datatypes to be tested TYPE_FP = [ DType.FLOAT ] - # Type with an aint8 - TYPE_INT = [ DType.AINT8, DType.INT16, DType.INT32 ] # Most operators support AINT8 instead of INT8, excludes INT4 - TYPE_INT_FP = [ DType.AINT8, DType.INT16, DType.INT32, DType.FLOAT ] # Most operators support AINT8 instead of INT8, excludes INT4 + TYPE_INT = [ DType.INT8, DType.INT16, DType.INT32 ] # Excludes INT4 + TYPE_INT_FP = [ DType.INT8, DType.INT16, DType.INT32, DType.FLOAT ] # Excludes INT4 - # Types with an int8 - TYPE_PURE_INT = [ DType.INT8, DType.INT16, DType.INT32 ] # Note: excludes INT4 - TYPE_PURE_INT_FP = [ DType.INT8, DType.INT16, DType.INT32, DType.FLOAT ] # Note: excludes INT4 TYPE_BOOL = [ DType.BOOL ] TYPE_FI32 = [ DType.FLOAT, DType.INT32 ] - TYPE_FIB = [ DType.FLOAT, DType.AINT8, DType.INT8, DType.INT16, DType.INT32, DType.BOOL ] + TYPE_FIB = [ DType.FLOAT, DType.INT8, DType.INT16, DType.INT32, DType.BOOL ] TYPE_FI16 = [ DType.FLOAT, DType.INT16 ] - TYPE_NARROW_INT_FP = [ DType.AINT8, DType.INT16, DType.FLOAT ] + TYPE_NARROW_INT_FP = [ DType.INT8, DType.INT16, DType.FLOAT ] DEFAULT_RANK_RANGE = (1, 4) @@ -1670,7 +1661,7 @@ class TosaTestGen: { 'op': Op.ARITHMETIC_RIGHT_SHIFT, 'operands': (2, 0), 'build_fcn': (build_arithmetic_right_shift, TosaTensorGen.tgBroadcastFuzz, TosaArgGen.agArithmeticRightShift), - 'types': TYPE_PURE_INT }, + 'types': TYPE_INT }, 'bitwise_and': { 'op': Op.BITWISE_AND, @@ -1700,13 +1691,13 @@ class TosaTestGen: { 'op': Op.LOGICAL_LEFT_SHIFT, 'operands': (2, 0), 'build_fcn': (build_binary_broadcast, TosaTensorGen.tgBroadcastFuzz, None), - 'types': TYPE_PURE_INT }, + 'types': TYPE_INT }, 'logical_right_shift': { 'op': Op.LOGICAL_RIGHT_SHIFT, 'operands': (2, 0), 'build_fcn': (build_binary_broadcast, TosaTensorGen.tgBroadcastFuzz, None), - 'types': TYPE_PURE_INT }, + 'types': TYPE_INT }, 'logical_or': { 'op': Op.LOGICAL_OR, @@ -1736,7 +1727,7 @@ class TosaTestGen: { 'op': Op.MUL, 'operands': (2, 0), 'build_fcn': (build_mul, TosaTensorGen.tgBroadcastFuzz, TosaArgGen.agMul), - 'types': TYPE_PURE_INT_FP }, + 'types': TYPE_INT_FP }, 'pow': { 'op': Op.POW, @@ -2101,7 +2092,7 @@ class TosaTestGen: { 'op': Op.RESCALE, 'operands': (1, 0), 'build_fcn': ( build_rescale, TosaTensorGen.tgBasic, TosaArgGen.agRescale ), - 'types': [ DType.AINT8, DType.INT16, DType.INT32, DType.INT48 ] }, + 'types': [ DType.INT8, DType.INT16, DType.INT32, DType.INT48 ] }, # Custom # Not implemented. @@ -2239,7 +2230,7 @@ class OutputShaper: ofm_shape = [ifm.shape[0], h, w, filter.shape[0]] - if ifm.dtype == DType.AINT8 or ifm.dtype == DType.INT8: + if ifm.dtype == DType.INT8: out_dtype = DType.INT32 elif ifm.dtype == DType.INT16: out_dtype = DType.INT48 @@ -2269,7 +2260,7 @@ class OutputShaper: ofm_shape = [ifm.shape[0], h, w, filter.shape[2] * filter.shape[3]] - if ifm.dtype == DType.AINT8 or ifm.dtype == DType.INT8: + if ifm.dtype == DType.INT8: out_dtype = DType.INT32 elif ifm.dtype == DType.INT16: out_dtype = DType.INT48 @@ -2304,7 +2295,7 @@ class OutputShaper: output_shape = [input.shape[0], filter.shape[0]] - if input.dtype == DType.AINT8 or input.dtype == DType.INT8: + if input.dtype == DType.INT8: out_dtype = DType.INT32 elif input.dtype == DType.INT16: out_dtype = DType.INT48 @@ -2323,8 +2314,7 @@ class OutputShaper: output_shape = [a.shape[0], b.shape[1]] - - if a.dtype == DType.AINT8: + if a.dtype == DType.INT8: out_dtype = DType.INT32 elif a.dtype == DType.INT16: out_dtype = DType.INT48 @@ -2478,7 +2468,7 @@ class OutputShaper: @staticmethod def transposeConv2DOp(ser, ifm, output_shape): - if ifm.dtype == DType.AINT8 or ifm.dtype == DType.INT8: + if ifm.dtype == DType.INT8: out_dtype = DType.INT32 elif ifm.dtype == DType.INT16: out_dtype = DType.INT48 -- cgit v1.2.1