Age | Commit message (Collapse) | Author |
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Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: I440590fa59433b9ddc1934188f2b34b377129c1f
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- Adds a script to generate operators.h and operators.cc
- Adds jinja2 templates for generating operators.h and operators.cc
- Adds unit tests for a subset of the operators generated
- Includes the TOSA specification as a submodule
- Adds supporting C++ and header files
Signed-off-by: Grant Watson <grant.watson@arm.com>
Change-Id: I5b60db4c56113110d8e75fe1152525d258233f9c
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Also include the updated serialization submodule
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I7a97ae05d16c8a98c38f954ee8014d0f32b282d5
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- OpClamp
- OpArithmeticRightShift
- OpMul
- OpTable
- OpTranspose
Signed-off-by: Jerry Ge <jerry.ge@arm.com>
Change-Id: Icb84a8a17c298b471a635310454775977a9133cb
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Include the 0.50 serialization library submodule
Change-Id: Ie25cacf20aadf66ef8c3097e41647a570a54edbb
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Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Ib4c4fe433485282713d396b92d8acec812a17188
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* Update FP16 resize to newest spec version
* Correct casting to fp16 for graphs of >1 ops
Change-Id: Iedff9a71eb7f72948b3c00a635bb0fd07d414bcd
Signed-off-by: James Ward <james.ward@arm.com>
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The original calculation was auto-promoted to FP64 and causing the
discrepencies between TFL and TOSA. Sigmoid is now calculated with
only single precision floating point values.
Signed-off-by: Jerry Ge <jerry.ge@arm.com>
Change-Id: Ia65b491ccf8af2493cc01ca66c28faff841407c2
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Clipping to the output range is done post zero point addition.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I5271a08fb2f6f9804fb1af3c6945131f948f452a
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* Upgrade Eigen to 3.4.0 (for bfloat16 support) and add work-
arounds for reduce.any() and reduce.all() bugs (introduced
between 3.3.7 and 3.4.0)
* Truncation to bfloat16 now performed in eval() methods
Signed-off-by: James Ward <james.ward@arm.com>
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: If5f5c988d76d3d30790acf3b97081726b89205fe
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* Added specific FP16 readfromVector and writeToVector methods.
* Added FP16 support to float readfromVector and writeToVector methods.
* Added missing reference to IModelRunner::setInput.
Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: I6b66468737e672afc925ccad4fb710fbb9427c14
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Validate tensor arguments
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: Iac398f2c3e600944c6f65c3d8433bd17095f820b
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Update tensor operations naming to state input type as TxT in
all cases. Effects CONV2D, CONV3D, DEPTHWISE_CONV2D,
FULLY_CONNECTED, TRANSPOSE_CONV2D.
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Ic959acfcb3aa0a910b33b774a5a85fac08219205
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Improve base inference conformance generation:
* Change to target specific dtypes required for conformance tests.
* Reduce dimension sizes of ERROR_IF tests.
NOTE: Will impact tensor, clamp and all ERROR_IF tests.
Add option to change seed on conformance generation for extra
testing.
Stop creation of convolution tests with negative output dimensions.
Improve reporting on failing to allocate tensor due to above issue.
Fix runner to correctly pass ref model debug flags.
Update reference_model examples.
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: I992180dcfe265a7d50edfb151c9f38eeaef5c369
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* undef reference_model def to allow doctest def
Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: I143a7d57344dd3c19248c30ced1aca1d770d47a3
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Change-Id: I72f21fcfa153046274969d327313e3349981dbe6
Signed-off-by: James Ward <james.ward@arm.com>
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* Added IModelRunner interface using pimpl idiom, which allows a user to
initialize, configure and run the model.
* Added unit tests for IModelRunner.
* Added doctest as third-party submodule.
* Added user options to specify paths for dependencies.
* Moved general func_config functions to separate utility, which removes
cxxopts dependency.
Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: If42f1f82cd6dadf18911a48dcd5fa579b719aff2
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Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: I3fbf3f531cd803b35892e8f07fc4a495f8c95f98
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Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I862b4d0fa66328535d555d3d4624a5f3dd856cc0
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In preparation for next release. Also include new version of the
serialization library
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I577406339d527dd29f14196d6ff1bcd0ac3ffd78
Change-Id: Ia140cd16b21133c674f8ef1cf31e665982478c81
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Add a new attribute `rank` to indicate the testing dimension range of
input tensor. Also fix a minor bug in the existing conv3d simulation.
And relax rescale operator in the reference model to support 5-D input.
Change-Id: Ib42fe513831dc83eb7f9af07e011787a6c752704
Signed-off-by: TatWai Chong <tatwai.chong@arm.com>
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Increasing out pad values now leads to increasing pad.
Reference model changes, and test generator changes to
match specification definition
Change-Id: I4f3ebfbca5048354fb15bedc7ab640ff28ed853a
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
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Signed-off-by: Jerry Ge <jerry.ge@arm.com>
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Ib6e81814e022f33e45430e47ca99d6d9f9e0e101
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Change-Id: Ia681aa0eb1d42fa31a4658badb376f7b32b2e338
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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Matches a corresponding change to the specification
Change-Id: If70356e0c78c1c88530e5d2f58bc50de864f249a
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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Attribute stride and shift are removed, and has new scale and border.
Also add tests in the generator to test tf.resize with all option
combinations.
Signed-off-by: TatWai Chong <tatwai.chong@arm.com>
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: If0f330d04395762d2d907863235eda1532f5e1ff
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Aligns with change in specification, as the limit to value being between
(-1 << shift-2) and (1 << shift-2) was overly constraining.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I72cc5743344d4036920c3df366e0a3930701a0cb
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Include new submodule for serialization library.
Change-Id: I38cdea3ed8ea3968d1dc06c689dab248d21b14fd
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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In the case of an int16xint8 test, the zero point was not being
subtracted from the weights.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: Ic77119b200b952715870abc11d09d1a646da86b1
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Preparation for v0.30 release
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I65f6ee429a840d562c104c48335f8dcb51f79667
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Any needed information moves into the attributes for each operator.
New serialization library version removes teh quantization information
attributes from the schema
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: Icf6165687ab1fd34a01f64c01b0b92b2820e72fa
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Rename outpad to out_pad, and also fix the dilation in the generator.
Change-Id: I4c1599871f0d0b41856e819d8c644a85ca6d8267
Signed-off-by: TatWai Chong <tatwai.chong@arm.com>
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It is not in the spec and is being removed from serialization
Change-Id: I82a102de37d8eb75210088dfda2df9b2fadb9c74
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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Now corresponds with the ERROR_IF in the specification
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I1f4e303c330d18661ca2e6ef65d0119baabedec6
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The operators are pool, conv, reshape, slice, transpose, and table.
Signed-off-by: TatWai Chong <tatwai.chong@arm.com>
Change-Id: I13f8d626df59be14361068222746347ba69d2fb5
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Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: I098daf49c92da12c07143cdd23ac9bb58acebbb9
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Update ref-model RESCALE op to support UINT16 conversions
Add testing for RESCALE UINT16 and ERROR_IFs
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Ic6e6e53de1f0b054bedb9e6ba3856e7475498aba
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Bias was mistakenly unused previously.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: If776e923f7b3cd442c7f147fcbd22a214c37fd36
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Fixes issue where pad_left < stride would cause padding
values to be missed
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I2ba0d0969ce1f00e2cb3ca1ab293c5e15a0c7749
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Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Ie5d119dc317303a0d2a71d018ac94ce6800ecbf5
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Update to ref model to check ERROR_IF criteria for pooling
and convolution ops to match specification
Update to tosa_verif_build_tests to produce valid test ranges and
new ERROR_IF tests
Plus update pooling ops big kernel to 9 (from 6) for better testing
coverage and set dilation to 1 and add out_pad bottom & right for
transpose_conv2d to match specification
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Ic5759872d40ae8d3f3d07043d9a0f2fa0244d72e
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And limit REDUCE_SUM test values to within int32
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: I4d902b245d17eb343cfb2bbc23d9db28c1d1f4c3
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And update test generation to create values in predictable range
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: I4ba1ff445bf6caeec9f8782902fc45929fe0ee77
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- Error check on missing test description file instead of throwing
json exception
- Removed outdated help option
Signed-off-by: Jared Smolens <jared.smolens@arm.com>
Change-Id: Ia8780a88f4306af19ce63eaa679c84669f5c2ad9
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Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Ifa34021413cd6543c987a7b7c9c664144a4dd95d
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Fix up generated values for rescale tests
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: I28fc3b8f189d25a7ad8e5172d4d8a43b86820fcf
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Previous code assumed symmetric padding when calculating the divisor for
the average pool, and had issues with extra padding.
The padding now follows the definition from the specification. Extra
padding to the right/bottom is ignored when calculating the average pool
divisor.
Change-Id: Ib05e2346c6e9d55b6fef5294322e58ee18ef4928
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Added missing reference model REQUIRE check for shift value (0-31)
Make sure result of LOGICAL_SHIFT_LEFT is masked to input size
Fixed test generation to produce shift values in that range
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Id511de0d989ea954fc1afd18dc2051341bce2cd0
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- test like [1] + [2] = [1] should be treated as invalid test
- modify matchRankShape() function so it allows size 1 only on the source tensor but not target tensor
Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: I6bbb6a63dc1143712e7eef736a991cac419b009e
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Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: I49d498dd3d4c069d8d1db07310f939268b9df4b7
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