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path: root/reference_model/src/ops
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2023-07-25Run clang-format and update copyrightJerry Ge
- Also added run clang-format to pre-commit runs Signed-off-by: Jerry Ge <jerry.ge@arm.com> Change-Id: I4e59ac0afbaa30dce0773aa63d92a1a3b119e2f3
2023-06-29Fix missing template instantiationsEric Kunze
Would cause unresolved symbols to appear when building in release mode. There are a couple of minor compiler warning fixes as well. Signed-off-by: Eric Kunze <eric.kunze@arm.com> Change-Id: I0f7e9a8771442a6e3c848edfe034ef534d0d8ca7
2023-06-29Add support for ERF operator to reference modelWon Jeon
Signed-off-by: Won Jeon <won.jeon@arm.com> Change-Id: Ib42b867287b83a183a0d0fb1f1eb29974f58fae4
2023-06-15Add ERROR_IF to incorrect broadcast shapesJerry Ge
Signed-off-by: Jerry Ge <jerry.ge@arm.com> Change-Id: I7460ad9eed3ed5c7cec6e855a0303753ed28eb1c
2023-06-02Add support for boolean outputs in model runnerJiacheng Liang
Comparison operators produce boolean outputs, which need to be written into client data Allow subgraph traverser to use main block to look for tensors when serialization handler is missing Signed-off-by: Jiacheng Liang <jiacheng.liang@arm.com> Change-Id: I6f9af470185541fa6466b3f7786c48f1555fa6f6
2023-05-18Add abs calculations under precise_modeTai Ly
This adds a second run of reference model under precise_mode when test_desc.json contains a "compliance" dictionary which contains a "mode" entry with value "dot product". In this second run, abs_mode will be set to true, which causes: 1. evaluation will take absolute values of inputs for these operators: conv2d, conv3d, depthwise_conv2d, fully_connected, matmul, transpose_conv2d, fft2d, rfft2d reduce_sum, avg_pool2d 2. output files will have prefix "bounds_" prepended to them Signed-off-by: Tai Ly <tai.ly@arm.com> Change-Id: I7070ecc7ead2d2ea3375c44663d653c6772b88e0
2023-05-17Add support for one dimension of size -1 in ReshapeOpJerry Ge
Signed-off-by: Jerry Ge <jerry.ge@arm.com> Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: I0ef7607f4266296a1204c5cccdb5be36f345b5ba
2023-05-10Refactor ref_model rank checking and add level check to argmaxJerry Ge
Signed-off-by: Jerry Ge <jerry.ge@arm.com> Change-Id: Iad035b31d5e5e83040068e6311501490765bfff7
2023-05-05[reference model] Add precise modeTai Ly
This adds --precise_mode=1 option to tosa_referece_model, which will cause reference model to convert all floating point tensors to FP64 tensors and compute all operators accordingly. Also adds optional -p arguments to test runners tosa_verif_run_tests.py and tosa_verif_framework_compiler_runner.py to run tests in precise mode Signed-off-by: Tai Ly <tai.ly@arm.com> Change-Id: I156055216ad61710096497a8fa1a653be2a602a3
2023-04-24AVG_POOL2D - Fix for stride renaming mistakeJeremy Johnson
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: I6deb355998ce88714b41eedc8170acbd7875f519
2023-04-20Add level checking to TOSA Ref modelJerry Ge
Signed-off-by: Jerry Ge <jerry.ge@arm.com> Change-Id: I5689d7c6b902a319a68fa4628b59e0bcc23aeca4
2023-04-06[reference model] support multiple regionsTai Ly
This allows IF/WHILE serialization to use regions instead of blocks to serialize nested regions. For backward compatibility, both region and block serialization are supported for IF/WHILE ops. Signed-off-by: Tai Ly <tai.ly@arm.com> Change-Id: Icf935561f9f5db38767ff76410bcd36896119395
2023-03-17Refactor 1L to INT64_C()Jerry Ge
Signed-off-by: Jerry Ge <jerry.ge@arm.com> Change-Id: If3f8c5a1f2dffac36448101959557f86b6ab6c7f
2023-03-03Update CAST fp to int roundingEric Kunze
Use rint() instead of round() to get round to nearest even behavior Signed-off-by: Eric Kunze <eric.kunze@arm.com> Change-Id: I45957be0e863de2207850b023626a7c0ea11e5eb
2023-02-28Update rank limits for SLICE, TILE and TRANSPOSELuke Hutton
Updated to align with corresponding changes to the spec. In addition, some ERROR_IF tests have been updated to match the checks specified by the spec, including: PAD, SLICE, TILE, TRANSPOSE. Signed-off-by: Luke Hutton <luke.hutton@arm.com> Change-Id: Ie2c5f48e79a5610eb82739170e25057a63dac1d8
2023-02-10Add FFT2d to the reference modelLuke Hutton
Includes: * FFT2d reference implementation * Basic TOSA tests Change-Id: Ie79fcb713542345d550ec013646810c1e890e388 Signed-off-by: Luke Hutton <luke.hutton@arm.com>
2023-02-02Remove accumulator attributes from all but AVG_POOL2DJames Ward
Signed-off-by: James Ward <james.ward@arm.com> Change-Id: If67f503a1848967bc1671646c3011d055b622c52
2023-01-31Create MI tests for Type Conversion: CASTJames Ward
* Add exclusion regex's to conformance generation Signed-off-by: James Ward <james.ward@arm.com> Change-Id: I15bef7451efd5662065060242d35bd7fa3381487
2023-01-24Add RFFT2d to the reference modelLuke Hutton
Includes: * RFFT2d reference implementation * TFLite framework tests * Basic TOSA tests * Serialization submodule upgrade with support for FFT/RFFT Signed-off-by: Luke Hutton <luke.hutton@arm.com> Change-Id: I2a687e9cf87fb62a26160ea52439ba9830bea36e
2023-01-19Fix for sign extending LOGICAL LEFT/RIGHT SHIFT resultsJeremy Johnson
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: I04261178694c004409aef2ff5c84c32b04729433
2023-01-19Create MI tests for Activation: CLAMP; Data Layout: PADJames Ward
* Existing float attributes now serialized as bytes Signed-off-by: James Ward <james.ward@arm.com> Change-Id: I415276706b9daf0893e3a59189f387f872ff07c2
2023-01-18Update for RESCALE spec apply_add clarificationJeremy Johnson
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: I6958904c2c8932e9fe03b3092672d62a06e96ee6
2023-01-13Reference model update for control flow operators supportJerry Ge
Rationale for making this change: - In the original design, for control flow operators like WhileOp, child blocks couldn't read the tensor variables (global consts) in the root level block, this patch added the machanism for child blocks to access their parent level block's tensors. - This change also relies on another serialization change on adding another layer of abtraction called Region: - Serialization patch: [region] Add TosaSerializationRegion to serialization_lib - Updated the corresponding python version of the serialization code: TosaSerializerRegion to python version of serialization_lib - This change also relies on the TOSA MLIR Translator change: Add RegionBuilder to TOSA MLIR Translator - Added the WhileOp related test cases: While, LSTM, GRU, RNN - Other related fixes Signed-off-by: Jerry Ge <jerry.ge@arm.com> Change-Id: I13ae33628ad07e41d248e88652ce1328654694ab
2022-12-20Add explicit template instantiations for abstract classesJared Smolens
- Added missing explicit template instantiations for abstract operator base classes Change-Id: I5eb678837f0edaf9bad0f7358b05abc5e3246af4 Signed-off-by: Jared Smolens <jared.smolens@arm.com>
2022-12-09Fix reference model memory leaks for the following opsJerry Ge
- OpClamp - OpArithmeticRightShift - OpMul - OpTable - OpTranspose Signed-off-by: Jerry Ge <jerry.ge@arm.com> Change-Id: Icb84a8a17c298b471a635310454775977a9133cb
2022-11-29FP16 improvementsJames Ward
* Update FP16 resize to newest spec version * Correct casting to fp16 for graphs of >1 ops Change-Id: Iedff9a71eb7f72948b3c00a635bb0fd07d414bcd Signed-off-by: James Ward <james.ward@arm.com>
2022-11-19Fix the floating point precision issue for Sigmoid FP32Jerry Ge
The original calculation was auto-promoted to FP64 and causing the discrepencies between TFL and TOSA. Sigmoid is now calculated with only single precision floating point values. Signed-off-by: Jerry Ge <jerry.ge@arm.com> Change-Id: Ia65b491ccf8af2493cc01ca66c28faff841407c2
2022-11-18Zero point addition in RESCALE should be int32Eric Kunze
Clipping to the output range is done post zero point addition. Signed-off-by: Eric Kunze <eric.kunze@arm.com> Change-Id: I5271a08fb2f6f9804fb1af3c6945131f948f452a
2022-11-09Add BF16 support to reference modelJames Ward
* Upgrade Eigen to 3.4.0 (for bfloat16 support) and add work- arounds for reduce.any() and reduce.all() bugs (introduced between 3.3.7 and 3.4.0) * Truncation to bfloat16 now performed in eval() methods Signed-off-by: James Ward <james.ward@arm.com> Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: If5f5c988d76d3d30790acf3b97081726b89205fe
2022-10-13Rename FLOAT type to FP32Jeremy Johnson
Update tensor operations naming to state input type as TxT in all cases. Effects CONV2D, CONV3D, DEPTHWISE_CONV2D, FULLY_CONNECTED, TRANSPOSE_CONV2D. Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: Ic959acfcb3aa0a910b33b774a5a85fac08219205
2022-10-11Reference model changes for fp16 supportJames Ward
Change-Id: I72f21fcfa153046274969d327313e3349981dbe6 Signed-off-by: James Ward <james.ward@arm.com>
2022-08-29Update framework test generator to support TF/TFL conv3d.TatWai Chong
Add a new attribute `rank` to indicate the testing dimension range of input tensor. Also fix a minor bug in the existing conv3d simulation. And relax rescale operator in the reference model to support 5-D input. Change-Id: Ib42fe513831dc83eb7f9af07e011787a6c752704 Signed-off-by: TatWai Chong <tatwai.chong@arm.com>
2022-08-26Align padding for transpose_conv2d to match specEric Kunze
Increasing out pad values now leads to increasing pad. Reference model changes, and test generator changes to match specification definition Change-Id: I4f3ebfbca5048354fb15bedc7ab640ff28ed853a Signed-off-by: Eric Kunze <eric.kunze@arm.com> Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
2022-08-24Enabled 16-bit TABLE REQUIRE statementJerry Ge
Signed-off-by: Jerry Ge <jerry.ge@arm.com> Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: Ib6e81814e022f33e45430e47ca99d6d9f9e0e101
2022-08-15Check that the shape calculation for PAD is correctEric Kunze
Matches a corresponding change to the specification Change-Id: If70356e0c78c1c88530e5d2f58bc50de864f249a Signed-off-by: Eric Kunze <eric.kunze@arm.com>
2022-08-10Update TOSA resize to match specificationTatWai Chong
Attribute stride and shift are removed, and has new scale and border. Also add tests in the generator to test tf.resize with all option combinations. Signed-off-by: TatWai Chong <tatwai.chong@arm.com> Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: If0f330d04395762d2d907863235eda1532f5e1ff
2022-06-17Fix reference model use of weight zero pointv0.30.0v0.30Eric Kunze
In the case of an int16xint8 test, the zero point was not being subtracted from the weights. Signed-off-by: Eric Kunze <eric.kunze@arm.com> Change-Id: Ic77119b200b952715870abc11d09d1a646da86b1
2022-06-15Remove quantization info from serialization attributesEric Kunze
Any needed information moves into the attributes for each operator. New serialization library version removes teh quantization information attributes from the schema Signed-off-by: Eric Kunze <eric.kunze@arm.com> Change-Id: Icf6165687ab1fd34a01f64c01b0b92b2820e72fa
2022-06-13Update transpose_conv2d to align with TOSA specTatWai Chong
Rename outpad to out_pad, and also fix the dilation in the generator. Change-Id: I4c1599871f0d0b41856e819d8c644a85ca6d8267 Signed-off-by: TatWai Chong <tatwai.chong@arm.com>
2022-06-07Remove dilation from transpose_conv2d opEric Kunze
It is not in the spec and is being removed from serialization Change-Id: I82a102de37d8eb75210088dfda2df9b2fadb9c74 Signed-off-by: Eric Kunze <eric.kunze@arm.com>
2022-06-07Change size check in TILE to ERROR_IFEric Kunze
Now corresponds with the ERROR_IF in the specification Signed-off-by: Eric Kunze <eric.kunze@arm.com> Change-Id: I1f4e303c330d18661ca2e6ef65d0119baabedec6
2022-06-07Align the serialization schema with TOSA 0.24.0 specificationTatWai Chong
The operators are pool, conv, reshape, slice, transpose, and table. Signed-off-by: TatWai Chong <tatwai.chong@arm.com> Change-Id: I13f8d626df59be14361068222746347ba69d2fb5
2022-05-31Remove RESHAPE -1 dimensions supportJeremy Johnson
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: I098daf49c92da12c07143cdd23ac9bb58acebbb9
2022-05-26Add support for uint16_t to RESCALEJeremy Johnson
Update ref-model RESCALE op to support UINT16 conversions Add testing for RESCALE UINT16 and ERROR_IFs Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: Ic6e6e53de1f0b054bedb9e6ba3856e7475498aba
2022-05-16Initialize accumulator with bias value for CONV3DEric Kunze
Bias was mistakenly unused previously. Signed-off-by: Eric Kunze <eric.kunze@arm.com> Change-Id: If776e923f7b3cd442c7f147fcbd22a214c37fd36
2022-05-16Adjust divisor calculationEric Kunze
Fixes issue where pad_left < stride would cause padding values to be missed Signed-off-by: Eric Kunze <eric.kunze@arm.com> Change-Id: I2ba0d0969ce1f00e2cb3ca1ab293c5e15a0c7749
2022-05-04Fix for NEGATE using 32-bit accumulatorJeremy Johnson
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: Ie5d119dc317303a0d2a71d018ac94ce6800ecbf5
2022-04-28Update tensor ops ERROR_IF criteriaJeremy Johnson
Update to ref model to check ERROR_IF criteria for pooling and convolution ops to match specification Update to tosa_verif_build_tests to produce valid test ranges and new ERROR_IF tests Plus update pooling ops big kernel to 9 (from 6) for better testing coverage and set dilation to 1 and add out_pad bottom & right for transpose_conv2d to match specification Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: Ic5759872d40ae8d3f3d07043d9a0f2fa0244d72e
2022-04-05Add missing REQUIREs check to REDUCE_SUM in refmodelJeremy Johnson
And limit REDUCE_SUM test values to within int32 Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: I4d902b245d17eb343cfb2bbc23d9db28c1d1f4c3
2022-03-24Add missing REQUIRE to NEGATE opJeremy Johnson
And update test generation to create values in predictable range Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: I4ba1ff445bf6caeec9f8782902fc45929fe0ee77
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