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This offers dynamism support for slice op.
Change-Id: I4521c072c663a01e03e575e0cbbc8671c832f646
Signed-off-by: TatWai Chong <tatwai.chong@arm.com>
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Changed to use pad input of PadOp for testing.
The pad input is now a tensor of tosa.shape type.
moved padding error checking from checkTensorAttributes to eval
modified pad's PadOutputShapeMismatch test generation to avoid
generating output shapes with dimensions <= 0
Signed-off-by: Tai Ly <tai.ly@arm.com>
Change-Id: I437c86d9a012903458a648667f6693db67b97d76
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Signed-off-by: Won Jeon <won.jeon@arm.com>
Change-Id: Id37100ba8bc2ac64b1f54788c6f765fedfab0816
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- fixed up reshape conformance tests to use shape input instead of attribute
- fixed up tile conformance tests to use shape input instead of attribute
- fixed output and output rank of dim op
- allow rank 0 and rank 1 tensors for tosa.shape values (for shape = {})
- added initialization of rank 0 const_shape tensors (for shape = {})
- Update conformance tests to use new rescale attributes
Signed-off-by: Tai Ly <tai.ly@arm.com>
Signed-off-by: Won Jeon <won.jeon@arm.com>
Change-Id: I6cce0d2a9ab066fe20a2abf9d2cfde3eb3d8c18b
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int8/int16 should be used for the clamping, not int32_t
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I18209ca76cc83d95dc61f20f88344aafdbd72033
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Add lower bound to ABS ERROR checks to allow for cancellation of
small values in error bounds checking.
Re-adjust the error bounds multiplier to match the specification.
Fix up naming of verify library info structs.
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: I3e178c3d7d59fef9c3696178646b23ed2a3ffc61
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- For Casting from Float to Integers, if the input float is greater
than INT_MAX, an overflow will happen when calling rint which causes the
clipplings to be ineffectives
- Moved all the range checks and clippings before rint to avoid this
issue
Signed-off-by: Jerry Ge <jerry.ge@arm.com>
Change-Id: Ic189d59685b6d36464e3ef26766665148a660a14
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- With input of 2147483648.00, the output overflows to -2147483648
- The root cause is the following:
- std::rint still returns float, the existing implementation is
forcing a cast from that float to int32_t
- when the input is over INT32_MAX, the output right after rint will
overflow which casues the clipplings later to be ineffective
- Instead, perform the range check before rint
Signed-off-by: Jerry Ge <jerry.ge@arm.com>
Change-Id: Ib5a8cfd98aea17e326f8b11097beeb2d2b3efac9
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Test generation changed to only produce static reshape tests
Reference model changed to produce ERROR_IF on inferred shapes
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: I92c92a40e7c0e457961bc654630040dff79a750b
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Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: I35d14e3e9f80198c1da3d267f12bc7a9a055e698
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Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: I3555e7216d403d436bf6e39d4b16bb000645c4bb
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Use platform agnostic format specifiers for `int64_t`.
Change-Id: I002d94c1a0c0431ec09fc165a584a8f4b3ddc17d
Signed-off-by: Jack Frankland <jack.frankland@arm.com>
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Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Icf04afc7fdae8f506ba4710aaa085d6ea53bb5bf
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The bias operand of the fully connected operator must be a 1D tensor
either equal to the output channel size or of size 1. Previously we
asserted the former case, we now include the second case.
Signed-off-by: Jack Frankland <jack.frankland@arm.com>
Change-Id: I07dbc8a3aa1650703e5c50e1e7f36bb9539fd5db
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- Add a new command line option to allow users to specify a custom
defined dll library
- Add a custom registry to store all registered libraries
- Add a dummy example (custom_op_example.cpp) for demonstrating this new
feature
Signed-off-by: Jerry Ge <jerry.ge@arm.com>
Change-Id: I7c360835933f77e33fcbd772cabfe01d82282d47
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Added new ABS_ERROR mode to verify lib and ref model.
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Ifb78290675833d3df7df91a4d6cef336b02b64a4
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Add support for local_bound attributes.
Signed-off-by: Tai Ly <tai.ly@arm.com>
Change-Id: Ie1acb65ca2495fb7d1512bf120568c695635d631
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CONST data should be either data in the flatbuffer file or loaded
in via an input file. This check catches if neither of these have
been done, instead of marking uninitialized data as valid.
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: I97dc2254f0b58c05c39cc0281a331a394c2a4b3c
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Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: I414899d0f504af00da185e0fc4119f3bde2bae3a
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- Nested looping instead of using Eigen extract_image_patches to avoid OOM errors
Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: Id4d78d5b5dd04a00134f29b1d29f814195515b1f
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Align with the change in the spec.
Define idiv_floor to give equivalent behavior to the floating-point
floor function for image coordinate calculation.
Change-Id: Ice06d354d58b1bb0dfedab55c9cc9eac1598b50c
Signed-off-by: TatWai Chong <tatwai.chong@arm.com>
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input_unsigned and output_unsigned were added to the specification.
Older TOSA files with uint data types are still supported.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I125886ffc92975d99971e56e2075dd5d96bdbdc4
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Signed-off-by: Won Jeon <won.jeon@arm.com>
Change-Id: Iea11ee5d3d98773e9c5e9b827593c05afb41ce3b
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add support for bias broadcasting for operators:
- conv2d
- conv3d
- depthwise_conv2d
- transpose_conv2d
- fully_connected
could not add framework test for this because tf.nn.bias_add requires
bias size to match channel dimension.
manually tested reference model evaluation on tosa mlir with bias size
of 1
Signed-off-by: Tai Ly <tai.ly@arm.com>
Change-Id: I70d29d231a63fc03b10e3006cbd6b16b53cca1f2
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Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I22939e75a08349816a9c103eb7312edcec53855e
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Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I8645382983c257e5102982d487283560088e2d2a
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- The previous ref_model was allocating the memory for all tensors in
the graph upfront which is unnecessary and wasteful.
- This patch changes to only allocate initial input tensors on the entry
point using the allocateInputTensor() function.
- The output tensors are ensured to have been allocated before executing
a node. The output tenosrs are the inputs for the next node.
- When a node's evaluation is finished, its input tensors will be freed
if they will no longer be used by anyone else.
Signed-off-by: Jerry Ge <jerry.ge@arm.com>
Change-Id: Ibb3e8c9e6344f6cd9eb20532a03b2097b93247f9
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- Also added run clang-format to pre-commit runs
Signed-off-by: Jerry Ge <jerry.ge@arm.com>
Change-Id: I4e59ac0afbaa30dce0773aa63d92a1a3b119e2f3
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Would cause unresolved symbols to appear when building in
release mode.
There are a couple of minor compiler warning fixes as well.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I0f7e9a8771442a6e3c848edfe034ef534d0d8ca7
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Signed-off-by: Won Jeon <won.jeon@arm.com>
Change-Id: Ib42b867287b83a183a0d0fb1f1eb29974f58fae4
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Signed-off-by: Jerry Ge <jerry.ge@arm.com>
Change-Id: I7460ad9eed3ed5c7cec6e855a0303753ed28eb1c
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Comparison operators produce boolean outputs, which need to be written into client data
Allow subgraph traverser to use main block to look for tensors when serialization handler is missing
Signed-off-by: Jiacheng Liang <jiacheng.liang@arm.com>
Change-Id: I6f9af470185541fa6466b3f7786c48f1555fa6f6
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This adds a second run of reference model under precise_mode
when test_desc.json contains a "compliance" dictionary which
contains a "mode" entry with value "dot product".
In this second run, abs_mode will be set to true, which causes:
1. evaluation will take absolute values of inputs for these operators:
conv2d, conv3d, depthwise_conv2d, fully_connected,
matmul, transpose_conv2d, fft2d, rfft2d
reduce_sum, avg_pool2d
2. output files will have prefix "bounds_" prepended to them
Signed-off-by: Tai Ly <tai.ly@arm.com>
Change-Id: I7070ecc7ead2d2ea3375c44663d653c6772b88e0
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Signed-off-by: Jerry Ge <jerry.ge@arm.com>
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: I0ef7607f4266296a1204c5cccdb5be36f345b5ba
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Signed-off-by: Jerry Ge <jerry.ge@arm.com>
Change-Id: Iad035b31d5e5e83040068e6311501490765bfff7
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This adds --precise_mode=1 option to tosa_referece_model,
which will cause reference model to convert all floating point tensors
to FP64 tensors and compute all operators accordingly.
Also adds optional -p arguments to test runners tosa_verif_run_tests.py
and tosa_verif_framework_compiler_runner.py to run tests in precise mode
Signed-off-by: Tai Ly <tai.ly@arm.com>
Change-Id: I156055216ad61710096497a8fa1a653be2a602a3
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Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: I6deb355998ce88714b41eedc8170acbd7875f519
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Signed-off-by: Jerry Ge <jerry.ge@arm.com>
Change-Id: I5689d7c6b902a319a68fa4628b59e0bcc23aeca4
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This allows IF/WHILE serialization to use regions
instead of blocks to serialize nested regions.
For backward compatibility, both region and block
serialization are supported for IF/WHILE ops.
Signed-off-by: Tai Ly <tai.ly@arm.com>
Change-Id: Icf935561f9f5db38767ff76410bcd36896119395
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Signed-off-by: Jerry Ge <jerry.ge@arm.com>
Change-Id: If3f8c5a1f2dffac36448101959557f86b6ab6c7f
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Use rint() instead of round() to get round to nearest even behavior
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I45957be0e863de2207850b023626a7c0ea11e5eb
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Updated to align with corresponding changes to the
spec.
In addition, some ERROR_IF tests have been updated to
match the checks specified by the spec, including:
PAD, SLICE, TILE, TRANSPOSE.
Signed-off-by: Luke Hutton <luke.hutton@arm.com>
Change-Id: Ie2c5f48e79a5610eb82739170e25057a63dac1d8
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Includes:
* FFT2d reference implementation
* Basic TOSA tests
Change-Id: Ie79fcb713542345d550ec013646810c1e890e388
Signed-off-by: Luke Hutton <luke.hutton@arm.com>
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Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: If67f503a1848967bc1671646c3011d055b622c52
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* Add exclusion regex's to conformance generation
Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: I15bef7451efd5662065060242d35bd7fa3381487
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Includes:
* RFFT2d reference implementation
* TFLite framework tests
* Basic TOSA tests
* Serialization submodule upgrade with support for FFT/RFFT
Signed-off-by: Luke Hutton <luke.hutton@arm.com>
Change-Id: I2a687e9cf87fb62a26160ea52439ba9830bea36e
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Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: I04261178694c004409aef2ff5c84c32b04729433
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* Existing float attributes now serialized as bytes
Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: I415276706b9daf0893e3a59189f387f872ff07c2
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Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: I6958904c2c8932e9fe03b3092672d62a06e96ee6
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Rationale for making this change:
- In the original design, for control flow operators like WhileOp,
child blocks couldn't read the tensor variables (global consts) in the root level block,
this patch added the machanism for child blocks to access their parent
level block's tensors.
- This change also relies on another serialization change on adding
another layer of abtraction called Region:
- Serialization patch: [region] Add TosaSerializationRegion to serialization_lib
- Updated the corresponding python version of the serialization code: TosaSerializerRegion to python version of serialization_lib
- This change also relies on the TOSA MLIR Translator change: Add RegionBuilder to TOSA MLIR Translator
- Added the WhileOp related test cases: While, LSTM, GRU, RNN
- Other related fixes
Signed-off-by: Jerry Ge <jerry.ge@arm.com>
Change-Id: I13ae33628ad07e41d248e88652ce1328654694ab
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