diff options
| -rw-r--r-- | src/mlia/resources/vela/vela.ini | 2 | ||||
| -rw-r--r-- | tests/mlia/test_devices_ethosu_reporters.py | 6 |
2 files changed, 5 insertions, 3 deletions
diff --git a/src/mlia/resources/vela/vela.ini b/src/mlia/resources/vela/vela.ini index 382820d..29a5179 100644 --- a/src/mlia/resources/vela/vela.ini +++ b/src/mlia/resources/vela/vela.ini @@ -58,6 +58,7 @@ Dram_write_latency=250 const_mem_area=Axi0 arena_mem_area=Axi0 cache_mem_area=Axi0 +arena_cache_size=2096768 ; Shared SRAM: the SRAM is shared between the Ethos-U and the Cortex-M software ; The non-SRAM memory is assumed to be read-only @@ -65,6 +66,7 @@ cache_mem_area=Axi0 const_mem_area=Axi1 arena_mem_area=Axi0 cache_mem_area=Axi0 +arena_cache_size=2096768 ; Dedicated SRAM: the SRAM (384KB) is only for use by the Ethos-U ; The non-SRAM memory is assumed to be read-writeable diff --git a/tests/mlia/test_devices_ethosu_reporters.py b/tests/mlia/test_devices_ethosu_reporters.py index 2d5905c..0da50e0 100644 --- a/tests/mlia/test_devices_ethosu_reporters.py +++ b/tests/mlia/test_devices_ethosu_reporters.py @@ -238,7 +238,7 @@ def test_report_operators( Const mem area Axi1 Arena mem area Axi0 Cache mem area Axi0 - Arena cache size 4,294,967,296 bytes + Arena cache size 2,096,768 bytes System config Ethos_U55_High_End_Embedded Accelerator clock 500,000,000 Hz @@ -282,7 +282,7 @@ def test_report_operators( "const_mem_area": "Axi1", "arena_mem_area": "Axi0", "cache_mem_area": "Axi0", - "arena_cache_size": {"value": 4294967296, "unit": "bytes"}, + "arena_cache_size": {"value": 2096768, "unit": "bytes"}, }, "system_config": { "accelerator_clock": {"value": 500000000.0, "unit": "Hz"}, @@ -355,7 +355,7 @@ def test_report_operators( "Axi1", "Axi0", "Axi0", - 4294967296, + 2096768, "bytes", "Ethos_U55_High_End_Embedded", 500000000.0, |