; ; SPDX-FileCopyrightText: Copyright 2021, 2024 Arm Limited and/or its affiliates ; SPDX-License-Identifier: Apache-2.0 ; ; Licensed under the Apache License, Version 2.0 (the "License"); ; you may not use this file except in compliance with the License. ; You may obtain a copy of the License at ; ; http://www.apache.org/licenses/LICENSE-2.0 ; ; Unless required by applicable law or agreed to in writing, software ; distributed under the License is distributed on an "AS IS" BASIS, ; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. ; See the License for the specific language governing permissions and ; limitations under the License. ; ; ----------------------------------------------------------------------------- ; Vela configuration file ; ----------------------------------------------------------------------------- ; System Configuration ; Ethos-U55 High-End Embedded: SRAM (4 GB/s) and Flash (0.5 GB/s) [System_Config.Ethos_U55_High_End_Embedded] core_clock=500e6 axi0_port=Sram axi1_port=OffChipFlash Sram_clock_scale=1.0 Sram_burst_length=32 Sram_read_latency=32 Sram_write_latency=32 OffChipFlash_clock_scale=0.125 OffChipFlash_burst_length=128 OffChipFlash_read_latency=64 OffChipFlash_write_latency=64 ; Ethos-U65 High-End: SRAM (16 GB/s) and DRAM (3.75 GB/s) [System_Config.Ethos_U65_High_End] core_clock=1e9 axi0_port=Sram axi1_port=Dram Sram_clock_scale=1.0 Sram_burst_length=32 Sram_read_latency=32 Sram_write_latency=32 Dram_clock_scale=0.234375 Dram_burst_length=128 Dram_read_latency=500 Dram_write_latency=250 ; SRAMx2 (16 GB/s) and DRAMx1 (3.75 GB/s) [System_Config.Ethos_U85_SYS_DRAM_Low] core_clock=500e6 axi0_port=Sram axi1_port=Dram Sram_clock_scale=1.0 Sram_ports_used=2 Sram_burst_length=64 Sram_read_latency=16 Sram_write_latency=16 Dram_clock_scale=0.46875 Dram_ports_used=1 Dram_burst_length=128 Dram_read_latency=500 Dram_write_latency=250 ; SRAMx2 (32 GB/s) and DRAM (12 GB/s) [System_Config.Ethos_U85_SYS_DRAM_Mid_512] core_clock=1e9 axi0_port=Sram axi1_port=Dram Sram_clock_scale=1.0 Sram_ports_used=2 Sram_burst_length=64 Sram_read_latency=32 Sram_write_latency=32 Dram_clock_scale=0.75 Dram_ports_used=1 Dram_burst_length=128 Dram_read_latency=500 Dram_write_latency=250 ; SRAMx2 (32 GB/s) and DRAMx2 (24 GB/s) [System_Config.Ethos_U85_SYS_DRAM_Mid_1024] core_clock=1e9 axi0_port=Sram axi1_port=Dram Sram_clock_scale=1.0 Sram_ports_used=2 Sram_burst_length=64 Sram_read_latency=32 Sram_write_latency=32 Dram_clock_scale=0.75 Dram_ports_used=2 Dram_burst_length=128 Dram_read_latency=500 Dram_write_latency=250 ; SRAMx4 (64 GB/s) and DRAMx2 (24 GB/s) [System_Config.Ethos_U85_SYS_DRAM_High_2048] core_clock=1e9 axi0_port=Sram axi1_port=Dram Sram_clock_scale=1.0 Sram_ports_used=4 Sram_burst_length=64 Sram_read_latency=32 Sram_write_latency=32 Dram_clock_scale=0.75 Dram_ports_used=2 Dram_burst_length=128 Dram_read_latency=500 Dram_write_latency=250 ; ----------------------------------------------------------------------------- ; Memory Mode ; Shared SRAM: the SRAM is shared between the Ethos-U and the Cortex-M software ; The non-SRAM memory is assumed to be read-only [Memory_Mode.Shared_Sram] const_mem_area=Axi1 arena_mem_area=Axi0 cache_mem_area=Axi0 ; Dedicated SRAM: the SRAM (384KB) is only for use by the Ethos-U ; The non-SRAM memory is assumed to be read-writeable [Memory_Mode.Dedicated_Sram] const_mem_area=Axi1 arena_mem_area=Axi1 cache_mem_area=Axi0 arena_cache_size=393216