diff options
| author | Liam Barry <liam.barry@arm.com> | 2022-02-02 17:03:06 +0000 |
|---|---|---|
| committer | Liam Barry <liam.barry@arm.com> | 2022-02-08 14:26:38 +0000 |
| commit | 5cdfa9b834dc5a94c70f9f2b1f5c849dc5439e85 (patch) | |
| tree | efee9f38d83e4e8c0fb4b0ddcfa86eaf5f50626b /scripts/cmake/templates/peripheral_memmap.h.template | |
| parent | c64f506a848ed15d8fb041e4d818a3f92ebe0df8 (diff) | |
| download | ml-embedded-evaluation-kit-5cdfa9b834dc5a94c70f9f2b1f5c849dc5439e85.tar.gz | |
MLECO-2900: Update Cmake desc
Added QSPI_SRAM_BASE for Secure region.
Updated UART and other peripherals affected by change in reserved region
Updated names of some base addresses in cmake and template files
Error in TRM swapping individual for combined GPIO IRQs reported
Follow-up - Marked region in TRM not covered in CMake
Change-Id: I046e740053477fe3a51bc171a2b7e28f4a9f0523
Signed-off-by: Liam Barry <liam.barry@arm.com>
Diffstat (limited to 'scripts/cmake/templates/peripheral_memmap.h.template')
| -rw-r--r-- | scripts/cmake/templates/peripheral_memmap.h.template | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/scripts/cmake/templates/peripheral_memmap.h.template b/scripts/cmake/templates/peripheral_memmap.h.template index a8c883c..d7f0b3a 100644 --- a/scripts/cmake/templates/peripheral_memmap.h.template +++ b/scripts/cmake/templates/peripheral_memmap.h.template @@ -31,10 +31,10 @@ #cmakedefine CMSDK_GPIO2_BASE (@CMSDK_GPIO2_BASE@) /* User GPIO 2 Base Address */ #cmakedefine CMSDK_GPIO3_BASE (@CMSDK_GPIO3_BASE@) /* User GPIO 3 Base Address */ -#cmakedefine AHB_USER0_BASE (@AHB_USER0_BASE@) /* AHB USER 0 Base Address (4KB) */ -#cmakedefine AHB_USER1_BASE (@AHB_USER1_BASE@) /* AHB USER 1 Base Address (4KB)*/ -#cmakedefine AHB_USER2_BASE (@AHB_USER2_BASE@) /* AHB USER 2 Base Address (4KB)*/ -#cmakedefine AHB_USER3_BASE (@AHB_USER3_BASE@) /* AHB USER 3 Base Address (4KB)*/ +#cmakedefine FMC_CMDSK_GPIO_BASE0 (@FMC_CMDSK_GPIO_BASE0@) /* FMC_CMDSK_GPIO_BASE 0 Base Address (4KB) */ +#cmakedefine FMC_CMDSK_GPIO_BASE1 (@FMC_CMDSK_GPIO_BASE1@) /* FMC_CMDSK_GPIO_BASE 1 Base Address (4KB)*/ +#cmakedefine FMC_CMDSK_GPIO_BASE2 (@FMC_CMDSK_GPIO_BASE2@) /* FMC_CMDSK_GPIO_BASE 2 Base Address (4KB)*/ +#cmakedefine FMC_USER_AHB_BASE (@FMC_USER_AHB_BASE@) /* FMC_USER_AHB_BASE Base Address (4KB)*/ #cmakedefine DMA0_BASE (@DMA0_BASE@) /* DMA0 (4KB) */ #cmakedefine DMA1_BASE (@DMA1_BASE@) /* DMA1 (4KB) */ |