From 0b8268a0dac80aa22133ca83ed6912d3b565439a Mon Sep 17 00:00:00 2001 From: Louis Verhaard Date: Wed, 5 Aug 2020 16:11:29 +0200 Subject: MLBEDSW-2688: Improved LUT support - Support for more than one 256-byte LUT in SHRAM - No DMA is performed for a LUT that is already located in SHRAM - Added MemArea.Shram, used for LUT, to avoid false address collision asserts during SRAM tensor allocation - Added read access to LUT in memory access calculation Change-Id: If4d1eded5ed029d253f4f5efb2d80495fc3eac99 Signed-off-by: Louis Verhaard --- ethosu/vela/insert_dma.py | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) (limited to 'ethosu/vela/insert_dma.py') diff --git a/ethosu/vela/insert_dma.py b/ethosu/vela/insert_dma.py index 6c5c8031..6cd2202c 100644 --- a/ethosu/vela/insert_dma.py +++ b/ethosu/vela/insert_dma.py @@ -61,13 +61,7 @@ def insert_dma_cmd(op, arch): dma_cmd.attrs["destination"] = new_tens.mem_area dma_cmd.run_on_npu = True if tens.purpose == TensorPurpose.LUT: - # TODO: Add support more than one LUT at a time - # Reserve last 2 blocks for LUT - if arch.shram_reserved_unused_banks == 0: - arch.shram_reserved_unused_banks = 2 - arch.shram_total_banks -= arch.shram_reserved_unused_banks - # Place the LUT in the last 2 blocks of SHRAM - new_tens.address = arch.shram_bank_size * arch.shram_total_banks + new_tens.mem_area = MemArea.Shram op.inputs[idx] = new_tens return op -- cgit v1.2.1