From 284223e8e086dc6c7b7f1edf3b3555401e3d0a96 Mon Sep 17 00:00:00 2001 From: Tim Hall Date: Tue, 9 Jun 2020 13:17:21 +0100 Subject: MLBEDSW-2471: Remove unused CLI options - Removed --inter-pass-cycle-delay - Removed --dram-bandwidth - Removed --batch-size Signed-off-by: Tim Hall Change-Id: Ib613f47a9e911c652e522b5aa9ec58ae5391b0fd --- ethosu/vela/architecture_features.py | 7 ------- 1 file changed, 7 deletions(-) (limited to 'ethosu/vela/architecture_features.py') diff --git a/ethosu/vela/architecture_features.py b/ethosu/vela/architecture_features.py index f1cabdd1..15cf0ea4 100644 --- a/ethosu/vela/architecture_features.py +++ b/ethosu/vela/architecture_features.py @@ -149,8 +149,6 @@ Note the difference between ArchitectureFeatures and CompilerOptions accelerator_config, system_config, permanent_storage, - inter_pass_cycle_delay, - dram_bandwidth, override_block_config, block_config_limit, global_memory_clock_scale, @@ -212,9 +210,6 @@ Note the difference between ArchitectureFeatures and CompilerOptions self.memory_clocks = self.memory_clock_scales * self.npu_clock self.memory_bandwidths_per_cycle = self.memory_port_widths * self.memory_clock_scales / 8 - if dram_bandwidth != 0: - self.memory_bandwidths_per_cycle[MemArea.Dram] = dram_bandwidth * 1e9 / self.npu_clock - self.memory_bandwidths_per_second = self.memory_bandwidths_per_cycle * self.npu_clock # sizes as N x H x W x C. we need to round up to these when allocating storage @@ -233,8 +228,6 @@ Note the difference between ArchitectureFeatures and CompilerOptions TensorFormat.NHCWB16: (1, 1, 1, 16), } - self.inter_pass_cycle_delay = inter_pass_cycle_delay - self.default_weight_format = TensorFormat.WeightsCompressed self.default_feature_map_format = TensorFormat.NHWC -- cgit v1.2.1