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2021-01-22MLBEDSW-3418: Bug fixes 16-bit leaky reluLouis Verhaard
Bug fixes for 16-bit leaky relu with different quantizations for IFM/OFM: - Overflow error occurred for alpha == 0 - The identity multiplication overwrote the result of the alpha multiplication Signed-off-by: Louis Verhaard <louis.verhaard@arm.com> Change-Id: I18f8d121f6e7c598b721c472b476b9285eeff543
2021-01-22MLBEDSW-3843: Segmentation fault search allocatorLouis Verhaard
Vector index could become negative in search allocator. Change-Id: I3b77474a86fd5f4227d8b2a825d11ec8ec0fb073 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2021-01-22MLBEDSW-3736: Replaced placeholder type annotationserik.andersson@arm.com
Placeholder type annotations have been replaced to their corresponding types. Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com> Change-Id: I017b87174ceefbfa40c53b2bd450d7404b9f4f30
2021-01-22MLBEDSW-3858: Incorrect PAD usage bugerik.andersson@arm.com
Fixed a bug where PAD having no consumers would result in a crash. Now the constraint doesn't crash and thus the intended error message is shown, resulting in easier debugging. Change-Id: I1e4403d47a6152e7adbf7bc065db86d4217d39cc Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
2021-01-20[MLBEDSW-2787] Remove op.attrs["rescale"] in softmax.pyFredrik Svedberg
Added RescaleAdd operation to avoid non-standard attribute "rescale" for Add operation. Also changed ResizeBilinear in the same way. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: I1d286f63890585c06b8a161df1ff77e3f844a4b9
2021-01-19MLBEDSW-3144: Add weights compression ratioDiqing Zhong
- Also removed the original bit_per_element Change-Id: I51bfbd28e14f316aae2d542bb610a3ed57b8b53b Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
2021-01-19MLBEDSW-3418: More operator checks for infinityLouis Verhaard
- Added operator check that OFM scale > smallest float32 number - Generalized the restriction that IFM/OFM scale must not be infinite Change-Id: I918f5ea3d8fdec6e8f6bd6780ed13a19d1234ed6 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2021-01-14MLBEDSW-3654 Fix for split/concat opsPatrik Gustavsson
Fix for split/concat ops - set correct ifm_shapes in pass packing Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I7373b1743e4511b6c1dfaa398b927fbb1b454f60
2021-01-12MLBEDSW-3769: Fix print errorDiqing Zhong
Change-Id: I464528510d6646ac685a31c1b3355252f44d2692 Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
2020-12-23MLBEDSW-3804 Add missing check for npu_opPatrik Gustavsson
Add missing check for npu_op Op ifm ofm shapes only valid for npu_ops. Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I73624c8e122fee510ab8320172b8b3a648a6f070
2020-12-22MLBEDSW-3763: Vela memory settingTim Hall
- Fixed bug which stopped DRAM being selected for Ethos-U55 - Fixed type of default values used by burst length and latency Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Ic1ae36586e3b4ffe8af8fea1fd23501d434b7731
2020-12-22MLBEDSW-3654 Fix setting op ifm ofm for LeakyReluPatrik Gustavsson
Added op.set_ifm_ofm_shapes to the convertion functions Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I727d4cf34395bc0997863df1ac89537f84f9c7c8
2020-12-22MLBEDSW-3495: Tensor resampling mode for transposeLouis Verhaard
Sets IFM's resampling mode for transpose convolutions. Change-Id: I11744a932aea7c11fa70036c43a7ed01ea4b2929 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-12-22MLBEDSW-3561: Support const STRING input tensorsLouis Verhaard
Added handling of input tensors with constant string data. Signed-off-by: Louis Verhaard <louis.verhaard@arm.com> Change-Id: Ieb5164a9d56d580ad08ea834bf2cbb7288cd9539
2020-12-22MLBEDSW-3711: Added operator checks for PAD.Erik Andersson
Constraints and unit tests were added to check the new pad operator. Change-Id: Id6d4cf2c4da486928c8f46ba1fa124eec66895a6 Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
2020-12-22MLBEDSW-3499: Support for PAD operatorLouis Verhaard
Replaces the PAD operator by hardware padding when possible. Change-Id: I9dce0885e51a4a73715824d7368637222e39b2b3 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-12-22MLBEDSW-1493: Optimise strided convDiqing Zhong
- Reshape/rearrange IFM and weight tensor for better HW utilization - Update estimator to cover this case Change-Id: I4be70a69fa600a1951bf1c247f9973e6cc9b03f4 Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
2020-12-22MLBEDSW-3791 Fix converting axis to 4D axisPatrik Gustavsson
Fix converting axis to 4D axis. Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I83501494738f402b374efd8a369e5001f17b8152
2020-12-22MLBEDSW-3790 Fix for cpu ops has no op.ifm_shapesPatrik Gustavsson
Fixes for MLBEDSW-3790, MLBEDSW-3792 and MLBEDSW-3794 3790: Fix for cpu ops has no op.ifm_shapes - Check before added to pass 3792: Debug database, fix for cpu op with 5D tensor - Do not try to convert to 4D 3794: Fix covert ResizeBilinear to 2x2 maxpool -set ifm ofm shapes Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I9144dc77e2f6e5c3707c5bf2f204c1d13d5148ba
2020-12-21MLBEDSW-3786 Fix index out of range on ofm_shapesPatrik Gustavsson
Ofm_shapes only set on operator for npu_ops. Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: Iab98e24132f3a4004debce9013355e2ef16b0b6f
2020-12-21Revert "Revert "MLBEDSW-3645 4D class for op ifm/ofm shapes""patrik.gustavsson
This reverts commit df0a5905177f3a1b836076bc3f9f39b2e86f1794. Reason for revert: <INSERT REASONING HERE> Change-Id: I891c66fb29db9d25e942947e8d1c29a10610de51
2020-12-21Revert "MLBEDSW-3645 4D class for op ifm/ofm shapes"patrik.gustavsson
This reverts commit bf31d647dc5df47410ee577b12427ddf076d816b. Reason for revert: <INSERT REASONING HERE> Change-Id: I7b6c585b7658f94dbaa916c2b6bfe9fb463b8d37
2020-12-21MLBEDSW-3645 4D class for op ifm/ofm shapesPatrik Gustavsson
Add 4D shape class for op Ifm/ofm shapes Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: Ic0a98da9d2f9d085605e39a9ab5a26bad6e702a3
2020-12-18MLBEDSW-3654 Add/use op ifm/ofm shapesPatrik Gustavsson
Add ifm/ofm shapes to op Changed to rely on these shapes Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I571535a1dcadc2bdb04a3c727a8e1c49703b174d
2020-12-18vela: Move special error casesMichael McGeagh
Due to an issue with potential cyclical imports, especially when running individual parts of vela standalone for example with pytest, the specialised error functions are moved out of errors.py to their respective locations. The use of getattr over isinstance prevents the need to import the tensor/operator class causing the cyclical import issue. Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: If8cee4b1a2562660c6a47e1c7aeb5d7fd4dd1fca
2020-12-18[MLBEDSW-297] Setup and run on Microsoft WindowsFredrik Svedberg
Various updates to make vela run and produce identical output on Microsoft Windows. * Fixed overflow errors * Fixed compile warnings * Avoid problematic numpy version * Updated README.md Signed-off-by: Fredrik Svedberg <Fredrik.Svedberg@arm.com> Change-Id: Ie48c63a92a00c81b3247d07f05b75d881319ddbb
2020-12-18MLBEDSW-3487: Support '<' for tensorsLouis Verhaard
Added __lt__ for Tensor to avoid errors when sorting tensors. Change-Id: I19bb591ef17aa0d4a3389da411bd8863c2218d55 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-12-17MLBEDSW-3694 Replace padding with enumMichael McGeagh
Use an Enum instead of a bytestring to specify VALID or SAME padding Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I4e87f8c32b3bfac176d822a68de061e85a558fce
2020-12-16MLBEDSW-3465: Add memory settings into sys configDiqing Zhong
Signed-off-by: Diqing Zhong <diqing.zhong@arm.com> Change-Id: I4a5c53d0c5957595fc639b174b2b227ea043d409
2020-12-14MLBEDSW-2066 Improve Exception messagesMichael McGeagh
Minor refactoring to use fstrings. Improve Error classes to correctly inherit the base class. Use existing exception classes instead of plain exceptions where it makes sense. Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I0941c04e91010da1db77299517a8e2d896371e77
2020-12-14MLBEDSW-3653: Fix type errors in annotated filesDwight Lidman
This commit corrects a number of type errors reported by mypy and refactors some parts of the code which are no longer necessary after making adjustments to satisfy mypy. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I16b880b228e57f2a92fb8936f53e94886e0f9f44
2020-12-14Revert "Revert "MLMBED-3450: Do not convert batched fully connected to conv""Diqing Zhong
- We have combined estimates for conv and fc, add the fix back Change-Id: I49a29c716189b37b387df4b46efab5f4e6125994 Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
2020-12-11MLBEDSW-1373: Added search based allocatorLouis Verhaard
Added a new tensor allocator that is based on searching, implemented in C++ (C++11 compatible). Change-Id: Ie96e9fcfc8e6c58d1fa53911f37de290eeba88cf Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-12-10MLBEDSW-3653: Added type hints to tensor.pyLouis Verhaard
Change-Id: I1b35e039f43471cc0f61cb46ed4d5aff5469d11d Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-12-09Vela: bandwidth calculation improvementsDiqing Zhong
- Combine conv and vector_product calculation - Remove internal bandwidth - Remove blocks and hw_macs from report - Use scaled_bws for cycle estimation Related to: MLBEDSW-3598 Change-Id: I1927a8311ec563f68115e0f2ed077806b86fd717 Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
2020-12-08MLBEDSW-3333 New CLI: --verbose-allMichael McGeagh
Added a new CLI option which simply force-enables all the other verbose options available to vela Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I0dddbc86a76ea0de57266452f39fd0a5ca57eeb3
2020-12-08MLBEDSW-2836 Change sets to tuplesMichael McGeagh
Replace conditional checks against sets with tuples. If not requiring uniqueness, or complex set operations, it is quicker to use tuples instead. Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: Ie8732c8d46067244963936c53f0ec81adda50372
2020-12-08[MLBEDSW-3690] Refactor SoftmaxFredrik Svedberg
Move operator generation code to common functions. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: I02e185fd793a96ae435fa7d235c9d1e97f388a03
2020-12-07vela: Modify CFLAGS for mlw_codec makefileMichael McGeagh
Fix signed/unsigned warning Removed from README.md as it adds no value. The standalone tool is not expected to be used by customers. Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I09034478a14c37d30874d5182a096591dfdd6eb2
2020-12-07MLBEDSW-3685 Fix dangerous default value usageMichael McGeagh
Pylint W0102: When a mutable value as list or dictionary is detected in a default value for an argument. Replace detected instances with None, and upon checking for None, sets the default accordingly Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I4eb73d07d01d4cdefa586eb71b9c76746eee3b11
2020-12-07MLBEDSW-3643: Refactor blockdep calculationLouis Verhaard
Moved blockdep calculation and other helper functions for code generation to a separate file. Change-Id: I2f8ccea478654272ebf42217fc5c1800e9ad177a Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-12-07Softmax use f-stringsFredrik Svedberg
Changed to use f-strings for all generated name strings in Softmax. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: I6a380eacb7ca4c56da735bc0eb2a1fb230e6cc22
2020-11-27MLBEDSW-3633: SplitV incorrectly placed on CPUJacob Bohlin
Minor fix in SPLITV tensor indexing for supported operators check. Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: If8fa702bfbb25a4a7e5bdb136a19ef72eec7e1c2
2020-11-27vela: Rename --keep-scale-placement CLITim Hall
- Changed to --cache-bias-scale-tensor Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I285fe253f03ba98eff36dbe996ad3a57e2ee3d99
2020-11-27MLBEDSW-3424 Arch cacheLouis Verhaard
Default arch instances are cached as they are expensive to create, and they are created often when using the external APIs. Change-Id: I16802fa767e6750da4227c6266d7c4453c047001 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-26MLBEDSW-3562: Improve blockdep calculationLouis Verhaard
Blockdep calculation can now handle different sized IFM/OFM. Change-Id: I898a3c1c3a6778916802f3dbfa658328e5093096 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-26MLBEDSW-3583: Prevent DMA for converted FullyConnectedLouis Verhaard
Do not use DMA for weights of a FullyConnected op that has been converted to a Conv2D. Change-Id: Ibf6710c0a1723c8b48c563ca204f274af5ca88ce Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-26MLBEDSW-3558: Put FC on CPU when OFM != 2DDwight Lidman
This commit adds a constraint to FullyConnected ops in supported_operators.py that puts any such op on the CPU if tensor dimensions of the output(s) are not 2D. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I8c898a780b40fc4a1383c09213f0696ea6699b7d
2020-11-26MLBEDSW-3599: Added API for finding block configsLouis Verhaard
Added public API function npu_find_block_configs. Change-Id: Ib0925a62d7c5d19a9b9fbd8d808943c2ea2df02f Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-25MLBEDSW-3352 Fix ifm end_coord for upsamplingPatrik Gustavsson
-Fix for end_coord for upsampling -Remove restriction for ifm streaming -Added restriction for cascading on ResizeBilinear Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I384abf12cfe8ac9ce7b76066b709600ea901b248
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