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2020-07-27[EXTAPI] refactor weight compression to be used by an external consumerManupa Karunaratne
*lint *added unit tests *added typecheck *added docstring for the api Change-Id: Ibd4bc40d4381ac40ad2ea3d500b26c4ec565ab07 Signed-off-by: Manupa Karunaratne <manupa.karunaratne@arm.com>
2020-07-14MLBEDSW-1538: Output diff for elementwise min/maxDwight Lidman
This commit adds a quantization restriction check for supported operators, so that operators with different quantization between its IFM (1/2) and OFM tensors that do not support it, are correctly placed on the CPU. The quantization between two tensors is compared using a new equality function implemented for the QuantizationParameters class. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I70ff36b4ab4955f328d6e6e699f00dbc43c0404a
2020-07-14MLBEDSW-2641: Fix crash for network with only CPU opsJacob Bohlin
Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: Ia9c70d62c6abc827cbdf73a8bb37afd595796741
2020-07-13MLBEDSW-2584: Support cascading of Transpose ConvolutionJacob Bohlin
Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: I39cff126dda89d71426ab731427ca1d64d02590d
2020-07-10MLBEDSW-1497: Add Quantize operator supportJacob Bohlin
Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: Iaf4d7ab9c32b0d783072c5f131a61bfebe77cc16
2020-07-10Minor black code clean-upJacob Bohlin
Automatically generated, no functional changes. Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: Ia6a791f7dbadc352bc8a7b528afa070e8540b4d0
2020-07-10MLBEDSW-2634 Avoid encoding empty weights streamPatrik Gustavsson
Avoid encoding empty weights stream. Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I120ede14f19705e169c5f03ed344036a58b5f84f
2020-07-08MLBEDSW-2625 Alignment of tensor for bias and scalePatrik Gustavsson
Fix for alignment of tensor for bias and scale Change-Id: I303a225a536f169909cec9ba4d5cee088110bb94 Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
2020-07-07MLBEDSW-2615: MLCE: Ethos-U55 Flash usage increases due to Yoda BetaTim Hall
- Fixed bug with the size of the scale and bias tensor Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I4d267d4c918a5c834ebdff82de4f021717e95203
2020-07-07MLBEDSW-2551 Add support for more mem-cfgsPatrik Gustavsson
Added support for one more memory configuration- Change-Id: Iac19992386e3e9b80bd519acb1b0a399c47d736f Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
2020-07-07MLBEDSW-2548: Fix for Double Buffer size estimateJacob Bohlin
This will give a worst case estimate of the Double Buffer size in the Scheduler and it will no longer be able to choose strategies that end up with a buffer that doesn't fit in SRAM. Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: I763731f63c7672679f3b8cd6db65dad03b946ae5
2020-07-06MLBEDSW-2600: Fix writing of register for wrong architectureTim Hall
- Parallelism mode register was being written for non Yoda targets. Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I31b50031dab4d615733c4c3790dec8934117f275
2020-07-02MLBEDSW-2340: Make the tensor address default NoneCharles Xu
Signed-off-by: Charles Xu <charles.xu@arm.com> Change-Id: I53d9d56acee57cff208dccb4822c1f1a461c416d
2020-06-30MLBEDSW-2564 Restrict settings of perm. storagePatrik Gustavsson
Restrict settings of permanent storage. Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: Iaa81ee05e8e567b2737825be634baa9085192f0e
2020-06-30MLBEDSW-2575: Update documentation for Yoda Beta1.1.0.rc21.1.0Tim Hall
- Added release information - Added PyPi documentation Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Iaae64cfe10a2fa65f0559d13940b19d6f57edfdc
2020-06-26MLBEDSW-2552: Skip npu cycle calculation for cpu op1.1.0.rc1Charles Xu
Signed-off-by: Charles Xu <charles.xu@arm.com> Change-Id: Ief50c934b9e9b0bd3024d3ed0bbaa7b655971952
2020-06-25MLBEDSW-2556: Odd core/block depth weight interleaving updateTim Hall
- If blockdepth or core count resulted in empty or non-existent substreams, the command generator generated an error. This commit changes the command stream generator to only program cores that have streams and are enabled for the configuration. Change-Id: I4e724b19de14d3a12e886ec6b17d0038593dfb59 Signed-off-by: Tim Hall <tim.hall@arm.com>
2020-06-25vela: MLBEDSW-828 weight/scale stream interleavingTim Hall
- Multicore weight and scale stream interleaving for multicore hardware architecture. Change-Id: Ic82850463391c629d90d08c26cf0c48dd438286d Signed-off-by: Tim Hall <tim.hall@arm.com>
2020-06-25MLBEDSW-2306 Added more supported mem-cfgsPatrik Gustavsson
Additional supported memory configurations: -Permanent_storage = DRAM -Tensor arena either in DRAM or SRAM Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I20beb7151e306bfdba540e7c0b2a7b478b4d94e1
2020-06-23MLBEDSW-2547 Add accelerator_configsPatrik Gustavsson
Added more accelerator configs. Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I77a5ece0b9ed1eddb9b8aa9bb7656a022df95fd6
2020-06-23Update arch to 1.0.1Douglas Troha
- Includes npu_active event Signed-off-by: Douglas Troha <douglas.troha@arm.com> Change-Id: I9a2e342a11b9cc2a51f42141edb6f1a4fb4725e7
2020-06-23doc: Add PyPi information to README.mdTim Hall
- Added PyPi installation info - Added source code download/cloning info - Updated development status in setup.py Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I5c2f7dfe19a222f008b5f825c58d0fec14792bc1
2020-06-18doc: Remove remains of a merge-conflict in OPTIONS.md1.0.0Jacob Bohlin
Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: Id6dc0aac1b8b493d65c9c8ea132f5c4b5e273654
2020-06-18vela: Fix block config override issue.Tim Hall
- A blanket exception was preventing block config overrides from being used, from either code or command line. Change-Id: I1a7aa7771e077bcdb66886a6b637d099ae43d732 Signed-off-by: Tim Hall <tim.hall@arm.com>
2020-06-18MLBEDSW-2528: MLCE-219: Custom operator pass throughTim Hall
- Fixed custom operator pass through - Added error printing functions for operators and tensor - Minor cleanup of custom exception handling Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Idf295df1e4c544381dc480244d880c32fb285e38
2020-06-18MLBEDSW-2062: Add EAC release notesTim Hall
- Added RELEASES.md - Updated testing and contributions Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Ia5ca3e11f03f03b739d1ce132ee001d5feb2c19e
2020-06-18MLBEDSW-2506: Swap broadcast input if applicableCharles Xu
Signed-off-by: Charles Xu <charles.xu@arm.com> Change-Id: I6e8a97486aa2e1a21101f7cc32cd3024a376162a
2020-06-18Code clean-up using black and flake8Tim Hall
- No functional change Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I5ab1198b9d092cd041fa9b85b2dee9900d299bfc
2020-06-18tools: Fix pytest-cov in pre-commitTim Hall
- Corrected name in config file Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I245571605173466d08ea2a2139444fc9ff519d3b
2020-06-18MLBEDSW-2436: Support for HardSwish operatorLouis Verhaard
- Added support for HardSwish (placed on CPU) - Improved error reporting for unknown operator codes in input file Signed-off-by: Louis Verhaard <louis.verhaard@arm.com> Change-Id: I1d1c7b9d786288d7098450cdad2b67fc0759378b
2020-06-18MLBEDSW-2432: Retain pass order for CPU subgraphCharles Xu
Signed-off-by: Charles Xu <charles.xu@arm.com> Change-Id: I92b18262608415e84266d2903e17fc5112793a38
2020-06-18Added --nhcwb16-between-cascaded-passes to OPTIONS.mdJacob Bohlin
Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: I99e58d22ec26cf573f5f8b567393e515b2c43794
2020-06-18MLBEDSW-2435: Fix for cascading upscaling operatorsJacob Bohlin
Fixed a coordinate issue which caused the compiler to crash when cascading upscaling operators such as ResizeBilinear. Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: I982863573b0e5829e6d0c255dbbc308cb332a37a
2020-06-18MLBEDSW-2468: Rounding 16bit scale multiplier by 0.5Charles Xu
Signed-off-by: Charles Xu <charles.xu@arm.com> Change-Id: I78f475f9837a7c11f01b2693b17efe1a7c6481cc
2020-06-18MLBEDSW-2370: Add CLI option for NHCWB16Charles Xu
Make it configurable for using NHCWB16 between cascaded passes. Signed-off-by: Charles Xu <charles.xu@arm.com> Change-Id: I259cdaa424d11ea38f17e671490ad1e630bbae44
2020-06-18MLBEDSW-2475: leaky relu not handling negative alpha valueDwight Lidman
This commit places LeakyReLU operators with a negative alpha value on the CPU and avoids a crash during command stream generation. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: Iac68c5a9fdbf26facb709660965615b2b5b551f9
2020-06-18MLBEDSW-2061: Document CLI OptionsJacob Bohlin
Updated OPTIONS.md, containing documentation regarding the CLI options and the system configuration file. Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: Idd278e9fe4cd83f13c4b15430421ec22d7f4e465
2020-06-18MLBEDSW-2455: Bug fix int16 elementwise with scalarLouis Verhaard
Bug fix in the generation of the NPU_SET_IFM2_SCALAR parameter. Signed-off-by: Louis Verhaard <louis.verhaard@arm.com> Change-Id: Ie261a90dcfa61ed269d27a100eb48c58af8a325d
2020-06-18MLBEDSW-2379: Fix 1-element tensors that were marked as scalarsLouis Verhaard
Tensors that are the result of an operation were incorrectly marked as scalars. Also fixes a bug for IFM2 of shape [*,*,*,1] in elementwise operations. Signed-off-by: Louis Verhaard <louis.verhaard@arm.com> Change-Id: I82a0e643b12e93c7158e4aca3185415c59033a73
2020-06-18MLBEDSW-2471: Remove unused CLI optionsTim Hall
- Removed --inter-pass-cycle-delay - Removed --dram-bandwidth - Removed --batch-size Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Ib613f47a9e911c652e522b5aa9ec58ae5391b0fd
2020-06-18MLBEDSW-2063: Add contributions guidelinesTim Hall
- Create new CONTRIBUTIONS.md - Rearrange README.md to reference new documentation Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I502b1606a3fe829a9e242a5de7391bf769203b8c
2020-06-18MLBEDSW-2388: Bug fix cascaded poolingLouis Verhaard
Kernel height was not correctly calculated for pooling operations in rolling_buffer_dims_from_passes. Change-Id: I48763b4b3276538c111e6699f66636327e569705 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-06-18vela: Fix tensor purpose for some CPU only opsTim Hall
- Add support for marking the tensor purpose of CPU only ops such as LESS which mark their input based upon their output Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Ia7898089f0b18ccd4f183e2ef961a67f4d169e4c
2020-06-18MLBEDSW-1828: Ifm/ifm2 order is reversed in some cases of splitCharles Xu
Signed-off-by: Charles Xu <charles.xu@arm.com> Change-Id: Ib8d66f8b3c0467966165c1b53aeb7da7c8764c89
2020-06-18MLBEDSW-2232: Update Readme with security infoTim Hall
- Create new SECURITY.md Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Ia2885300e488355057b3bbcd8eb6873d82599708
2020-06-18vela: Add support for CPU only networksTim Hall
- Fix various problems when no operators run on Ethos-U55 Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I44a1a914fabb7ca26c921a02753da8abeecd9c7b
2020-06-18MLBEDSW-1716: Transpose Convolution supportJacob Bohlin
Change-Id: Ie6d8d6de9f3447f19ba06aafa9fa480fc96a973b Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com>
2020-06-18MLBEDSW-2269: Fix the buffer overlap issue for multi subgraphesCharles Xu
Signed-off-by: Charles Xu <charles.xu@arm.com> Change-Id: Ia7127148d00280bf9c3759dd6dcbe500a4cfcc78
2020-06-18MLBEDSW-2420: Improved support for dilated convolutionLouis Verhaard
- Dilation added to SET_KERNEL_STRIDE instruction - Kernel height/width adjusted for dilation - Updated padding calculation - Updated weight compression Change-Id: I0c8190223e223b039a305aba0f37896ae1de2b80 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-06-18MLBEDSW-1941: Bug fix shared weightsLouis Verhaard
If same weight tensor was used with different block configs, errors would occur. Fixed by always cloning weight tensors, using a global weight compression cache and modifying the linear allocator to detect multiple usage of same weight compression. Change-Id: I91ca59176e1c59c66e0ac7a4227f2b5f0b47053f Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
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