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2020-11-27Regenerated supported operators file2.0.0.rc32.0.0Jacob Bohlin
Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: I5c32b17caa8155e99387195732ce0141030d5599
2020-11-27MLBEDSW-3633: SplitV incorrectly placed on CPUJacob Bohlin
Minor fix in SPLITV tensor indexing for supported operators check. Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: If8fa702bfbb25a4a7e5bdb136a19ef72eec7e1c2
2020-11-27MLBEDSW-3606: Update release notesTim Hall
- Updated for 20.11 release Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I24332b83a72250dfc64a245be796ed0f618a4234
2020-11-27vela: Rename --keep-scale-placement CLITim Hall
- Changed to --cache-bias-scale-tensor Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I285fe253f03ba98eff36dbe996ad3a57e2ee3d99
2020-11-27MLBEDSW-3424 Arch cacheLouis Verhaard
Default arch instances are cached as they are expensive to create, and they are created often when using the external APIs. Change-Id: I16802fa767e6750da4227c6266d7c4453c047001 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-26MLBEDSW-3562: Improve blockdep calculationLouis Verhaard
Blockdep calculation can now handle different sized IFM/OFM. Change-Id: I898a3c1c3a6778916802f3dbfa658328e5093096 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-26MLBEDSW-3024 Updated OPTIONS.mdMichael McGeagh
Reordered based on order of --help output Matched consistency with boolean types Added Ethos-U65 accelerator configs Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I9b3f50e6be37c689da11bb418961d02d4e892b4b
2020-11-26MLBEDSW-3024 Added and updated EthosU weblinksMichael McGeagh
Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I9fe5504dd725f6c5caa55e623391d0a70c4c59ef
2020-11-26MLBEDSW-3583: Prevent DMA for converted FullyConnectedLouis Verhaard
Do not use DMA for weights of a FullyConnected op that has been converted to a Conv2D. Change-Id: Ibf6710c0a1723c8b48c563ca204f274af5ca88ce Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-26MLBEDSW-3558: Put FC on CPU when OFM != 2DDwight Lidman
This commit adds a constraint to FullyConnected ops in supported_operators.py that puts any such op on the CPU if tensor dimensions of the output(s) are not 2D. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I8c898a780b40fc4a1383c09213f0696ea6699b7d
2020-11-26MLBEDSW-3599: Added API for finding block configsLouis Verhaard
Added public API function npu_find_block_configs. Change-Id: Ib0925a62d7c5d19a9b9fbd8d808943c2ea2df02f Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-25MLBEDSW-3352 Fix ifm end_coord for upsamplingPatrik Gustavsson
-Fix for end_coord for upsampling -Remove restriction for ifm streaming -Added restriction for cascading on ResizeBilinear Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I384abf12cfe8ac9ce7b76066b709600ea901b248
2020-11-25MLBEDSW-3424: Added API.mdLouis Verhaard
- Added API.md that describes the external APIs. - Renamed npu_get_api_version Signed-off-by: Louis Verhaard <louis.verhaard@arm.com> Change-Id: I6e6e6103a889da656b4e00c3cce3eee60dfa844a
2020-11-25MLBEDSW-3457 Merge README and PYPIMichael McGeagh
Instead of maintaining two almost identical readme files, have setup.py read in the canonical README.md and modify it to replace the links accordingly. Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: Ia27cd48f3c945b3fac892ab1784ce394119968ac
2020-11-25MLBEDSW-3530: Fix performance issueDiqing Zhong
- Improve conv estimation by adding delay cycles - Estimate minimal block cmd cycles Change-Id: Ibea818e8e820731fc7d05c948d5d1abd22e17089 Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
2020-11-25MLBEDSW-3352 Avoid ifm streaming for some casesPatrik Gustavsson
Changed so it is not allowed to do ifm-streaming for TransposeConv and ResizeBilinear Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I85da279fae6202830c46e4a5500fb1b0dd6ef542
2020-11-25vela: Improve printing of setsMichael McGeagh
When printing a set in the docstrings for the SUPPORTED_OPS.md file, the order is random. Reuse existing sorted string repr for the operator list and apply to other printed sets (data types) Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I2ac12ea91c2637219e5c24f9a863aa0fc2086e77
2020-11-25vela: Fixed formatting of SUPPORTED_OPSMichael McGeagh
mlplatform uses gitiles, which in turn renders markdown differently: "There must be at least three hyphens in each column of the header row" Updated the generation code and the snapshot file to respect this, as well as changed the link from commonmark (which does not support tables) Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: If31860ce8e38ebe7d68bfec61faff805fc00345b
2020-11-24MLBEDSW-3352 Fix incorrectly set default valueMichael McGeagh
Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I2e8384a044ee5458bc8c92562153b6383de5f17a
2020-11-23MLBEDSW-3425: Added external API for driver actionsLouis Verhaard
Added external API to add driver actions to a command stream. Change-Id: Ie4779c1c745defc5769fa694358470cd6aea191c Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-23MLBEDSW-3424: Expose API through separate fileLouis Verhaard
All external APIs are now exposed by api.py. Signed-off-by: Louis Verhaard <louis.verhaard@arm.com> Change-Id: I33f480e424692ac30e9c7d791f583199f31164a7
2020-11-23MLBEDSW-3468: Move of scale tensors to SRAM after weight compressorAndreas Nevalainen
After weight compressor weights has correct sizes. Placing move of scale tensors after weight compressor gives more accurate estimate of available SRAM for scale tensors. Change-Id: I4571780180778ef43e943c4e98048e17d6f33580 Signed-off-by: Andreas Nevalainen <andreas.nevalainen@arm.com>
2020-11-20Revert "MLMBED-3450: Do not convert batched fully connected to conv"2.0.0.rc2Patrik Gustavsson
This reverts commit 15a8e803844b286fe9533e1cf703c76a77b090a8. Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I64169443f473c9ba42551281ad6ac4b45856f420
2020-11-20vela: Add SUPPORTED_OPS.md generated fileMichael McGeagh
This file is generated from the vela option --supported-ops-report Each release, a snapshot will be taken and uploaded with the release. This is for the 2.0.0 release Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I6b618889758a1a078e21244f1f98a56800a528a3
2020-11-20MLBEDSW-3157: Add test for broadcast shapesAndreas Nevalainen
Change-Id: Ifbd6c053ac618bedce0f56fe5c4c647a71d9cc46 Signed-off-by: Andreas Nevalainen <andreas.nevalainen@arm.com>
2020-11-20vela: Relax lxml version constraintTim Hall
- Tested and changed lxml to an older version Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Ie097820008a4d60cb4549c659a90553a0ab9efa9
2020-11-20vela: Update tool description textTim Hall
- Updated and aligned the --help and setup.py descriptions Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I78c11b1b3dd51284b34d57a6caca45cd222b4678
2020-11-20vela: Tanh and Sigmoid broken in fixup_act_reorderTim Hall
- Fixed bug due to typo in Op.type refactor Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I55916d90bf792648f496a45c358b7e897c6730ba
2020-11-20vela: Remove and change CLI optionsTim Hall
- Removed unused --show-minimum-possible-allocation - Change --allocation-alignment to --cpu-tensor-alignment Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I00e367c3190aeea08a3f136332711e9accc85ba3
2020-11-20MLBEDSW-3249: Vela config file examplesTim Hall
- Added sample vela.ini config file - Changed vela config format, split into system config and memory mode - Removed unused CPU cycle performance estimation - Added new CLI options for --memory-mode and --verbose-config - Changed CLI option --config to take multiple files - Removed CLI option --global-memory-clock-scales - Changed error helper functions to raise a VelaError exception - Refactored to create a new is_spilling_enabled function Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I27c41577e37a3859edb9524cd99784be10ef0a0d
2020-11-20vela: Rename Yoda to Ethos-U65Tim Hall
- Also changed to use Ethos-U where appropriate Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Ie45ba2bb3935b305abe897b78b498681296cb7c1
2020-11-20MLBEDSW-3302: Reject per-channel scaling for unsupported opsDwight Lidman
Vela only supports per-channel scaling for convolution ops. This commit adds a check that puts ops with per-channel scaling on the CPU. A caveat worth mentioning is that neither TensorFlow Lite or TensorFlow Lite Micro support per-channel scaling for the CPU placed op, however the problem is moved away from Vela. This commit also changes a small utility function in supported_operators.py used for docstring formatting. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I9ed090592f1d05dd4566d3e54dba1ef405299383
2020-11-20vela: Improve the scaling is equal checkTim Hall
- Improved tensor and scaling query functions - Fixed bug in convert_batched_fc_to_conv Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Ibc3d14036540f27cf5e993beb2163d3e0f5e5933
2020-11-19MLBEDSW-3346: Add index check during paddingAndreas Nevalainen
Change-Id: If63acbc3bcb986db6b81afa4078d5abed05d8afa Signed-off-by: Andreas Nevalainen <andreas.nevalainen@arm.com>
2020-11-19MLBEDSW-3476: Fix performance regressionDiqing Zhong
- Improve the conv estimation when the block size is very small - Estimate cycles on bias/scale channel Signed-off-by: Diqing Zhong <diqing.zhong@arm.com> Change-Id: I275770b7f013b0812fc1ffe91f42ad07727c9dc7
2020-11-19MLBEDSW-3251 Add version to external APIPatrik Gustavsson
Added version to the external API -Added CLI-option --api_version -Added API function to get the API version Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I0143b50adf884a2b05145912a1c7bef8cecc5f02
2020-11-19[MLBEDSW-3300] Fix DepthwiseConv2D fails when bias tensor quant_values are NoneFredrik Svedberg
Fixed DepthwiseConv2D fails when bias tensor quant_values are None. Also fixed DepthwiseConv2D fails with implicit depth multiplier. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: I799a565eefa498ccf7ac626fcd472b8cbd908931
2020-11-19[MLBEDSW-3348] Fix Reshape operator fails with TypeError during deserializationFredrik Svedberg
Fixed Reshape operator fails with TypeError during deserialization in some cases. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: Ib34142f64295de4524e52a7a28eb36e503047bc0
2020-11-18vela: Remove ExpandDims from supported ops listMichael McGeagh
EXPAND_DIMS is not yet supported by vela, and so should not be in the list of supported ops. Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I5eca13eb52eb9b40ecc6592cda978614c71db99d
2020-11-18MLMBED-3468: Update scale tensors SRAM size calculationAndreas Nevalainen
Updated SRAM size calculation for scale tensors. Change-Id: Idaecc3bf0c83d58ea70163bfd194c594295b66db Signed-off-by: Andreas Nevalainen <andreas.nevalainen@arm.com>
2020-11-18MLBEDSW-3494 Fix rounding of fused QuantizedPatrik Gustavsson
Fix for setting rounding to TFL for fused Quantized Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: Ic203f95f8916e330bcbf5792b52661b6f3e99bfc
2020-11-17MLBEDSW-3403 Generate supported op reportMichael McGeagh
A new CLI has been added that allows the generation of a report containing a summary table of all TFLite ops that can be placed on the NPU, and what the constraints are for that operator to be successfully scheduled on the NPU. This option will generate a new file, SUPPORTED_OPS.md containing this information, in the current working directory. Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com> Change-Id: I6a7e2a49f251b76b2ea1168fff78e00da1910b25
2020-11-17MLBEDSW-3491: Fix index out of range in code genLouis Verhaard
Usage of shape[-2] could cause index out of range. Signed-off-by: Louis Verhaard <louis.verhaard@arm.com> Change-Id: I1b64b117f8236ce9ba321ca03bdb25e5a03a6589
2020-11-17MLBEDSW-3493: bug fixes in mark_tensorsLouis Verhaard
None inputs and unsupported tensor shapes caused asserts when marking tensor purpose/format. Change-Id: I4498b61576f529c1a594341cfbb6ba278c6e7ec5 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-17MLMBED-3450: Do not convert batched fully connected to convAndreas Nevalainen
Do not convert batched fully connected operators to avoid moving weights from flash to SRAM. Change-Id: I873c9ce05377de3f16e4cee9a0863f29d9ec3ad4 Signed-off-by: Andreas Nevalainen <andreas.nevalainen@arm.com>
2020-11-16MLBEDSW-3483, KeyError "fused_activation_function"Louis Verhaard
Bug fix for a regression: Vela could crash for operators placed on CPU. Signed-off-by: Louis Verhaard <louis.verhaard@arm.com> Change-Id: I99dcfdb4d3029ad86ffd2c8b3fd2547554794b79
2020-11-16MLBEDSW-3350 Put softmax on CPU if beta < 0Patrik Gustavsson
Put softmax on CPU if beta < 0 Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I4ec866dd44d14e2737c4cd96474e54bb770bfb3e
2020-11-16MLBEDSW-3301: Vela fails ungracefully when reading string buffersDwight Lidman
When encountering a sparse string buffer, Vela fails both due to missing a mapping for a Numpy string type and also for not being able to read sparse buffers. The failing line is attempting to reshape a [100] buffer into a [3, 5] tensor which does not work due to Vela treating the buffer as non-sparse. The solution here is to simply not do the reshape for string buffers (which all appear to be sparse) since it is not something that will be supported in the future anyway. The related operator can then be pushed to the CPU as expected. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: Iea0af6cd60a691f975209014b6aa098dde8d6a4b
2020-11-13MLBEDSW-839: Code generation using external API2.0.0.rc1Louis Verhaard
Added external API to generate register command streams. Existing code generation has been refactored to make use of this API. Change-Id: Ibb4c2b167809869f16470b14da24f08a65c82b7b Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-11MLBEDSW-3463: StridedSlice fixup function causes infinite recursionDwight Lidman
This commit reverts a control flow path where already modified StridedSlice operators are left untouched. If not, Vela would recurse infinitely and crash. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: Iaf3ae916325bedd3dd1edd3395fb4a9ecf832590
generated by cgit v1.2.1 (git 2.23.0) at 2024-05-14 21:01:19 +0000