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2020-06-18MLBEDSW-2379: Fix 1-element tensors that were marked as scalarsLouis Verhaard
Tensors that are the result of an operation were incorrectly marked as scalars. Also fixes a bug for IFM2 of shape [*,*,*,1] in elementwise operations. Signed-off-by: Louis Verhaard <louis.verhaard@arm.com> Change-Id: I82a0e643b12e93c7158e4aca3185415c59033a73
2020-06-18MLBEDSW-2471: Remove unused CLI optionsTim Hall
- Removed --inter-pass-cycle-delay - Removed --dram-bandwidth - Removed --batch-size Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Ib613f47a9e911c652e522b5aa9ec58ae5391b0fd
2020-06-18MLBEDSW-2063: Add contributions guidelinesTim Hall
- Create new CONTRIBUTIONS.md - Rearrange README.md to reference new documentation Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I502b1606a3fe829a9e242a5de7391bf769203b8c
2020-06-18MLBEDSW-2388: Bug fix cascaded poolingLouis Verhaard
Kernel height was not correctly calculated for pooling operations in rolling_buffer_dims_from_passes. Change-Id: I48763b4b3276538c111e6699f66636327e569705 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-06-18vela: Fix tensor purpose for some CPU only opsTim Hall
- Add support for marking the tensor purpose of CPU only ops such as LESS which mark their input based upon their output Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Ia7898089f0b18ccd4f183e2ef961a67f4d169e4c
2020-06-18MLBEDSW-1828: Ifm/ifm2 order is reversed in some cases of splitCharles Xu
Signed-off-by: Charles Xu <charles.xu@arm.com> Change-Id: Ib8d66f8b3c0467966165c1b53aeb7da7c8764c89
2020-06-18MLBEDSW-2232: Update Readme with security infoTim Hall
- Create new SECURITY.md Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Ia2885300e488355057b3bbcd8eb6873d82599708
2020-06-18vela: Add support for CPU only networksTim Hall
- Fix various problems when no operators run on Ethos-U55 Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I44a1a914fabb7ca26c921a02753da8abeecd9c7b
2020-06-18MLBEDSW-1716: Transpose Convolution supportJacob Bohlin
Change-Id: Ie6d8d6de9f3447f19ba06aafa9fa480fc96a973b Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com>
2020-06-18MLBEDSW-2269: Fix the buffer overlap issue for multi subgraphesCharles Xu
Signed-off-by: Charles Xu <charles.xu@arm.com> Change-Id: Ia7127148d00280bf9c3759dd6dcbe500a4cfcc78
2020-06-18MLBEDSW-2420: Improved support for dilated convolutionLouis Verhaard
- Dilation added to SET_KERNEL_STRIDE instruction - Kernel height/width adjusted for dilation - Updated padding calculation - Updated weight compression Change-Id: I0c8190223e223b039a305aba0f37896ae1de2b80 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-06-18MLBEDSW-1941: Bug fix shared weightsLouis Verhaard
If same weight tensor was used with different block configs, errors would occur. Fixed by always cloning weight tensors, using a global weight compression cache and modifying the linear allocator to detect multiple usage of same weight compression. Change-Id: I91ca59176e1c59c66e0ac7a4227f2b5f0b47053f Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-06-18MLBEDSW-2434: optim: 19_12_32, bilinear + depthwise int8 output diffDwight Lidman
This commit fixes a bug where there would be an off-by-one error in some cases for ResizeBilinear. It is resolved by treating it the same way as an AvgPool in regards to setting the zero point. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I2835d5dcf360f65e19265c339e5ffd02de16c823
2020-06-18MLBEDSW-2372: Failing assert for ResizeBilinear with upscale != 2xDwight Lidman
This commit fixes the failing assert by removing it and instead placing unsupported ResizeBilinear operators on the CPU. It introduces a new graph optimisation function which adds the necessary attributes as well as new operator restrictions for ResizeBilinear. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I2feffd0b5a2169ebffbe4f165e450b3f2d140380
2020-06-18MLBEDSW-1971: Verify ifm block size calculation against specificationDwight Lidman
This commit ensures the IFM block size calculation in architecture_features.py matches the specification by correctly setting the ifm upscaling factor based on the upscaling mode. This requires adding an attribute to the Tensor object which stores the upscaling mode for that specific tensor and making sure that information is correctly carried over to shared_buffer_allocation.py. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I4ab56086f4c694d3bf759bbad30cdb969b4a26db
2020-06-18[MLBEDSW-1996] Update supported operator checksFredrik Svedberg
Updated supported operator checks according to latest requirements. Change-Id: I79708d8039e464e39818d3c09e61f3f533e96f3d Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
2020-06-18MLBEDSW-2339: No DMA needed for elementwise scalar in case of offchipCharles Xu
Signed-off-by: Charles Xu <charles.xu@arm.com> Change-Id: I7b18af503ac6482cf8dc3e9f3e2e93e6cba6426f
2020-06-18MLBEDSW-2067: added custom exceptionsLouis Verhaard
Added custom exceptions to handle different types of input errors. Also performed minor formatting changes using flake8/black. Change-Id: Ie5b05361507d5e569aff045757aec0a4a755ae98 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-06-18Add elementwise vector scalars supportCharles Xu
Write the constant scalars into flash. In case it's Dram or OffChipFlash, DMA the scalars from flash to sram. Signed-off-by: Charles Xu <charles.xu@arm.com> Change-Id: I42300a05dfe968d623b8aec8549644549e0f54b5
2020-06-18MLBEDSW-786: Fix Tanh/Sigmoid for int16Fredrik Svedberg
Fixed scaling for int16 tanh/sigmoid to match the reference. Change-Id: I3110298b7e8638a82cc05bedc03de389dec27898 Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
2020-06-18MLBEDSW-1540: bug fix SHRAM buffer size calculationLouis Verhaard
Updated the algorithm for SHRAM buffer size calculation with block depth alignment. Change-Id: Ie8b10725bb9f52ba4a353b5a2170653833e6e5c0 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-06-18MLBEDSW-2002: Fix Reshape's output MemAreaLouis Verhaard
A Reshape operator's input and output tensor point to same data, thus have the same mem area. Change-Id: Ice830f83da78103d54b5f72f5bfc1e6ffa8636c3 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-06-18Further update for MLBEDSW-1872Tim Hall
- Pack and reshape operators were manipulating tensors of different equivalence IDs that refer to the same memory area, causing issues with block dependency checking. Ideally we'd use address overlap calculations for accuracy, but this commit implements a generalised solution by setting memory op IO tensors to use the same equivalence ID. Change-Id: Ia59ae3900f508ffeebaf7af4bca32f5be4e69345 Signed-off-by: Tim Hall <tim.hall@arm.com>
2020-06-18Include 0.180 in HI 1.0Douglas Troha
* Rename debug_addr to debug_address and update page names Change-Id: Ib8d84e6371437439038db411d2f8ff114590878a Signed-off-by: Douglas Troha <douglas.troha@arm.com>
2020-06-18MLBEDSW-2303: Bug fix SplitLouis Verhaard
Usage of the Split operator caused assert failure. Signed-off-by: Louis Verhaard <louis.verhaard@arm.com> Change-Id: Ibe09b9021f768b86731bdc361f9a0875c4379e4b
2020-06-18Add test for len1_array_to_scalar functionDiego Russo
Moved len1_array_to_scalar from a nested function to a staticmethod of TFLiteSubgraph. Change-Id: I182f0b70f03070855c1a4478d26644892c1ebb15 Signed-off-by: Diego Russo <diego.russo@arm.com>
2020-06-18Add float32 support for unsupported operatorsTim Hall
- Removed the assert on datatype not being uint8/int8/int16 - Allow unquantised inputs - This will break for float32 versions of supported operators Change-Id: Id579b7adf61645b7578ee59bc2003c49108aedd5 Signed-off-by: Tim Hall <tim.hall@arm.com>
2020-06-18Fix blockdep issue for MLBEDSW-1872 rnnoiseTim Hall
- 5 step rnnoise was failing due to secondary tensors not being checked for operator dependency. This commit adds ifm2 comparisons to the dependency check. Change-Id: I629c8a70997481efb7f596d8b77512d3419eaab4 Signed-off-by: Tim Hall <tim.hall@arm.com>
2020-06-18MLBEDSW-1649: Add size splits for Split opCharles Xu
The tensor is split into len(size_splits) along the dimension axis with the sizes specified in the size_splits array. Change-Id: I2ce98fa10e2e26f16cfd86a775aee94a308509ea Signed-off-by: Charles Xu <charles.xu@arm.com>
2020-06-18Update to HI 1.0Douglas Troha
* Includes changes for 0.179 Change-Id: I0234eba25034b1cd5731746cc9704ff099779adf Signed-off-by: Douglas Troha <douglas.troha@arm.com>
2020-06-18MLBEDSW-1685: bug fix when IFM==IFM2 for elementwise opsLouis Verhaard
There was output diff when both IFMs are referring to the same tensor in binary elementwise operations. IFM2 dimension-instructions were not written by vela. Change-Id: I40a0dcbc9557f7308222b7230e5586d8f2a04c6a Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-06-18MLBEDSW-1906: Extend IFM to full dimensionCharles Xu
Extend IFM to full dimension for the performance metrics calculation. Change-Id: Iae923e37280ab0f22b7a272f28970973a5142534 Signed-off-by: Charles Xu <charles.xu@arm.com>
2020-06-18Add some basic LiveRange testDiego Russo
Added unit tests for LiveRange. Change-Id: I4d4a16e7ec215fa39fa1be3dda3be22b4632689c Signed-off-by: Diego Russo <diego.russo@arm.com>
2020-06-18Add pytest for mlw_codec moduleDiego Russo
Added unit tests for mlw_codec. Change-Id: I0d43de39e4e45429445e7091234d3523ba89d58b Signed-off-by: Diego Russo <diego.russo@arm.com>
2020-06-18Add pytest/pytest-cov support for pre-commitDiego Russo
Pytest (testing framework) and pytest-cov are now part of the python environment and run automatically by pre-commit hook. Change-Id: If55cae9f29391c80c809a0487785786a7b9ae62a Signed-off-by: Diego Russo <diego.russo@arm.com>
2020-06-18Add reorder-python-import pre-commit hookDiego Russo
Also updated README.md Change-Id: I118309c61f4d00e8508d6b888c606995490fba39 Signed-off-by: Diego Russo <diego.russo@arm.com>
2020-06-18MLBEDSW-1498: Add Resize_Bilinear operator supportDwight Lidman
This patch adds support for the ResizeBilinear operator. It is implemented using a 2x2 Nearest Neighbor upscale followed by a 2x2 Average Pool. Depending on the argument align_corners the output is either of shape: - (2 * M, 2 * N) when align_corners == True, or - (2 * M - 1, 2 * N - 1) when align_corners == False where (M, N) is the input shape. The padding mode is SAME when align_corners == True and VALID when align_corners == False. The argument half_pixel_centers is out of scope and is as of now ignored. Note that only upscaling by a factor of 2 is supported. Change-Id: Ia6d6d010c4f1bb13f5f839bc8d16872a626d9a3b Signed-off-by: Dwight Lidman <dwight.lidman@arm.com>
2020-06-18Add .gitignoreDiego Russo
Ignore some default python files generated by the build/installation Change-Id: Ifa2db6215cbc68f87ede0a17bb96c1da430b6bd8 Signed-off-by: Diego Russo <diego.russo@arm.com>
2020-06-18Add pre-commit support for sanity checksDiego Russo
Use pre-commit framework [1] to run black and flake8 before the commit. black and flake8 are managed by the pre-commit framework and they can be run manually by the user using `pre-commit run` command. Fix the code base with the help of black and flake8. Fix import statements according to PEP8 guidelines [1] Both tools have the following settings (specified in the pre-commit configuration file): * line length: 120 characters * directory to exclude: ethosu/vela/tflite/ and ethosu/vela/ethos_u55_regs Updated README.md on how to install pre-commit and how to run sanity checks. Pipenv files have been updated including new dependencies for pre-commit. [1]: https://www.python.org/dev/peps/pep-0008/#imports [2]: https://github.com/pre-commit/pre-commit Change-Id: I304d9fffdf019d390ffa396a529c8a7c2437f63d Signed-off-by: Diego Russo <diego.russo@arm.com>
2020-06-18MLBEDSW-2241: Fix for NHCWB16 with int16Patrik Gustavsson
Changes in strides and rounding for int16 and NHCWB16 Change-Id: I195890215b55ee7a4eab2e6ce4da95fb41587acb Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
2020-06-18MLBEDSW-1998: Add support for new_axis_maskPatrik Gustavsson
-Added support for new_axis_mask -Added support for more than 1 bit set in new/shrink_axis mask -Added checks for strided slice in supported operator check -Added assert if nothing has been put on NPU Change-Id: I66e2d04784f14d7ad82371f5d649a455d576a818 Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
2020-06-18MLBEDSW-1970: Add stride 3 supportDwight Lidman
This patch adds support for strides of size 3. It removes some obsolete code for a corner case that no longer exists. It also changes the setting of the bitfield in NPU_SET_KERNEL_STRIDE so that it matches the specification. Change-Id: I7dabcf72b7826ca0b3c98e9d23209027204079a8 Signed-off-by: Dwight Lidman <dwight.lidman@arm.com>
2020-06-18MLBEDSW-2030: PReLU is not mapped for passthroughTim Hall
- Added missing prelu op to tflite mapping Change-Id: I1cb846fc044f0a5a78651569383a552d1cccbb52 Signed-off-by: Tim Hall <tim.hall@arm.com>
2020-06-18MLBEDSW-1997: POW operator fails to loadTim Hall
- Dict was returning a str rather than the tuple (str, options) Change-Id: Ia4359653d05897b2fd123a21c818dc51d831ed79 Signed-off-by: Tim Hall <tim.hall@arm.com>
2020-06-18Apply fixes to mlw_encoderTim Hall
- Fix weight encoder palette allocation Change-Id: If79655f65cfb4820bf0f8ba6472b3df940b1e44b Signed-off-by: Tim Hall <tim.hall@arm.com>
2020-06-18MLBEDSW-819: int16 changes for advanced add/subFredrik Svedberg
Updated scaling for advanced add/sub. Change-Id: I89eaff0cf5c33dcc94e8a3eeed4187771e0d8d63 Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
2020-06-18Fixed issuing of REGION cmds to allow constant FeatureMapsJacob Bohlin
In order to support constant IFM and IFM2, i.e. predefined inputs placed in Flash, the REGION commands had to be updated to be emitted for every op. They are emitted based on the 'mem_area' field of the Tensor. Change-Id: I434e8efc915af4119fa2ce37a05240a151593141 Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com>
2020-06-18MLBEDSW-1370: Use NHCWB16 between NPU opsPatrik Gustavsson
Added support for using NHCWB16 between cascaded passes. (For Reshape format is kept to NHWC) Change-Id: I0ef1631984fec89fe09999b64ae69563e2aefc9b Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
2020-06-18MLBEDSW-1998: Add more support for Strided_slicePatrik Gustavsson
Add support for end_mask != begin_mask Change-Id: I6775696de4e2365e0a7cdcbcdbc64a7bd4858fb5 Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
2020-06-18MLBEDSW-2001: Fix unary elementwise operator regressionDwight Lidman
Change-Id: I8f109cd148aaa17c18a97068fad52419c8d9d12e Signed-off-by: Dwight Lidman <dwight.lidman@arm.com>
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